FR2735906B1 - METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICES, IN PARTICULAR MOS TRANSISTORS OR MOS / BIPOLAR TRANSISTORS - Google Patents

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICES, IN PARTICULAR MOS TRANSISTORS OR MOS / BIPOLAR TRANSISTORS

Info

Publication number
FR2735906B1
FR2735906B1 FR9507675A FR9507675A FR2735906B1 FR 2735906 B1 FR2735906 B1 FR 2735906B1 FR 9507675 A FR9507675 A FR 9507675A FR 9507675 A FR9507675 A FR 9507675A FR 2735906 B1 FR2735906 B1 FR 2735906B1
Authority
FR
France
Prior art keywords
mos
transistors
semiconductor devices
manufacturing semiconductor
bipolar transistors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9507675A
Other languages
French (fr)
Other versions
FR2735906A1 (en
Inventor
Philippe Gayet
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
SGS Thomson Microelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics SA filed Critical SGS Thomson Microelectronics SA
Priority to FR9507675A priority Critical patent/FR2735906B1/en
Publication of FR2735906A1 publication Critical patent/FR2735906A1/en
Application granted granted Critical
Publication of FR2735906B1 publication Critical patent/FR2735906B1/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
    • H01L29/6659—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28123—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
FR9507675A 1995-06-21 1995-06-21 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICES, IN PARTICULAR MOS TRANSISTORS OR MOS / BIPOLAR TRANSISTORS Expired - Fee Related FR2735906B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR9507675A FR2735906B1 (en) 1995-06-21 1995-06-21 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICES, IN PARTICULAR MOS TRANSISTORS OR MOS / BIPOLAR TRANSISTORS

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9507675A FR2735906B1 (en) 1995-06-21 1995-06-21 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICES, IN PARTICULAR MOS TRANSISTORS OR MOS / BIPOLAR TRANSISTORS

Publications (2)

Publication Number Publication Date
FR2735906A1 FR2735906A1 (en) 1996-12-27
FR2735906B1 true FR2735906B1 (en) 1997-09-05

Family

ID=9480407

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9507675A Expired - Fee Related FR2735906B1 (en) 1995-06-21 1995-06-21 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICES, IN PARTICULAR MOS TRANSISTORS OR MOS / BIPOLAR TRANSISTORS

Country Status (1)

Country Link
FR (1) FR2735906B1 (en)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61125087A (en) * 1984-11-21 1986-06-12 Nec Corp Insulated gate type field effect semiconductor device and manufacture thereof
IT1236728B (en) * 1989-10-24 1993-03-31 Sgs Thomson Microelectronics PROCEDURE FOR FORMING THE INSULATION STRUCTURE AND THE GATE STRUCTURE OF INTEGRATED DEVICES
US5177028A (en) * 1991-10-22 1993-01-05 Micron Technology, Inc. Trench isolation method having a double polysilicon gate formed on mesas

Also Published As

Publication number Publication date
FR2735906A1 (en) 1996-12-27

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20120229