FR2729528B1 - - Google Patents
Info
- Publication number
- FR2729528B1 FR2729528B1 FR9500365A FR9500365A FR2729528B1 FR 2729528 B1 FR2729528 B1 FR 2729528B1 FR 9500365 A FR9500365 A FR 9500365A FR 9500365 A FR9500365 A FR 9500365A FR 2729528 B1 FR2729528 B1 FR 2729528B1
- Authority
- FR
- France
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M9/00—Parallel/series conversion or vice versa
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
- H03K23/004—Counters counting in a non-natural counting order, e.g. random counters
- H03K23/005—Counters counting in a non-natural counting order, e.g. random counters using minimum change code, e.g. Gray Code
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/04—Distributors combined with modulators or demodulators
- H04J3/047—Distributors with transistors or integrated circuits
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0685—Clock or time synchronisation in a node; Intranode synchronisation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Theoretical Computer Science (AREA)
- Time-Division Multiplex Systems (AREA)
- Electronic Switches (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9500365A FR2729528A1 (fr) | 1995-01-13 | 1995-01-13 | Circuit de multiplexage |
CH6896A CH690978A5 (fr) | 1995-01-13 | 1996-01-10 | Circuit de multiplexage. |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9500365A FR2729528A1 (fr) | 1995-01-13 | 1995-01-13 | Circuit de multiplexage |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2729528A1 FR2729528A1 (fr) | 1996-07-19 |
FR2729528B1 true FR2729528B1 (zh) | 1997-03-07 |
Family
ID=9475117
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR9500365A Granted FR2729528A1 (fr) | 1995-01-13 | 1995-01-13 | Circuit de multiplexage |
Country Status (2)
Country | Link |
---|---|
CH (1) | CH690978A5 (zh) |
FR (1) | FR2729528A1 (zh) |
Families Citing this family (28)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6420988B1 (en) | 1998-12-03 | 2002-07-16 | Semiconductor Energy Laboratory Co., Ltd. | Digital analog converter and electronic device using the same |
TW468269B (en) | 1999-01-28 | 2001-12-11 | Semiconductor Energy Lab | Serial-to-parallel conversion circuit, and semiconductor display device employing the same |
US6529040B1 (en) * | 2000-05-05 | 2003-03-04 | Xilinx, Inc. | FPGA lookup table with speed read decoder |
US6760772B2 (en) | 2000-12-15 | 2004-07-06 | Qualcomm, Inc. | Generating and implementing a communication protocol and interface for high data rate signal transfer |
US8812706B1 (en) | 2001-09-06 | 2014-08-19 | Qualcomm Incorporated | Method and apparatus for compensating for mismatched delays in signals of a mobile display interface (MDDI) system |
TWI374635B (en) | 2003-06-02 | 2012-10-11 | Qualcomm Inc | Generating and implementing a signal protocol and interface for higher data rates |
US8705571B2 (en) | 2003-08-13 | 2014-04-22 | Qualcomm Incorporated | Signal interface for higher data rates |
RU2369033C2 (ru) | 2003-09-10 | 2009-09-27 | Квэлкомм Инкорпорейтед | Интерфейс высокоскоростной передачи данных |
CN102801595A (zh) | 2003-10-15 | 2012-11-28 | 高通股份有限公司 | 高数据速率接口 |
AU2004307162A1 (en) | 2003-10-29 | 2005-05-12 | Qualcomm Incorporated | High data rate interface |
RU2341906C2 (ru) | 2003-11-12 | 2008-12-20 | Квэлкомм Инкорпорейтед | Интерфейс высокоскоростной передачи данных с улучшенным управлением соединением |
JP2007512785A (ja) | 2003-11-25 | 2007-05-17 | クゥアルコム・インコーポレイテッド | 改良されたリンク同期を備えた高速データレートインタフェース |
CA2548412C (en) | 2003-12-08 | 2011-04-19 | Qualcomm Incorporated | High data rate interface with improved link synchronization |
BRPI0508582A (pt) | 2004-03-10 | 2007-08-14 | Qualcomm Inc | equipamento e método de interface de alta taxa de dados |
TWI384811B (zh) | 2004-03-17 | 2013-02-01 | Qualcomm Inc | 高資料率介面裝置及方法 |
US8650304B2 (en) | 2004-06-04 | 2014-02-11 | Qualcomm Incorporated | Determining a pre skew and post skew calibration data rate in a mobile display digital interface (MDDI) communication system |
EP1978694B1 (en) | 2004-06-04 | 2011-05-25 | QUALCOMM Incorporated | High data rate interface apparatus and method |
US8667363B2 (en) | 2004-11-24 | 2014-03-04 | Qualcomm Incorporated | Systems and methods for implementing cyclic redundancy checks |
US8539119B2 (en) | 2004-11-24 | 2013-09-17 | Qualcomm Incorporated | Methods and apparatus for exchanging messages having a digital data interface device message format |
US8723705B2 (en) | 2004-11-24 | 2014-05-13 | Qualcomm Incorporated | Low output skew double data rate serial encoder |
US8692838B2 (en) | 2004-11-24 | 2014-04-08 | Qualcomm Incorporated | Methods and systems for updating a buffer |
US8873584B2 (en) | 2004-11-24 | 2014-10-28 | Qualcomm Incorporated | Digital data interface device |
WO2006058051A2 (en) * | 2004-11-24 | 2006-06-01 | Qualcomm Incorporated | Methods and systems for updating a buffer |
US8699330B2 (en) | 2004-11-24 | 2014-04-15 | Qualcomm Incorporated | Systems and methods for digital data transmission rate control |
US8692839B2 (en) | 2005-11-23 | 2014-04-08 | Qualcomm Incorporated | Methods and systems for updating a buffer |
US8730069B2 (en) | 2005-11-23 | 2014-05-20 | Qualcomm Incorporated | Double data rate serial encoder |
US8044833B2 (en) | 2009-01-16 | 2011-10-25 | Raytheon Company | High speed serializer |
US8405426B2 (en) * | 2010-05-28 | 2013-03-26 | Qualcomm Incorporated | Method and apparatus to serialize parallel data input values |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5111455A (en) * | 1990-08-24 | 1992-05-05 | Avantek, Inc. | Interleaved time-division multiplexor with phase-compensated frequency doublers |
-
1995
- 1995-01-13 FR FR9500365A patent/FR2729528A1/fr active Granted
-
1996
- 1996-01-10 CH CH6896A patent/CH690978A5/fr not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
FR2729528A1 (fr) | 1996-07-19 |
CH690978A5 (fr) | 2001-03-15 |
Similar Documents
Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |