FR2728102B1 - - Google Patents

Info

Publication number
FR2728102B1
FR2728102B1 FR9415019A FR9415019A FR2728102B1 FR 2728102 B1 FR2728102 B1 FR 2728102B1 FR 9415019 A FR9415019 A FR 9415019A FR 9415019 A FR9415019 A FR 9415019A FR 2728102 B1 FR2728102 B1 FR 2728102B1
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9415019A
Other languages
French (fr)
Other versions
FR2728102A1 (fr
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to FR9415019A priority Critical patent/FR2728102A1/fr
Publication of FR2728102A1 publication Critical patent/FR2728102A1/fr
Application granted granted Critical
Publication of FR2728102B1 publication Critical patent/FR2728102B1/fr
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28123Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311Gate electrodes for field-effect devices
    • H10D64/411Gate electrodes for field-effect devices for FETs
    • H10D64/511Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/517Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311Gate electrodes for field-effect devices
    • H10D64/411Gate electrodes for field-effect devices for FETs
    • H10D64/511Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/517Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers
    • H10D64/518Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers characterised by their lengths or sectional shapes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0135Manufacturing their gate conductors
    • H10D84/014Manufacturing their gate conductors the gate conductors having different materials or different implants
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0212Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
FR9415019A 1994-12-08 1994-12-08 Procede de fabrication de transistors mos de circuit integre Granted FR2728102A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR9415019A FR2728102A1 (fr) 1994-12-08 1994-12-08 Procede de fabrication de transistors mos de circuit integre

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9415019A FR2728102A1 (fr) 1994-12-08 1994-12-08 Procede de fabrication de transistors mos de circuit integre

Publications (2)

Publication Number Publication Date
FR2728102A1 FR2728102A1 (fr) 1996-06-14
FR2728102B1 true FR2728102B1 (cs) 1997-02-28

Family

ID=9469775

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9415019A Granted FR2728102A1 (fr) 1994-12-08 1994-12-08 Procede de fabrication de transistors mos de circuit integre

Country Status (1)

Country Link
FR (1) FR2728102A1 (cs)

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02146732A (ja) * 1988-07-28 1990-06-05 Fujitsu Ltd 研摩液及び研摩方法
JPH0744275B2 (ja) * 1988-10-06 1995-05-15 日本電気株式会社 高耐圧mos型半導体装置の製造方法
JP2551127B2 (ja) * 1989-01-07 1996-11-06 三菱電機株式会社 Mis型半導体装置およびその製造方法
IT1236728B (it) * 1989-10-24 1993-03-31 Sgs Thomson Microelectronics Procedimento per formare la struttura di isolamento e la struttura di gate di dispositivi integrati
JPH06181310A (ja) * 1992-12-15 1994-06-28 Mitsubishi Electric Corp 半導体装置の製造方法
US5346587A (en) * 1993-08-12 1994-09-13 Micron Semiconductor, Inc. Planarization of a gate electrode for improved gate patterning over non-planar active area isolation

Also Published As

Publication number Publication date
FR2728102A1 (fr) 1996-06-14

Similar Documents

Publication Publication Date Title
DK105996A (cs)
BR9508234A (cs)
DK0677466T3 (cs)
EP0669187A3 (cs)
EP0671407A3 (cs)
EP0671801A3 (cs)
TW274159B (cs)
TW275090B (cs)
EP0666470A3 (cs)
DE69535748D1 (cs)
EP0670326A3 (cs)
EP0667627A3 (cs)
DK0685247T3 (cs)
ECSDI940193S (cs)
CU22450A3 (cs)
ECSDI940192S (cs)
ECSMU940035U (cs)
ECSDI940198S (cs)
BRPI9401073A2 (cs)
ECSDI940181S (cs)
ECSDI940184S (cs)
ECSDI940185S (cs)
ECSDI940187S (cs)
CN3029327S (cs)
EP0668153A3 (cs)

Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20060831