FR2703827B1 - Réseau de microplaquettes reconnues bonnes et procédé de fabrication de ce réseau. - Google Patents
Réseau de microplaquettes reconnues bonnes et procédé de fabrication de ce réseau.Info
- Publication number
- FR2703827B1 FR2703827B1 FR9403967A FR9403967A FR2703827B1 FR 2703827 B1 FR2703827 B1 FR 2703827B1 FR 9403967 A FR9403967 A FR 9403967A FR 9403967 A FR9403967 A FR 9403967A FR 2703827 B1 FR2703827 B1 FR 2703827B1
- Authority
- FR
- France
- Prior art keywords
- network
- microchips
- recognized
- manufacturing
- good
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/286—External aspects, e.g. related to chambers, contacting devices or handlers
- G01R31/2863—Contacting devices, e.g. sockets, burn-in boards or mounting fixtures
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
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Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- General Engineering & Computer Science (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Environmental & Geological Engineering (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Lead Frames For Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019930005769A KR960000793B1 (ko) | 1993-04-07 | 1993-04-07 | 노운 굳 다이 어레이 및 그 제조방법 |
Publications (2)
Publication Number | Publication Date |
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FR2703827A1 FR2703827A1 (fr) | 1994-10-14 |
FR2703827B1 true FR2703827B1 (fr) | 1996-01-19 |
Family
ID=19353565
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR9403967A Expired - Fee Related FR2703827B1 (fr) | 1993-04-07 | 1994-04-05 | Réseau de microplaquettes reconnues bonnes et procédé de fabrication de ce réseau. |
Country Status (6)
Country | Link |
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US (1) | US5548884A (fr) |
JP (1) | JP2882747B2 (fr) |
KR (1) | KR960000793B1 (fr) |
CN (1) | CN1041149C (fr) |
DE (1) | DE4411973C2 (fr) |
FR (1) | FR2703827B1 (fr) |
Families Citing this family (30)
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US5578934A (en) * | 1991-06-04 | 1996-11-26 | Micron Technology, Inc. | Method and apparatus for testing unpackaged semiconductor dice |
KR960011265B1 (ko) * | 1993-06-25 | 1996-08-21 | 삼성전자 주식회사 | 노운 굳 다이 어레이용 테스트 소켓 |
US5701085A (en) * | 1995-07-05 | 1997-12-23 | Sun Microsystems, Inc. | Apparatus for testing flip chip or wire bond integrated circuits |
US5739050A (en) * | 1996-01-26 | 1998-04-14 | Micron Technology, Inc. | Method and apparatus for assembling a semiconductor package for testing |
US5773311A (en) * | 1996-04-26 | 1998-06-30 | Honeywell Inc. | Method for providing a test connection and a permanent connection site on an unpackaged semiconductor die |
KR0175268B1 (ko) * | 1996-05-10 | 1999-04-01 | 김광호 | 수평 하향식 접속 방식의 베어 칩 테스트 장치 |
US5874319A (en) * | 1996-05-21 | 1999-02-23 | Honeywell Inc. | Vacuum die bond for known good die assembly |
US5898186A (en) | 1996-09-13 | 1999-04-27 | Micron Technology, Inc. | Reduced terminal testing system |
US5904500A (en) * | 1996-10-03 | 1999-05-18 | The Dexter Corporation | Method for the preparation of lead-on-chip assemblies |
US6040706A (en) * | 1996-11-07 | 2000-03-21 | Matsushita Electronics Corporation | Contactor and semiconductor device inspecting method |
US6103553A (en) | 1996-12-11 | 2000-08-15 | Hyundai Electronics Industries Co., Ltd. | Method of manufacturing a known good die utilizing a substrate |
US5836071A (en) * | 1996-12-26 | 1998-11-17 | Texas Instrument Incorporated | Method to produce known good die using temporary wire bond, die attach and packaging |
US6121358A (en) * | 1997-09-22 | 2000-09-19 | The Dexter Corporation | Hydrophobic vinyl monomers, formulations containing same, and uses therefor |
US5924003A (en) * | 1997-11-14 | 1999-07-13 | Kinetrix, Inc. | Method of manufacturing ball grid arrays for improved testability |
KR19990065532A (ko) * | 1998-01-14 | 1999-08-05 | 구본준 | Cob형 반도체 패키지의 제조방법 |
US6241907B1 (en) * | 1998-12-09 | 2001-06-05 | Advanced Micro Devices, Inc. | Method and system for providing a package for decapsulating a chip-scale package |
US6221682B1 (en) * | 1999-05-28 | 2001-04-24 | Lockheed Martin Corporation | Method and apparatus for evaluating a known good die using both wire bond and flip-chip interconnects |
JP2002033362A (ja) * | 2000-07-17 | 2002-01-31 | Matsushita Electric Ind Co Ltd | 半導体検査装置 |
US6787708B1 (en) | 2000-11-21 | 2004-09-07 | Unisys Corporation | Printed circuit board debug technique |
JP2002162450A (ja) * | 2000-11-22 | 2002-06-07 | Mitsubishi Electric Corp | 半導体集積回路の試験装置および半導体集積回路の試験方法 |
US6534392B1 (en) * | 2001-09-14 | 2003-03-18 | Tessera, Inc. | Methods of making microelectronic assemblies using bonding stage and bonding stage therefor |
US7656173B1 (en) | 2006-04-27 | 2010-02-02 | Utac Thai Limited | Strip socket having a recessed portions in the base to accept bottom surface of packaged semiconductor devices mounted on a leadframe for testing and burn-in |
US7479409B2 (en) * | 2006-12-13 | 2009-01-20 | Stats Chippac Ltd. | Integrated circuit package with elevated edge leadframe |
US20080252330A1 (en) * | 2007-04-16 | 2008-10-16 | Verigy Corporation | Method and apparatus for singulated die testing |
US7901955B2 (en) * | 2007-06-25 | 2011-03-08 | Spansion Llc | Method of constructing a stacked-die semiconductor structure |
US20090166826A1 (en) * | 2007-12-27 | 2009-07-02 | Janducayan Omar A | Lead frame die attach paddles with sloped walls and backside grooves suitable for leadless packages |
US8063470B1 (en) * | 2008-05-22 | 2011-11-22 | Utac Thai Limited | Method and apparatus for no lead semiconductor package |
US8334764B1 (en) | 2008-12-17 | 2012-12-18 | Utac Thai Limited | Method and apparatus to prevent double semiconductor units in test socket |
US8680670B2 (en) | 2010-10-22 | 2014-03-25 | International Business Machines Corporation | Multi-chip module system with removable socketed modules |
CN113611623A (zh) * | 2021-07-29 | 2021-11-05 | 矽磐微电子(重庆)有限公司 | 芯片封装结构的良率测试方法 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3444619A (en) * | 1966-05-16 | 1969-05-20 | Robert B Lomerson | Method of assembling leads in an apertured support |
DE2840973A1 (de) * | 1978-09-20 | 1980-03-27 | Siemens Ag | Verfahren zur herstellung pruefbarer halbleiter-miniaturgehaeuse in bandform |
NL184184C (nl) * | 1981-03-20 | 1989-05-01 | Philips Nv | Werkwijze voor het aanbrengen van kontaktverhogingen op kontaktplaatsen van een electronische microketen. |
EP0163081B1 (fr) * | 1984-05-02 | 1990-01-17 | GTE Products Corporation | Procédé de fabrication d'une puce à circuit intégré encapsulée |
US4855672A (en) * | 1987-05-18 | 1989-08-08 | Shreeve Robert W | Method and process for testing the reliability of integrated circuit (IC) chips and novel IC circuitry for accomplishing same |
US4918385A (en) * | 1987-05-18 | 1990-04-17 | Hewlett-Packard Company | Method and process for testing the reliability of integrated circuit (IC) chips and novel IC circuitry for accomplishing same |
US5006792A (en) * | 1989-03-30 | 1991-04-09 | Texas Instruments Incorporated | Flip-chip test socket adaptor and method |
US5008615A (en) * | 1989-11-03 | 1991-04-16 | Motorola, Inc. | Means and method for testing integrated circuits attached to a leadframe |
JPH0715926B2 (ja) * | 1990-09-14 | 1995-02-22 | 株式会社東芝 | ワイヤボンディング検査装置 |
-
1993
- 1993-04-07 KR KR1019930005769A patent/KR960000793B1/ko not_active IP Right Cessation
-
1994
- 1994-04-05 FR FR9403967A patent/FR2703827B1/fr not_active Expired - Fee Related
- 1994-04-07 US US08/224,020 patent/US5548884A/en not_active Expired - Lifetime
- 1994-04-07 CN CN94103819A patent/CN1041149C/zh not_active Expired - Fee Related
- 1994-04-07 DE DE4411973A patent/DE4411973C2/de not_active Expired - Fee Related
- 1994-04-07 JP JP6069300A patent/JP2882747B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
FR2703827A1 (fr) | 1994-10-14 |
JPH077057A (ja) | 1995-01-10 |
DE4411973C2 (de) | 2003-07-03 |
US5548884A (en) | 1996-08-27 |
KR960000793B1 (ko) | 1996-01-12 |
JP2882747B2 (ja) | 1999-04-12 |
DE4411973A1 (de) | 1994-10-20 |
CN1098226A (zh) | 1995-02-01 |
CN1041149C (zh) | 1998-12-09 |
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