FR2699735A1 - Semiconductor current limiter for 500-2000 volts dc range - Google Patents

Abstract

The slightly doped n- silicon substrate (12) has two islands of doped p+ material (14,13) on its surface with a thin layer of p- material (11) in between. The region is highly resistive, being diffused with a dopant of between 0.5 and 4*10<1>2 atoms/sq cm . There is an outer ring of n+ material (17) surrounding the two islands.The voltage connection to one of the islands (B) and the ring (C) are joined so that if the voltage on B and C are slightly greater than that on the second island (A) limiting occurs via the intermediate high resistance zone, with breakdown prevented by the zone between the connector B and C.

Description

The present invention relates to a current limiting semiconductor device capable of withstanding a high bias voltage.

By high voltage, or high voltage, we will denote here voltages between 500 and 2000 volts.

The realization of current limiting devices for the control of electronic power switches usually supposes the use of a combination of elements such as an enrichment MOS transistor driven by a bipolar transistor with a network composed of resistors, a diode Zener and a capacity. Such a combination is expensive and bulky and, moreover, does not make it possible to withstand voltage beyond about 500 volts. Now, it is known that voltage withstand is one of the essential problems encountered in power electronics.

The object of the invention is to simplify and take up little space in a current limiting device while making it capable of withstanding a high bias voltage. Another object of the invention is to make it possible to easily associate with such a current limiting device an antiparallel diode with a high reverse bias voltage.

According to the invention, in an N-type semiconductor substrate, a highly resistive P-type region is provided which opens onto part of the main surface of the substrate, with a regular dose of dopants of between 0.5 and 4.1012 atoms.cm -2; in the high resistivity region are provided a first island and a second low resistive P + type island opening onto the main surface and supporting respective contact making layers. The high resistivity region has: - a lateral conduction zone located between the two islands to ensure the first worm
the second island the passage of a limited current, - a protection zone against breakdown in high voltage located around the second
small island.

The high resistivity region typically has a resistance per square of between 2 and 20 kn /
Preferably, a polarization electrode is provided on the main surface of the substrate, in ohmic contact with this surface, to polarize the substrate at a potential lower than that of the second island; the PN diode antiparallel to the first island - second island current path is thus neutralized or usable depending on the potential of the bias electrode.

It goes without saying that the types of P and N doping indicated can be substituted with one another.

The characteristics and advantages of the invention are explained in the following description of an embodiment in relation to the accompanying figures.

- Figure 1 illustrates in section the surface of a silicon substrate on which is formed the
high voltage current limiting device according to the invention.

- Figure 2 shows in more detail a preferred embodiment of the device.

- Figure 3 shows on a smaller scale in top view of the limiting device.

- Figure 4 shows the current i voltage characteristic of the device.

The unidirectional current limiting device shown is provided on a substrate 10 of lightly doped N-type silicon, of a type usually used for producing power components. The resistivity of the substrate is a function of the voltage to be blocked, for example 50 Q.cm for 1200 volts.

A highly resistive P- type region is formed so as to open onto a part of a main surface 12 of the substrate 10. The region 11 has a depth of 5 to 30 μm and it is doped with a dose of acceptors of between 0 , 5 and 4.1012 atoms.cm-2 to determine a resistance per square of 2 to 20 kÇ # / D. The desired dose is obtained by ion implantation followed by annealing.

Region 11 comprises a conduction zone Z1 between two low resistive P + type islands 13,14 and, around island 14, a high voltage breakdown withstand zone Z2. The conduction zone Z1 has a width I and a length L which help to define its resistance.

The doping of the islands is such that their resistance per square is between 10 and 100 Q / S and their depth is less than, equal to or - in this example - greater than that of region 11. The islands 13,14 receive respective metallizations. 15.16 contact.

The protection zone Z2 has a width which depends on the characteristics of the region 11, typically from 100 to 200 µm to block 1200 volts.

A region 17 of the N + type, heavily doped, for example with a concentration greater than 1018 atoms.cm-3, is provided on the surface 12 of the substrate 10 to bias the latter under a voltage lower than the voltage applied to the island. 14 via the metallization 16 in order to thus polarize in the forward direction the PN junction 18. The region 17 receives a metallization 19 for making contact.

The region 17 is continued around the periphery of the device (FIGS. 2 and 3) to produce an equipotential field ring 20 which makes it possible to stop the progression of the space charge zone. The oxide layer has been shown at 21.

Since the electrodes 16,15,19 are respectively referenced A, B, C (see FIG. 1), the operation of the device is as follows.

When the potential at C is equal to or slightly greater than the potential at B, itself greater than the potential at A, the device operates as a current limiter for the current flowing from B to A, the value of the limited current typically being included between 0.3 and 5 mA. B and C can then be interconnected to ensure the desired equality of potential.

When the potential at C is lower than the potential at B or at A, the diode formed by the junction 18 between the N- substrate 10 on the one hand and by the regions 11,13,14 on the other hand is forward biased. The current can therefore flow from A or B to C with a voltage drop of 0.7 volts in the diode.

FIG. 4 represents the current-voltage characteristic of the device when it operates as a limiter. Until the voltage reaches a Vp value between 20 and 40 volts, the current increases with a slope of 10 to 50 kΩ up to an Ip value between 0.3 and 5 mA.

Beyond Vp and up to a breakdown voltage Vb greater than 1200 volts, the current remains practically stabilized at the value Ip, its slope then being 500 kΩ.

Claims (5)

1. Semiconductor current limiting device, comprising - an N-type semiconductor substrate, - a highly resistive P-type region opening onto part of a surface main of the substrate, characterized by the fact that: - the high resistivity region (11) is produced with a dose of dopants included between 0.5 and 4.1012 atoms.cm-2; - in the high resistivity region (11) are provided a first island (13) and a second island (14) with low resistive P + type opening onto the main surface and supporting respective contact making layers (15,16), - the high resistivity region (11) presents: - a lateral conduction zone (Z1) located between the two islands (13,14) for ensure the passage of a limited current from the first to the second island, - a protection zone against high voltage breakdown (Z2) located around the second island (14). 2. Device according to claim 1, characterized in that the high resistivity region (11) has a resistance per square of between 2 and 20 kQ / B. 3. Device according to claim 1 or 2, characterized in that an electrode of polarization (18) is disposed on the main surface (12) of the substrate (10), in contact ohmic with this surface, to polarize the substrate to a potential lower than that of the second island (14). 4. Device according to claim 3, characterized in that the electrode (18) of substrate bias is connected to a ring (20) surrounding the device. 5. Device according to one of claims 1 to 4, wherein the types of doping N and P are substituted between them.