FR2687487B1 - SYSTEM FOR SHARING ACCESS TIME TO A MEMORY SHARED BETWEEN A PROCESSOR AND OTHER APPLICATIONS. - Google Patents

SYSTEM FOR SHARING ACCESS TIME TO A MEMORY SHARED BETWEEN A PROCESSOR AND OTHER APPLICATIONS.

Info

Publication number
FR2687487B1
FR2687487B1 FR9201881A FR9201881A FR2687487B1 FR 2687487 B1 FR2687487 B1 FR 2687487B1 FR 9201881 A FR9201881 A FR 9201881A FR 9201881 A FR9201881 A FR 9201881A FR 2687487 B1 FR2687487 B1 FR 2687487B1
Authority
FR
France
Prior art keywords
bus
processor
access
applications
access time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9201881A
Other languages
French (fr)
Other versions
FR2687487A1 (en
Inventor
Hubert Rinie
Gerard Douhet
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ALE International SAS
Original Assignee
Alcatel Business Systemes SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel Business Systemes SA filed Critical Alcatel Business Systemes SA
Priority to FR9201881A priority Critical patent/FR2687487B1/en
Priority to ES93400411T priority patent/ES2125313T3/en
Priority to DE69321498T priority patent/DE69321498T2/en
Priority to EP93400411A priority patent/EP0557197B1/en
Priority to AT93400411T priority patent/ATE172311T1/en
Publication of FR2687487A1 publication Critical patent/FR2687487A1/en
Application granted granted Critical
Publication of FR2687487B1 publication Critical patent/FR2687487B1/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605Handling requests for interconnection or transfer for access to memory bus based on arbitration

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Exchange Systems With Centralized Control (AREA)

Abstract

According to the invention, the system includes a processor (10) interacting, by means of a first bus (15), with a code memory (14). The processor (10) also interacts with a shared memory (12) and generates an access signal when it gains access to this code memory (14). Another application (11) must also be able to gain access to the shared memory (12) by means of a second bus (19). The system comprises an access manager (13) placed, between, on the one hand the first (15) and second (19) buses, and, on the other hand, a third bus (16), linked to the shared memory (12), the access manager (13) performing switching of the first bus (15) onto the third bus (16) when the access signal is absent, and a switching of the second bus (19) onto the third bus (16) when the access signal is present.
FR9201881A 1992-02-19 1992-02-19 SYSTEM FOR SHARING ACCESS TIME TO A MEMORY SHARED BETWEEN A PROCESSOR AND OTHER APPLICATIONS. Expired - Fee Related FR2687487B1 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
FR9201881A FR2687487B1 (en) 1992-02-19 1992-02-19 SYSTEM FOR SHARING ACCESS TIME TO A MEMORY SHARED BETWEEN A PROCESSOR AND OTHER APPLICATIONS.
ES93400411T ES2125313T3 (en) 1992-02-19 1993-02-18 SYSTEM FOR SHARING ACCESS TIMES TO A SHARED MEMORY BETWEEN A PROCESSOR AND OTHER APPLICATIONS.
DE69321498T DE69321498T2 (en) 1992-02-19 1993-02-18 Access time sharing system to memory shared by a processor and other applications
EP93400411A EP0557197B1 (en) 1992-02-19 1993-02-18 Access time sharing system to a memory shared by a processor and other applications
AT93400411T ATE172311T1 (en) 1992-02-19 1993-02-18 ACCESS TIME SHARING SYSTEM TO A MEMORY COMMON TO A PROCESSOR AND OTHER APPLICATIONS

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9201881A FR2687487B1 (en) 1992-02-19 1992-02-19 SYSTEM FOR SHARING ACCESS TIME TO A MEMORY SHARED BETWEEN A PROCESSOR AND OTHER APPLICATIONS.

Publications (2)

Publication Number Publication Date
FR2687487A1 FR2687487A1 (en) 1993-08-20
FR2687487B1 true FR2687487B1 (en) 1996-12-20

Family

ID=9426798

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9201881A Expired - Fee Related FR2687487B1 (en) 1992-02-19 1992-02-19 SYSTEM FOR SHARING ACCESS TIME TO A MEMORY SHARED BETWEEN A PROCESSOR AND OTHER APPLICATIONS.

Country Status (5)

Country Link
EP (1) EP0557197B1 (en)
AT (1) ATE172311T1 (en)
DE (1) DE69321498T2 (en)
ES (1) ES2125313T3 (en)
FR (1) FR2687487B1 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2283596B (en) * 1993-11-01 1998-07-01 Ericsson Ge Mobile Communicat Multiprocessor data memory sharing
JPH10283329A (en) * 1997-04-02 1998-10-23 Matsushita Electric Ind Co Ltd Memory exclusive control method
NO312926B1 (en) * 1999-07-20 2002-07-15 Ericsson Telefon Ab L M Communication over multimaster bus

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1091633B (en) * 1977-12-30 1985-07-06 Olivetti C Ing E C Spa DEVICE FOR THE MANAGEMENT OF DIRECT ACCESS TO THE MEMORY OF A COMPUTER
US4325116A (en) * 1979-08-21 1982-04-13 International Business Machines Corporation Parallel storage access by multiprocessors
JPS58192148A (en) * 1982-05-07 1983-11-09 Hitachi Ltd Operation processor
AT389014B (en) * 1983-09-30 1989-10-10 Schoellauf Hannes Ing CENTRAL UNIT WITH STORAGE
JPS62165263A (en) * 1986-01-17 1987-07-21 Fujitsu Ltd Memory control system

Also Published As

Publication number Publication date
EP0557197A1 (en) 1993-08-25
DE69321498T2 (en) 1999-04-01
ATE172311T1 (en) 1998-10-15
DE69321498D1 (en) 1998-11-19
FR2687487A1 (en) 1993-08-20
EP0557197B1 (en) 1998-10-14
ES2125313T3 (en) 1999-03-01

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Legal Events

Date Code Title Description
ST Notification of lapse