FR2678456A1 - Transmission detection method and circuit for differential bidirectional links - Google Patents

Abstract

In certain bidirectional transmissions, differential links (L, L*) are used, and sender (transmitter)/receivers (1) which supply differential measurement signals (V, V*), which are representative of the sending signals from a remote station. In order to reduce consumption, the electrical power supply to the transmitter/receivers (1) may be interrupted during periods of inactivity. The method consists in determining a threshold value with a value intermediate between the maximum and minimum values capable of being taken by the measurement signals (V, V*) and in supplying a transmission activity signal (VAL) resulting from the comparison between the measurement signals (V, V*) and the threshold value. The implementation circuit uses voltage comparators and may be an integrated circuit. Application especially to interconnection between the units of a computer system.

Description

Transmission detection method and circuit for bi-directional differential links The invention lies in the field of digital data transmissions between stations or units via bi-directional serial links of point-to-point type and using lines of communication. differential transmission.

These lines can be twisted pairs or coaxial cables connected at each end to a station by a transmitter and a receiver associated with the station.

For many applications, it is preferred to use a transmission mode allowing simultaneous transmission in the two stations in order to obtain better use of the lines.

As an example of a particularly suitable application, mention may be made of the interconnection between the units of a central computer subsystem comprising a large number of units. When the number of processors and memories becomes large, the bus solution for exchanging information between all these units is no longer suitable. It is therefore preferable, in this context, to use serial links connecting each unit to all the others so as to increase parallelism. Given the large number of links involved in such a system, the choice of bidirectional links of the type defined above is preferable.

From an implementation point of view, such bidirectional transmission requires at each station the presence of a transceiver connected to the lines by adaptation impedances. On the other hand, the receiving part includes means making it possible to deal with collisions, that is to say the cases where the transmitters of the two stations linked together transmit simultaneously on the common link. These means are designed to allow in all circumstances to detect from the electrical state of the line the existence and nature of the signals transmitted by the remote station.

To solve this problem, we usually use the principle of compensation in the receiver for the effect produced on the line by the transmitter of the same station when it transmits. Thus, in the event of transmission, a transmission signal is subtracted from the signal present on the line. The difference obtained is then representative of the signal transmitted by the transmitter of the remote station. This embodiment is for example described in European patent application EP-A-186142 entitled "Two-wire bi-directional digital transmission system.

Another solution is not to subtract from the line signal the transmission signal when the transmitter of the station considered transmits, but on the contrary to add, when the station does not transmit, the line signal to a compensation signal of the same polarity suitably chosen so that the resulting sum is representative of the only transmission signal from the other station.

Of course, these transmission and reception means are produced by means of electronic circuits which must be supplied electrically. However, to obtain fast circuits, we choose technologies using bipolar transistors, such as for example ECL technology. As a result, the energy consumption of the circuits at rest is not negligible and can cause excessive heating of the circuits.

Thus, in the example of the interconnection between a large number of units, it is advantageous to use integrated circuits to provide the interface between each unit and the others of the system. Each integrated circuit may therefore include a large number of transceivers, of which only a few are active simultaneously. All those who are at rest will therefore accumulate unnecessary consumption and heating.

To solve this problem, it is therefore desirable to be able to cut the power supply to the transceivers, or at least their power circuits, when they are not used either for transmission or for reception.

However, the possibility of cutting off the power to the transceivers still allows the transmissions to operate safely. Thus, in a station considered where the supply of a transceiver is cut, it must always be possible to detect whether the station to which this transceiver is connected transmits or not a signal, because if a signal is transmitted, it is then necessary to restore immediately supply the transceiver considered.

The invention therefore aims to solve this problem by proposing a transmission detection method suitable for two-way differential links and allowing the power supply to the transceivers to be cut.

More specifically, the subject of the invention is a transmission detection method for a transmission system using at least one transceiver connected by two differential transmission lines to another analog transceiver, said transceiver comprising amplification means. differential for producing differential transmission and reception signals, said amplification means comprising for each transmission line an adaptation impedance to the line and connected to the latter, a transmission signal generator controlled in response to transmission control signals supplying said impedance and said line in parallel and reception means for supplying a measurement signal which is representative of the algebraic sum of the current flowing in said adaptation impedance and of a compensation current such that said measurement signal practically depends only on the emission signals pr odored by the other transceiver, the supply of said amplification means being able to be activated or inhibited as a function of a supply control signal, said process being characterized in that it consists, in each transceiver, in determining a threshold value representative of a current of intermediate value between the maximum and minimum values that can be taken by the currents represented by said measurement signals, to compare the measurement signals of each line with said selected threshold value and to produce a signal representative of the activity of the transmission as a function of said comparisons, depending on whether said threshold value is included or not between the values of said measurement signals.

To determine whether or not the threshold value is between the values of the measurement signals, it can be checked whether one of the measurement signals represents a current greater in absolute value than the current represented by the threshold value. If so, the transmission is active.

Another possibility equivalent to the previous one consists in checking whether the measurement signals represent currents simultaneously lower in absolute value than the current represented by the threshold value. If this is the case, the transmission is inactive.

One or the other of the preceding possibilities may be chosen according to the ease of implementation, according to the context and the technology used. It can be noted that if the ECL technology is used, these two solutions lead to the same realization of the circuits.

The invention also relates to a transmission detection circuit intended to be associated with a transceiver of the type defined above and specially adapted to the implementation of the method according to the invention. This circuit will be characterized in that, said measurement signals being voltages, it comprises a voltage generator supplying said threshold value.

According to another aspect of the invention, the circuit is characterized in that it comprises two comparators for respectively comparing said measurement signals with said threshold value, the outputs of said comparators being applied to the input of a logic gate providing a signal representative of the activity of the transmission.

In some cases, a single threshold value is not sufficient to correctly detect the activity of the transmission. For example, if an addition compensation is used, the maximum and minimum values of the measurement signals will depend on the supply state of the amplification means.

To provide for this possibility and according to another aspect of the invention, the circuit is further characterized in that, in the case where said threshold value depends on the supply state of said amplification means of said transceiver, said voltage generator is a variable voltage generator controlled by said supply control signal.

The invention also relates to an integrated circuit comprising a plurality of transceivers of the type defined above. This integrated circuit includes means for activating or inhibiting the supply of the amplification means of each transceiver by a supply control signal and further comprises a transmission detection circuit according to the invention associated with each transmitter. receiver.

Other aspects, details of embodiment and advantages of the invention will be explained in the description which follows.

- Figure 1 is a schematic representation of a transmission-reception device using the detection method according to the invention.

- Figure 2 shows the transmission detection circuit.

- Figure 3 represents an achievement in technology
ECL of differential amplification means.

- Figure 4 represents an achievement in technology
ECL of the transmission detection circuit according to the invention.

- Figure 5 represents an achievement in technology
ECL of a circuit for shaping the output signals of the transceiver.

The assembly of FIG. 1 represents a transmission-reception device in which the method according to the invention is implemented. By way of nonlimiting example, it consists of a parallel-series, serial-parallel interface circuit which can be used to interconnect the units of a computer system. It will advantageously be produced in the form of an integrated circuit comprising a plurality of differential bi-directional transceivers.

In Figure 1, only one of the transceivers is shown. I1 consists of a bidirectional differential amplifier 1 with which there is associated a shaping circuit 4 and a transmission detector 5 according to the invention. Amplifier 1 has two differential input-output U, U each supplying in parallel an adaptation impedance R, R * and an associated line L, L *. The electrical connection between the adaptation impedances R,
R * and the lines L, L * is carried out by terminals B of the integrated circuit.

The amplifier 1 receives as input differential transmission control signals * e, e supplied by a transmission control signal generator 2 which is, for example, a serializer-deserializer connected by inputs / outputs parallel to a associated unit not shown.

The amplifier 1 supplies the differential measurement signals V, V * which are representative of the signals transmitted by another station connected to the end of the lines L, L *.

A power supply control circuit 3 supplies, under the control of the associated unit, AUTO signals controlling the power supply to the power circuits of each amplifier. The circuit 3 can advantageously also control the supply of the serializer 2.

The transmission detector 5 receives as input the measurement signals V, V * as well as the power supply control signal AUTO and supplies a signal VAL representative of an activity in transmission from the remote station.

A shaping circuit 4 receives the measurement signals V, V * and the activity signal VAL and supplies to the circuit 2 the differential reception signals s, s *.

The circuit of Figure 1 operates as follows: in normal operation, the transceivers of the station considered and of the remote station are supplied. In the event of a prolonged absence of information exchange between the two stations, each unit can send the power control circuit 3 the order to cut the power. If the power to the transceiver of the remote station is cut, this results in an absence of differential signal V, V * which is detected by circuit 5. It therefore places the signal VAL at 0. The circuit 4 then forces its outputs s and s * respectively to 0 and 1. On the other hand, the signal VAL is transmitted by the circuit 3 to the associated unit. Based on determined criteria, the unit can control the power cut to circuit 3 which in this case sets the AUTO signal to 0.

If the remote station starts to transmit again, the existence of a differential voltage V, V * is detected by the circuit 5 which then places the signal VAL at 1. The change of state of the signal VAL is detected by the circuit 3 which automatically maintains or restores the power supply to the amplifier 1 and the serializer 2 by setting the AUTO signal to 1. Furthermore, the signal VAL releases the shaping circuit 4 which then operates as a differential amplifier.

As we will see in detail in the following description, the AUTO input of circuit 5 is provided in the case where the levels V, V * depend on the supply state of the transceiver.

Figure 2 shows, in the form of a block diagram, the transmission detection circuit according to the invention.

It comprises a threshold generator 6 supplying a threshold value Vt as a function of the logic value of the signal AUTO. Two comparators C and C * compare the measurement signals V and V * respectively with the threshold value Vt. The outputs x and y of the comparators C and C * are applied to the input of a logic gate 7 whose output provides the activity signal VAL.

Before explaining the operation of Figure 2, it should be noted that each measurement signal V or V * is representative of the algebraic sum of a current flowing in the associated matching impedance R or R * and d a value compensation current such as the measurement signal V, V * practically depends only on the emission signals produced by the other transceiver. Furthermore, the threshold value Vt supplied by the generator 6 is representative of a current of intermediate value between the maximum and minimum values which can be taken by the currents represented by the measurement signals V, V *. , the inputs of comparators C and C * to which the signals V, V * and Vt are applied are chosen so that each output x or y takes the logic value 1 when the associated measurement signal V or V * represents a higher current in absolute value at the current represented by the threshold value Vt. In this case, the logic gate 7 is a gate
OR and its VAL output will take the logical value 1 when there is a differential signal V, V *.

As a variant, the inputs of the comparators C, C * could be inverted. Each output x or y then takes the logical value l when the measurement signal associates V or
V * represents a current lower in absolute value than the current represented by the threshold value. In this case, the gate 7 could be an AND gate providing an inactivity signal VAL *, complement of VAL. If, on the other hand, we
uses an NI gate, it will directly provide the signal
VAL.

As we will see in detail with reference to the figure
4, an achievement in ECL technology provides on its
differential output signals VAL and VAL
simultaneously.

Figure 3 shows a particular embodiment in ECL technology of a bi-directional amplifier
differential type. I1 has two channels arranged
symmetrically and connected respectively to lines L, L *
of the differential link. The associated left lane
at line L has an adaptation impedance R whose
a terminal is connected to the ground potential Vdd and whose
the other terminal is connected by the point U to the line L and
to the collector of a bipolar transistor Ti of which
the transmitter is connected to a first current source S1
common to both routes. The base of transistor T1 receives
the emission control signal e. The collector of
transistor TI is connected to the collector VO of a second
transistor T2 via an impedance r.La
base of transistor T2 receives signal e, complement of
e and its transmitter is connected to a second source of
current S2 common to both channels. Symmetrically, the
right channel has an adaptation impedance R *
one terminal of which is connected to ground and the other of which is
connected by point U * to line L and to the collector
a transistor T1 * whose emitter is connected to the source
of current S1. The collector of transistor Tî is connected
to the collector VO * of a second transistor T2 * by
through another impedance r. The transmitter of
transistor T2 * is connected to the second current source
S2. Transistors T1 and T2 receive respectively
on their bases the signals e and e. The signals e and e *
which constitute the differential control signals
are complementary and representative of a
determined logic value. They are in fact applied respectively on the basis of the transistors T2 * and T2 via resistors serving to compensate for the time constant due to the structural capacity of the impedances R and R
The current source S1 consists of a bipolar transistor T3 whose collector is connected to the emitters of the transistors TI and TI * and whose emitter is connected to the negative potential Vss via the drain-source path of a transistor NMOS N1. The base of transistor T3 is controlled by an adjustment voltage AI and the gate of transistor NI receives the power supply control signal AUTO. Similarly, the second current source S2 consists of a bipolar transistor T4 including the collector is connected to the emitters of the transistors T2 and T2 * and whose emitter is connected to the potential Vss via a resistor rl. The base of the transistor T4 is connected to a bias voltage Vref via the drain-source path of an NMOS transistor N2 whose gate is controlled by the signal AUTO. Collectors
VO and V0 * of transistors T2 and T2 * are respectively connected to the input of emitter-followers consisting respectively of a transistor T5 and T5 * and of an NMOS transistor, mounted in resistance, connecting the emitter of the bipolar transistor at potential Vss, the collectors of transistors T5 and T5 * being connected to ground. The emitters of the transistors T5 and Tu * constitute the differential outputs V, V of the amplifier.

The values of the impedance r and of the currents i and I are chosen so as to verify the relation: ri = RI / 2 so that the voltages at the point VO and VO * practically depend only on the transmission signals of the distant station . Advantageously, a servo circuit (not shown) acting on the current will be provided.
I by the adjustment voltage AI as a function of the difference between ri and RI / 2.

To explain the operation of the circuit of figure 3, we will use the convention of the positive logic, according to which a signal takes the value 1 logic when the corresponding voltage is high compared to the negative fixed potential Vss. Furthermore, a differential signal * such as e, e is assumed to take the logical value * 1, when e = 1 and e = 0.

In normal operation, the AUTO signal is equal to 1.

The current sources S1 and S2 are therefore active and debit the currents I and i respectively. If the differential emission control signal e, e is at 1, the * transistor TI is on and the transistor Tî is blocked. As the adaptation impedance R has in principle a value equal to the characteristic impedance of the line L, the transistor Tl injects into the adaptation impedance R and into the line a current close to I / 2.

If the distant station is itself active, that is to say if the bidirectional amplifier connected to the end of the lines L, * is supplied, a current practically equal to
I / 2 (to the nearest loss) is injected into one of the impedance R or R according to the logic value of the differential emission control signal applied to the remote amplifier.

On the other hand, the transistor T2 is made passing by the signal e = 1 applied to its base while the transistor
T2 is blocked by the signal e = 0 on its base. A current i is thus injected into the resistance r of the right branch. As I, i and r are chosen so as to have the relation ri = RI / 2, the voltages with respect to the points VO and V0 will take respectively the values -RI and -RI / 2 or -RI / 2 and -RI according to the logic value of the remote station differential transmit control signal. It can easily be verified that VO and VO * take the same values when the logic value of the differential transmission control signal e, e is at 0.

If the two stations are at rest, no current supplies the impedances R and R. The voltages relative to the mass at points VO and VO are therefore zero.

If, on the other hand, only the remote station is at rest, the voltages at points VO and VO * simultaneously take the value -R.I / 2.

If, finally, only the station considered is at rest, the voltages at point VO and VO * will respectively take the values -RI / 2 and 0 or O and -RI / 2 according to the logic value of the differential signal for controlling transmission of remote station.

Thus, if a first threshold value equal to -RI / 4 or -3R.I / 4 is chosen depending on whether the station considered is respectively inactive or active, it is possible to detect the transmission activity by comparing the voltages at the point VO and VO * at this threshold value, the activity being established when the voltage at one of the points VO and Vu * is lower in algebraic value than this threshold value. Equivalently, the inactivity of the transmission can be established if the two voltages VO, VO * are simultaneously greater than this threshold value.

It can be noted that only one threshold would be necessary in the case where the bidirectional amplifier carries out the compensation by subtraction which was mentioned previously.

The emitter-follower circuits T5 and T5 which serve as an impedance adapter supply the voltages V and V which are applied to the differential inputs of the transmission detection circuit 5 produced in ECL technology and represented in FIG. 4.

The circuit of FIG. 4 is essentially composed of two voltage comparators C and C associated respectively with the signals V and V *, a threshold voltage generator 6 and a logic gate 7.

The voltage generator 6 comprises a bipolar transistor T6 whose base receives a bias voltage Vref and whose collector Vto is connected to the ground potential Vdd via a first resistor RI. Its transmitter is connected to the negative potential Vss via the circuit formed by a second resistor R2 connected in parallel with the series circuit formed by a third resistor R3 and the drain-source path of an NMOS transistor N3 including the gate receives the AUTO signal. The resistor R3 and the transistor N3 are thus equivalent to a resistor which can be connected or disconnected from the potential Vss as a function of the signal AUTO. This equivalent resistance therefore has a value r3 equal to the sum of the resistance R3 and the resistance of the drain-source path of the transistor
N3.The choice of resistors R1, R2, r3 will allow two voltage levels Vto corresponding to the two threshold values to be established.

Thus, the dimensioning of the generator 6 can be carried out as follows. Generally, the value of the RI product is a data which fixes the dynamics of the signals of the transceiver. On the other hand, the bias voltage Vref applied to the base of the transistor T6 is the same as that applied to the base of the transistor
T4 of the second current source 52 of the amplifier.

Consequently, the emitter voltage of transistor T6 is fixed at the value Vref offset from the practically constant base-emitter voltage drop of transistor T6.

Thus, the voltage Ve across the resistor R2 is fixed and equal to the voltage across the resistor rl of the current source S2.

We have seen with reference to FIG. 3 that the two threshold values to be used for this particular embodiment were the voltages relative to the mass equal to -3R.I / 4 and -RI / 4 depending on whether the amplifier is powered or no. Consequently, the resistors Rl, R2 and r3 will have to check the following equations (1) (R1 / R2) .Ve = RI / 4 (2) R1. (1 / R2 + 1 / r3) .Ve = 3R.I / 4
We deduce r3 = R2 / 2 and R1 = R2.RI / 4Ve
If moreover we choose rl = r and as ri = RI / 2, we have
Ve = RI / 2 and therefore R1 = R2 / 2.

Thus, by controlling the current I of the current source S1 by means of the basic voltage AI of the transistor T3 so as to permanently maintain the relation ri = RI / 2, the threshold voltage Vt0 supplied by the generator 6 will take the two desired values independently of fluctuations in supply voltages and manufacturing dispersions.

The threshold voltage vto is applied to the input of the comparators C and C via an emitter follower comprising the transistor T7 whose collector is connected to ground and whose emitter is connected to the potential Vss by the resistance of the drain-source path of an NMOS transistor mounted in resistance. The emitter of transistor T7 supplies the voltage Vt which is equal to the voltage Vto offset by the base-emitter voltage drop of transistor T ?. This voltage offset corresponds exactly to the offset between the voltages V and VO or V and V0 of the amplifier in Figure 3. Thus, the voltages Vt, VO and VO * can be applied directly to the input of the comparators C and C
With the exception of their output stages, the comparators
C and C * have identical constitutions. We will therefore only describe comparator C, each homologous element of comparator C * having the same reference sign with which the symbol is associated
Comparator C comprises two transistors T8, T9 connected to each other by their emitter and whose collectors are each connected to ground via a resistor. I1 includes a current source formed by transistor T10, the emitter of which is connected to the negative potential Vss via a resistor, its collector being connected to the emitters of transistors T8 and T9 and its base receiving the bias voltage
Vref. The collectors of transistors T8 and T9 are respectively connected to the inputs of emitter-follower circuits consisting respectively of transistors T11,
T12 and T13, T14 as well as NMOS transistors mounted in resistors. The collector of transistor T8 is connected to the base of transistor T11 whose collector is connected to ground and whose emitter is connected to potential Vss via the transistor T12 mounted as a diode and the drain-source path of a NMOS transistor. The emitter follower associated with the transistor T9 is of identical constitution, the transistors T13 and T14 respectively playing the role of the transistors T11 and T12 of the preceding emitter-follower. The emitter-followers of the comparator C are of analogous constitution but do not comprise the transistors T12 and T14 whose role is to shift the voltages by a value equal to the base-emitter voltage of the bipolar transistors used in this circuit, so as to adapt the voltage levels to the downstream circuit 7.

The emitters of transistors T12 and T14, respectively x and x constitute the differential output of comparator C and the emitters y and y * of transistors T11 * and T13 constitute that of comparator C *. The points x, x, y and y are applied to the input of the gate OR ECL 7. It comprises two transistors T15, T16 connected together by their emitter and whose collectors are connected to ground by means of resistors . The collector of transistor T15 is connected to the collector of a third transistor T17, the emitter of which is connected to the emitter of a fourth transistor T18, the collector of which is connected to the emitters of transistors T15 and T16. The emitters of transistors T17 and T18 are connected to the collector of transistor T20, the emitter of which is connected to potential Vss via a resistor. The base of this transistor T20 receives the
* * bias voltage Vref. The points x, x, y and y are respectively connected to the bases of the transistors T17,
T18, T15, and T16. The collectors of transistors T16 and
T15 constitute the differential output of gate 7 and provide the differential activity signal VAL, VAL
The circuit of Figure 4 operates as follows. When the transceiver of the remote station is not supplied, the voltages V and V * are, relative to the ground, algebraically higher than the threshold value Vt. The transistors T8 and T8 are therefore conductive and the transistors T9 and T9 are blocked.

The transistors T11 and T11 are therefore blocked while the transistors T13 and T13 are conducting. Outputs
* * * differential x, x and y, y of the comparators C and C therefore take the logical value 0. T15 transistors and
T17 are therefore blocked and the transistors T16 and T18 are conducting. The voltage VAL of the collector of transistor T15 is equal to the ground potential Vdd and the voltage VAL of the collector T16 takes a lower value, which means that the differential signal VAL, VAL * represents the logic value 0.

If on the other hand, the remote station is active, only one of the voltages V or V * is lower than the threshold value
Vt. As a result, one of the transistors T15 or T17 is on and one of the transistors T16 or T18, respectively, is blocked. The differential output VAL,
VAL therefore takes the logical value 1.

FIG. 5 represents an embodiment of the shaping circuit 4 of the output signals of the transceiver.

This circuit is an AND gate in ECL technology composed of two transistors T21, T22 connected together by their transmitter and whose collectors are each connected to ground via a resistor. Two other transistors T23, T24 have their emitter connected to the collector of a fifth transistor T25, the emitter of which is connected to the potential Vss via a resistor. The collector of transistor T23 is connected to the emitters of transistors T21 and T22 while the collector of transistor T24 is connected to the collector of transistor T22. The base of transistor T25 receives the bias voltage Vref. The basics of transistors
T21 and T22 receive voltages V and V respectively.

The bases of the transistors T23 and T24 respectively receive the line activity signals VAL and VAL which are supplied by the circuit of FIG. 4 via a circuit for shifting the voltage levels not shown. The voltages s and s of the collectors of the transistors T21 and T22 constitute the differential reception signals usable downstream in the rest of the circuit.

Regarding the operation of the circuit of Figure 5, it is easy to verify that it operates as a differential amplifier when the differential signal
VAL, VAL takes the logical value 1 because the transistor T23 is on and the transistor T24 is blocked. If on the other hand, VAL, VAL takes the logical value 0, the transistor T23 is blocked and the transistor T24 is on. As a result, the signal s is in the low state and the signal s is in the high state, thus forcing the differential output of the circuit to the logic value 0.

Claims (9)

Claims: 1. Transmission detection method for transmission system using at least one transceiver connected by two differential transmission lines (L, L) to another analog transceiver, said transceiver comprising differential amplification means (1) for producing differential transmission and reception signals, said amplification means (1) comprising for each transmission line (L, L) an impedance (R, R *) for adaptation to the line and connected to it, a generator of transmission signals (T1, T1 *, SI) controlled in response to control signals d 'emission (e, e *) and supplying said impedance (R, R *) and said line (L, L *) and reception means (T2, T2 *, r, S2) for supplying a measurement signal (V, V *) which is representative of the algebraic sum of the current flowing in said adaptation impedance (R, R *) and a compensation current such that said measurement signal (V, V *) practically depends only on the emission signals produced by the other transceiver, the supply of said amplification means being able to be activated or inhibited as a function of a supply control signal (AUTO), said method being characterized in that it consists, in each transceiver, of determining a threshold value (Vt) representative of a current of value intermediate between the maximum and minimum values that can be taken by the currents represented by said measurement signals (V, V *), to compare the measurement signals of each line with said selected threshold value (Vt) and to produce a representative signal transmission activity (VAL, VAL *) ission according to said comparisons, depending on whether said threshold value (Vt) is included or not between the values of said measurement signals (V, V *). 2. Method according to claim 1, characterized in that an activity signal (VAL) is produced when one of said measurement signals (V, V) represents a current greater in absolute value than the current represented by said value of threshold (Vt). 3. Method according to claim 1, characterized in that an inactivity signal (VAL *) is produced when said measurement signals (V, V) represent currents simultaneously lower in absolute value than the current represented by said threshold value (Vt). 4. Transmission detection circuit for implementing the method according to one of claims 1 to 3 in a transceiver, characterized in that said measurement signals (V, V) being voltages, said detection circuit comprises a voltage generator (6) supplying said threshold value (Vt). 5. Circuit according to claim 4, characterized in that it comprises two comparators (C, C *) for respectively comparing said measurement signals (V, Vk) with said threshold value (Vt), the outputs of said comparators being applied at the input of a logic gate (7) supplying a signal (VAL, VAL *) representative of the activity of the transmission. 6. Circuit according to one of claims 4 or 5, characterized in that, in the case where said threshold value (Vt) depends on the power supply of said amplification means of said transceiver, said generator voltage (6) is a variable voltage generator controlled by said power control signal (AUTO). 7. Circuit according to claim 6, characterized in that said voltage generator (6) comprises a bipolar transistor (T6) whose base is biased by a fixed voltage (Vref), whose collector is connected to a first potential (Vdd ) via a first resistor (R1) and whose transmitter is connected to a second potential (Vss) via an assembly formed by a second resistor (R2) connected in parallel with a third resistance (R3, N3) can be disconnected in response to said power control signal (AUTO), the potential (Vto) of the collector of said transistor (T6) being representative of said threshold value (Vt). 8. Circuit according to claim 7, characterized in that said third resistor is produced by means of a resistor (R3) in series with a MOS transistor (N3) receiving on its gate said power supply control signal (AUTO). 9. Integrated circuit comprising a plurality of transceivers each connected by two differential transmission lines (L, L) to another analog transceiver, said transceivers comprising differential amplification means for producing differential transmission signals and receiving on said lines, said amplification means comprising for each line an impedance (R, R *) for adaptation to the line and connected to the latter, a generator of transmission signals (T1, T1, Sî ) controlled in response to transmission control signals (e, e and supplying in parallel said impedance (R, R *) and said line (L, L *> and reception means (T2, T2 r, S2) to provide a measurement signal (V, V *) which is representative of the algebraic sum of the current flowing in said matching impedance (R, R *) and of a compensation current such as said measurement signal (V, V *) practically depends only on emission signals produced by the other transceiver, said integrated circuit being characterized in that it comprises means (3, SI, S2) for activating or inhibiting the supply of said amplification means of each transceiver by a power control signal (AUTO) and in that it comprises a transmission detection circuit (5) associated with each transceiver and in accordance with one of claims 4 to 8.