FR2672434A1 - Fusible mos a claquage d'oxyde. - Google Patents

Fusible mos a claquage d'oxyde. Download PDF

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Publication number
FR2672434A1
FR2672434A1 FR9101090A FR9101090A FR2672434A1 FR 2672434 A1 FR2672434 A1 FR 2672434A1 FR 9101090 A FR9101090 A FR 9101090A FR 9101090 A FR9101090 A FR 9101090A FR 2672434 A1 FR2672434 A1 FR 2672434A1
Authority
FR
France
Prior art keywords
grid
zone
fuse according
cell
area
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR9101090A
Other languages
English (en)
French (fr)
Other versions
FR2672434B1 (enExample
Inventor
Kowalski Jacek C Ballot-Schmit
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Gemplus SA
Original Assignee
Gemplus Card International SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gemplus Card International SA filed Critical Gemplus Card International SA
Priority to FR9101090A priority Critical patent/FR2672434A1/fr
Publication of FR2672434A1 publication Critical patent/FR2672434A1/fr
Application granted granted Critical
Publication of FR2672434B1 publication Critical patent/FR2672434B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
FR9101090A 1991-01-31 1991-01-31 Fusible mos a claquage d'oxyde. Granted FR2672434A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR9101090A FR2672434A1 (fr) 1991-01-31 1991-01-31 Fusible mos a claquage d'oxyde.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9101090A FR2672434A1 (fr) 1991-01-31 1991-01-31 Fusible mos a claquage d'oxyde.

Publications (2)

Publication Number Publication Date
FR2672434A1 true FR2672434A1 (fr) 1992-08-07
FR2672434B1 FR2672434B1 (enExample) 1997-02-14

Family

ID=9409232

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9101090A Granted FR2672434A1 (fr) 1991-01-31 1991-01-31 Fusible mos a claquage d'oxyde.

Country Status (1)

Country Link
FR (1) FR2672434A1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5448187A (en) * 1992-11-18 1995-09-05 Gemplus Card International Antifuse programming method and circuit which supplies a steady current after a programming voltage has dropped

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3744036A (en) * 1971-05-24 1973-07-03 Intel Corp Electrically programmable read only memory array
GB2200795A (en) * 1987-02-02 1988-08-10 Intel Corp Eprom cell with integral select transistor
EP0387889A2 (en) * 1989-03-17 1990-09-19 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory
EP0408419A1 (fr) * 1989-07-13 1991-01-16 Gemplus Card International Utilisation d'une cellule MOS pragrammable électriquement pour réaliser un fusible
EP0432049A1 (fr) * 1989-12-07 1991-06-12 STMicroelectronics S.A. Fusible MOS à claquage d'oxyde tunnel programmable

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3744036A (en) * 1971-05-24 1973-07-03 Intel Corp Electrically programmable read only memory array
GB2200795A (en) * 1987-02-02 1988-08-10 Intel Corp Eprom cell with integral select transistor
EP0387889A2 (en) * 1989-03-17 1990-09-19 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory
EP0408419A1 (fr) * 1989-07-13 1991-01-16 Gemplus Card International Utilisation d'une cellule MOS pragrammable électriquement pour réaliser un fusible
EP0432049A1 (fr) * 1989-12-07 1991-06-12 STMicroelectronics S.A. Fusible MOS à claquage d'oxyde tunnel programmable

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5448187A (en) * 1992-11-18 1995-09-05 Gemplus Card International Antifuse programming method and circuit which supplies a steady current after a programming voltage has dropped

Also Published As

Publication number Publication date
FR2672434B1 (enExample) 1997-02-14

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Effective date: 20070930