FR2610451A1 - Opto-electronic device comprising at least one component mounted on a support - Google Patents
Opto-electronic device comprising at least one component mounted on a support Download PDFInfo
- Publication number
- FR2610451A1 FR2610451A1 FR8701138A FR8701138A FR2610451A1 FR 2610451 A1 FR2610451 A1 FR 2610451A1 FR 8701138 A FR8701138 A FR 8701138A FR 8701138 A FR8701138 A FR 8701138A FR 2610451 A1 FR2610451 A1 FR 2610451A1
- Authority
- FR
- France
- Prior art keywords
- component
- conductive
- layer
- support
- opto
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000005693 optoelectronics Effects 0.000 title claims abstract description 9
- 239000000758 substrate Substances 0.000 claims abstract description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 12
- 229910052710 silicon Inorganic materials 0.000 claims description 12
- 239000010703 silicon Substances 0.000 claims description 12
- 239000010931 gold Substances 0.000 claims description 7
- 239000000853 adhesive Substances 0.000 claims description 6
- 230000001070 adhesive effect Effects 0.000 claims description 6
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 6
- 229910052737 gold Inorganic materials 0.000 claims description 6
- 238000003466 welding Methods 0.000 claims description 5
- 229910052790 beryllium Inorganic materials 0.000 claims description 3
- 239000013078 crystal Substances 0.000 claims description 3
- 239000007787 solid Substances 0.000 abstract 2
- 239000004020 conductor Substances 0.000 abstract 1
- VJRVSSUCOHZSHP-UHFFFAOYSA-N [As].[Au] Chemical compound [As].[Au] VJRVSSUCOHZSHP-UHFFFAOYSA-N 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- ZCYVEMRRCGMTRW-UHFFFAOYSA-N 7553-56-2 Chemical compound [I] ZCYVEMRRCGMTRW-UHFFFAOYSA-N 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- JVPLOXQKFGYFMN-UHFFFAOYSA-N gold tin Chemical compound [Sn].[Au] JVPLOXQKFGYFMN-UHFFFAOYSA-N 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- PNDPGZBMCMUPRI-UHFFFAOYSA-N iodine Chemical compound II PNDPGZBMCMUPRI-UHFFFAOYSA-N 0.000 description 1
- 229910052740 iodine Inorganic materials 0.000 description 1
- 239000011630 iodine Substances 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/02—Structural details or components not essential to laser action
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/492—Bases or plates or solder therefor
- H01L23/4924—Bases or plates or solder therefor characterised by the materials
- H01L23/4926—Bases or plates or solder therefor characterised by the materials the materials containing semiconductor material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0203—Containers; Encapsulations, e.g. encapsulation of photodiodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/40—Materials therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1203—Rectifying Diode
- H01L2924/12036—PN diode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Optics & Photonics (AREA)
- Manufacturing & Machinery (AREA)
- Led Device Packages (AREA)
Abstract
Description
DISPOSITIF OPTO-ELECTRONIQUE COMPRENANT AU MOINS UN COMPOSANT
MONTE SUR UN SUPPORT
La présente invention a pour objet un dispositif opto-électronique comprenant au loins un composant opto-électronique présentant une face de substrat et une face active comportant au loins une région active, ledit composant étant monté solidaire d'un support par ladite face active de lanière à étre en contact électrique avec celui-ci.OPTO-ELECTRONIC DEVICE COMPRISING AT LEAST ONE COMPONENT
MOUNTED ON A SUPPORT
The present invention relates to an opto-electronic device comprising at least an opto-electronic component having a substrate face and an active face comprising at least an active region, said component being mounted integral with a support by said active strip face to be in electrical contact with it.
Une telle technique de pontage encore appelée à jonction vers le bas est couraient employée pour ~ponter des composants opto-électroniques tels que des diodes électroluminescentes, des diodes lasers, des photodiodes etc..., par collage (époxy par exemple) ou soudage (or-étain etc...) directelent sur un support tel qu'un boitier ou une enbase en céramique ou en siliciums Un tel ~pontage permet également d'assurer si nécessaire, par exemple dans le cas des diodes laser, un bon contact thermique avec le support. Such a bridging technique also called junction down is used to bridge optoelectronic components such as light emitting diodes, laser diodes, photodiodes etc ..., by bonding (epoxy for example) or welding ( gold-tin etc ...) directelent on a support such as a case or a ceramic or silicon base Such bridging also ensures if necessary, for example in the case of laser diodes, good thermal contact with the support.
Ce ~pontage jonction vers le bas a cependant pour inconvénient que la jonction, du fait de sa proximité avec le support peut se trouver court-circuitée sur les bords du com- posant par migration de colle ou de soudure. This ~ bridging junction downwards, however, has the disadvantage that the junction, due to its proximity to the support can be short-circuited on the edges of the component by migration of glue or solder.
L'invention a pour objet un dispositif opto-électronique du type précité permettant d'éviter un tel inconvénient. The invention relates to an opto-electronic device of the aforementioned type making it possible to avoid such a drawback.
Dans ce but, il est caractérisé en ce que ledit pontage solidaire est réalisé à l'aide d'une dalle conductrice électriqueîent, et de dimensions inférieures à celles dudit composant et solidaire du support et du composant entre lesquels elle est interposée de lanière à s'inscrire dans le pé rinètre du composant
La dalle conductrice peut être rendue solidaire du support et/ou du composant à l'aide d'une colle conductrice et/ou par soudage.For this purpose, it is characterized in that said integral bridging is carried out using an electrically conductive slab, and of dimensions smaller than those of said component and integral with the support and the component between which it is interposed from strap to s '' register in the component
The conductive slab can be made integral with the support and / or the component using a conductive adhesive and / or by welding.
La portion de la face active du composant sur laquelle est solidarisée la dalle conductrice peut être revêtue d'une preîière couche conductrice, par exemple une couche d'or-bérylliuî revêtue d'une première couche d'or. The portion of the active face of the component on which the conductive slab is secured may be coated with a first conductive layer, for example a layer of gold-beryllium coated with a first layer of gold.
Au noins une des faces de la dalle conductrice peut être revêtue d'au soins une deuxième couche conductrice, par exemple une couche d'or-arsenic revêtue d'une deuxième couche d'or. At least one of the faces of the conductive slab can be coated with care a second conductive layer, for example a layer of gold-arsenic coated with a second layer of gold.
Selon un iode de réalisation particulièreient avantageux, la dalle conductrice est une dalle de silicium fortelent dopé, de préférence un cristal de silicium
L'invention sera lieux comprise à la lecture de la description qui va suivre en liaison avec la figure unique qui représente un iode de réalisation de l'invention relatif au pontage d'un composant constitué par une diode électro-luni- nescente, sur un boîtier.According to a particular advantageous embodiment iodine, the conductive screen is a doped strong silicon screen, preferably a silicon crystal
The invention will be understood on reading the description which will follow in conjunction with the single figure which represents an iodine of embodiment of the invention relating to the bridging of a component constituted by an electro-luniscent diode, on a housing.
La diode électro-luîinescente de structure généra liment connue en soi est constituée par un substrat InP de type n+ référencé 1 de contour parallélépipédique revêtu sur une face dite supérieure d'une îétallisation 2 de contour extérieur parallélépipédique, en l'occurence composée d'une couche d'AuGe et d'une couche d'Au, et présentant une ouverture centrale 9 par laquelle s'effectue l'~ mission lumineuse. The electro-luinescent diode of a structure generally known per se is constituted by an n + type InP substrate referenced 1 of parallelepipedic contour coated on a so-called upper face with a metallization 2 of parallelepipedic external contour, in this case composed of a layer of AuGe and a layer of Au, and having a central opening 9 through which the ~ light mission takes place.
Du côté opposé å ladite face supérieure, le substrat 1 colporte plusieurs couches épitaxiales superposées, å savoir une couche InP de type n référencée 3, une couche en
InGaAsP de type n référencée 4i une couche en InP de type p référencée 5 dont l'interface avec la couche précédence constitue la jonction pn de la diode, et enfin une couche 6 en
InGaAsP de type p.On the side opposite to said upper face, the substrate 1 peddles several superposed epitaxial layers, namely an InP type n layer referenced 3, a layer in
N type InGaAsP referenced 4i a p type InP layer referenced 5 whose interface with the preceding layer constitutes the pn junction of the diode, and finally a layer 6 in
P-type InGaAsP.
La surface de la couche 6 est revêtue par une couche de Si02 7 de contour extérieur parallélépipédique et présentant une partie centrale replie par une couche ~métallique 8 colportant une couche d'or-béryllium et une couche d'or et s'étendant également sur la majeure partie de la couche 7. The surface of the layer 6 is coated with a layer of Si02 7 with a parallelepipedic external contour and having a central part folded over with a ~ metallic layer 8 peddling a layer of gold-beryllium and a layer of gold and also extending over most of layer 7.
La diode électro-luîinescente est montée, avec le substrat 1 dirigé vers le haut et la jonction entre les couches 4 et 5 dirigée vers le bas, sur une dalle de silicium constituée par un cristal de silicium forte en dopé n+ référencé 10 de manière à obtenir une faible résistivité, et revê- tu sur chacune de ses faces d'une couche îétallique, respectivexent 11 et 12, constituée d'une couche d'or-arsénic et d'une couche d'or. The light-emitting diode is mounted, with the substrate 1 directed upwards and the junction between the layers 4 and 5 directed downwards, on a silicon slab constituted by a strong silicon crystal in doped n + referenced 10 so as to obtain a low resistivity, and coat each of its faces with an metallic layer, respectively 11 and 12, consisting of a layer of arsenic gold and a layer of gold.
La dalle de silicium présente un contour extérieur plus petit que celui de la diode électro-luîinescente et est solidarisé par la couche métallique Il à la couche ~métallique 8 grâce à une couche de colle conductrice 20, de telle sorte que le périmètre de la dalle de silicium s'inscrive dans celui du composant. The silicon slab has a smaller outer contour than that of the electro-luinescent diode and is joined by the metal layer II to the ~ metallic layer 8 thanks to a layer of conductive adhesive 20, so that the perimeter of the slab of silicon fits into that of the component.
La dalle de silicium est solidarisée par sa couche métallique 12 à une surface conductrice 40 d'un boîtier 50 grâce à une couche de colle conductrice 25. The silicon wafer is secured by its metallic layer 12 to a conductive surface 40 of a housing 50 thanks to a layer of conductive adhesive 25.
L'autre contact de la diode électroluîinescente est pris sur la îétallisation 2 grâce à un fil 60
Du fait que la dalle de silicium a des dimensions plus petites que celles de la diode et s'inscrit dans son contour a pour effet que les dépassements 21 de la couche de colle conductrice 20 restent confinés à la face inférieure du composant, essentiellement sur la couche métallique 8 et ne débordent pas sur les faces latérales de la diode, auquel cas il y aurait eu un risque de court-circuit de la jonction p-n qui affleure sur celle-ci en 30.The other contact of the light-emitting diode is taken on metalization 2 by means of a wire 60
Due to the fact that the silicon wafer has dimensions smaller than those of the diode and is inscribed in its contour, the effect is that the projections 21 of the layer of conductive adhesive 20 remain confined to the underside of the component, essentially on the metal layer 8 and do not overflow on the lateral faces of the diode, in which case there would have been a risk of short-circuit of the pn junction which is flush with it at 30.
L'invention ne se limite pas au iode de réalisation décrit ci-dessus. En particulier, le composant peut être par exemple une diode laser, une diode électro-luminescente émet- tant par la tranche ou une photo-diode InGaAslInP à éclairement par le substrat. The invention is not limited to the embodiment described above. In particular, the component may for example be a laser diode, an electroluminescent diode emitting by the wafer or an InGaAslInP photo-diode with illumination by the substrate.
D'autre part, d'autres modes de solidarisation de la dalle conductrice avec le support ou le composant peuvent être envisagés tels que le soudage, de telle sorte que les court-circuits suceptibles d'être provoqués par des dépassevents tels que 21 soient évités. On the other hand, other methods of securing the conductive slab to the support or the component can be envisaged, such as welding, so that short-circuits liable to be caused by overhangs such as 21 are avoided. .
Claims (11)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR8701138A FR2610451B1 (en) | 1987-01-30 | 1987-01-30 | OPTO-ELECTRONIC DEVICE COMPRISING AT LEAST ONE COMPONENT MOUNTED ON A SUPPORT |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR8701138A FR2610451B1 (en) | 1987-01-30 | 1987-01-30 | OPTO-ELECTRONIC DEVICE COMPRISING AT LEAST ONE COMPONENT MOUNTED ON A SUPPORT |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2610451A1 true FR2610451A1 (en) | 1988-08-05 |
FR2610451B1 FR2610451B1 (en) | 1989-04-21 |
Family
ID=9347436
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR8701138A Expired FR2610451B1 (en) | 1987-01-30 | 1987-01-30 | OPTO-ELECTRONIC DEVICE COMPRISING AT LEAST ONE COMPONENT MOUNTED ON A SUPPORT |
Country Status (1)
Country | Link |
---|---|
FR (1) | FR2610451B1 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2003010833A2 (en) | 2001-07-23 | 2003-02-06 | Cree, Inc. | Flip chip bonding of light emitting devices and light emitting devices suitable for flip-chip bonding |
WO2006012339A1 (en) * | 2004-06-29 | 2006-02-02 | Intel Corporation | Micro or below scale multi-layered heteostructure |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR1542702A (en) * | 1967-09-05 | 1968-10-18 | Process for manufacturing alloy junction gallium phosphide light emitting diodes and diodes obtained by this process | |
JPS55123181A (en) * | 1979-03-15 | 1980-09-22 | Nec Corp | Lead frame for light emitting diode |
JPS5664484A (en) * | 1979-10-30 | 1981-06-01 | Toshiba Corp | Led device |
GB2103420A (en) * | 1981-06-30 | 1983-02-16 | Shinko Electric Ind Co | Gold-plated package for semiconductor devices |
US4581629A (en) * | 1983-06-17 | 1986-04-08 | Rca Corporation | Light emitting devices |
-
1987
- 1987-01-30 FR FR8701138A patent/FR2610451B1/en not_active Expired
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR1542702A (en) * | 1967-09-05 | 1968-10-18 | Process for manufacturing alloy junction gallium phosphide light emitting diodes and diodes obtained by this process | |
JPS55123181A (en) * | 1979-03-15 | 1980-09-22 | Nec Corp | Lead frame for light emitting diode |
JPS5664484A (en) * | 1979-10-30 | 1981-06-01 | Toshiba Corp | Led device |
GB2103420A (en) * | 1981-06-30 | 1983-02-16 | Shinko Electric Ind Co | Gold-plated package for semiconductor devices |
US4581629A (en) * | 1983-06-17 | 1986-04-08 | Rca Corporation | Light emitting devices |
Non-Patent Citations (2)
Title |
---|
PATENT ABSTRACTS OF JAPAN, vol. 4, no. 181 (E-37)[663], 13 décembre 1980; & JP-A-55 123 181 (NIPPON DENKI K.K.) 22-09-1980 * |
PATENT ABSTRACTS OF JAPAN, vol. 5, no. 125 (E-69)[797], 12 août 1981; & JP-A-56 64 484 (TOKYO SHIBAURA DENKI K.K.) 01-06-1981 * |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2003010833A2 (en) | 2001-07-23 | 2003-02-06 | Cree, Inc. | Flip chip bonding of light emitting devices and light emitting devices suitable for flip-chip bonding |
WO2003010833A3 (en) * | 2001-07-23 | 2004-03-11 | Cree Inc | Flip chip bonding of light emitting devices and light emitting devices suitable for flip-chip bonding |
US6888167B2 (en) | 2001-07-23 | 2005-05-03 | Cree, Inc. | Flip-chip bonding of light emitting devices and light emitting devices suitable for flip-chip bonding |
US7259033B2 (en) | 2001-07-23 | 2007-08-21 | Cree, Inc. | Flip-chip bonding of light emitting devices |
CN100392874C (en) * | 2001-07-23 | 2008-06-04 | 克里公司 | Flip-chip bonding of light emitting devices and light emitting devices suitable for flip-chip bonding |
US7608860B2 (en) | 2001-07-23 | 2009-10-27 | Cree, Inc. | Light emitting devices suitable for flip-chip bonding |
WO2006012339A1 (en) * | 2004-06-29 | 2006-02-02 | Intel Corporation | Micro or below scale multi-layered heteostructure |
US7560739B2 (en) | 2004-06-29 | 2009-07-14 | Intel Corporation | Micro or below scale multi-layered heterostructure |
Also Published As
Publication number | Publication date |
---|---|
FR2610451B1 (en) | 1989-04-21 |
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