FR2606566B1 - Procede d'initialisation pour un controleur de canal - Google Patents

Procede d'initialisation pour un controleur de canal

Info

Publication number
FR2606566B1
FR2606566B1 FR878713067A FR8713067A FR2606566B1 FR 2606566 B1 FR2606566 B1 FR 2606566B1 FR 878713067 A FR878713067 A FR 878713067A FR 8713067 A FR8713067 A FR 8713067A FR 2606566 B1 FR2606566 B1 FR 2606566B1
Authority
FR
France
Prior art keywords
channel controller
initialization method
initialization
controller
channel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR878713067A
Other languages
English (en)
Other versions
FR2606566A1 (fr
Inventor
Kenji Yahiro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of FR2606566A1 publication Critical patent/FR2606566A1/fr
Application granted granted Critical
Publication of FR2606566B1 publication Critical patent/FR2606566B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/4401—Bootstrapping
    • G06F9/4411—Configuring for operating with peripheral devices; Loading of device drivers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/177—Initialisation or configuration control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computer Security & Cryptography (AREA)
  • Multi Processors (AREA)
FR878713067A 1986-09-22 1987-09-22 Procede d'initialisation pour un controleur de canal Expired - Fee Related FR2606566B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22463786 1986-09-22

Publications (2)

Publication Number Publication Date
FR2606566A1 FR2606566A1 (fr) 1988-05-13
FR2606566B1 true FR2606566B1 (fr) 1993-04-30

Family

ID=16816830

Family Applications (1)

Application Number Title Priority Date Filing Date
FR878713067A Expired - Fee Related FR2606566B1 (fr) 1986-09-22 1987-09-22 Procede d'initialisation pour un controleur de canal

Country Status (3)

Country Link
US (1) US4882672A (fr)
JP (1) JPH0821009B2 (fr)
FR (1) FR2606566B1 (fr)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0831074B2 (ja) * 1987-11-25 1996-03-27 株式会社日立製作所 チャネル制御方式
GB8825764D0 (en) * 1988-11-03 1988-12-07 Lucas Ind Plc Computer memory addressing system
WO1991019244A1 (fr) * 1990-06-04 1991-12-12 3Com Corporation Procede destine a optimaliser le logiciel pour n'importe laquelle d'une multiplicite d'architectures variables
US6116768A (en) * 1993-11-30 2000-09-12 Texas Instruments Incorporated Three input arithmetic logic unit with barrel rotator
DE19952034A1 (de) * 1999-10-28 2001-05-10 Infineon Technologies Ag Verfahren zum Initialisieren oder Konfigurieren einer elektrischen Schaltung

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3839706A (en) * 1973-07-02 1974-10-01 Ibm Input/output channel relocation storage protect mechanism
CA1081855A (fr) * 1976-04-29 1980-07-15 David B. Schuck Methode d'initialisation pour systeme de traitement de l'information a bus utilisant des modules microprogrammes
JPS6013501B2 (ja) * 1978-09-18 1985-04-08 富士通株式会社 仮想計算機システムにおけるチヤネルアドレス制御方式
US4418382A (en) * 1980-05-06 1983-11-29 Allied Corporation Information exchange processor
US4779189A (en) * 1985-06-28 1988-10-18 International Business Machines Corporation Peripheral subsystem initialization method and apparatus
US4737906A (en) * 1985-09-27 1988-04-12 International Business Machines Corporation Multiple virtual control unit
US4742447A (en) * 1986-01-16 1988-05-03 International Business Machines Corporation Method to control I/O accesses in a multi-tasking virtual memory virtual machine type data processing system

Also Published As

Publication number Publication date
JPS63184147A (ja) 1988-07-29
FR2606566A1 (fr) 1988-05-13
JPH0821009B2 (ja) 1996-03-04
US4882672A (en) 1989-11-21

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Legal Events

Date Code Title Description
ST Notification of lapse