FR2558643B1 - Substrat de cablage a couches multiples - Google Patents
Substrat de cablage a couches multiplesInfo
- Publication number
- FR2558643B1 FR2558643B1 FR8500926A FR8500926A FR2558643B1 FR 2558643 B1 FR2558643 B1 FR 2558643B1 FR 8500926 A FR8500926 A FR 8500926A FR 8500926 A FR8500926 A FR 8500926A FR 2558643 B1 FR2558643 B1 FR 2558643B1
- Authority
- FR
- France
- Prior art keywords
- wiring substrate
- layer wiring
- layer
- substrate
- wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4664—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5383—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1074784A JPS60154596A (ja) | 1984-01-23 | 1984-01-23 | 多層配線基板 |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2558643A1 FR2558643A1 (fr) | 1985-07-26 |
FR2558643B1 true FR2558643B1 (fr) | 1987-11-13 |
Family
ID=11758897
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR8500926A Expired FR2558643B1 (fr) | 1984-01-23 | 1985-01-23 | Substrat de cablage a couches multiples |
Country Status (2)
Country | Link |
---|---|
JP (1) | JPS60154596A (fr) |
FR (1) | FR2558643B1 (fr) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5127986A (en) * | 1989-12-01 | 1992-07-07 | Cray Research, Inc. | High power, high density interconnect method and apparatus for integrated circuits |
US5185502A (en) * | 1989-12-01 | 1993-02-09 | Cray Research, Inc. | High power, high density interconnect apparatus for integrated circuits |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3029382A1 (de) * | 1980-08-01 | 1982-03-04 | Siemens AG, 1000 Berlin und 8000 München | Aufbau von metallschichten und verfahren zur herstellung dieses aufbaus |
JPS57126154A (en) * | 1981-01-30 | 1982-08-05 | Nec Corp | Lsi package |
-
1984
- 1984-01-23 JP JP1074784A patent/JPS60154596A/ja active Pending
-
1985
- 1985-01-23 FR FR8500926A patent/FR2558643B1/fr not_active Expired
Also Published As
Publication number | Publication date |
---|---|
FR2558643A1 (fr) | 1985-07-26 |
JPS60154596A (ja) | 1985-08-14 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |