FR2548841A1 - Electronic trip for differential circuit breaker equipped with a tripping indicator - Google Patents

Abstract

The invention relates to a self-current electronic trip associated with a differential circuit breaker. A first control system 22 with timed or instantaneous tripping circuits drives, in the event of an overload or short-circuit, the firing of a thyristor Th1 in series with the trip relay 20. A second control system 24 with residual differential current detector DDR is configured to apply the differential trip signal directly to the terminals of the relay 20. The trip indicator 40 includes a priority logic circuit co-operating with a disabling circuit intended for avoiding erroneous display of a differential alarm in the event of tripping caused by the first system 22. Application: circuit breaker or electronic relay.

Description

ELECTRONIC TRIGGER FOR DIFFERENTIAL CIRCUIT BREAKER EQUIPPED WITH
TRIGGER INDICATOR
The invention relates to an electronic release of a differential circuit breaker for protecting a network or an alternating current installation, comprising: - a first control system with own current for protection against overload currents and da short circuit, constituted by a timed trip circuit, in particular long delay, R and short delay CR, and / or an instantaneous trip circuit INST; - a second control system with own current for protection against earth faults, comprising a differential trip circuit equipped with a DDR residual current detector; - a relay actuated by one of the control systems to ensure the triggering of the mechanism and the opening of the circuit breaker contacts when a fault is detected; - a static switching device for energizing the relay control coil; - and an alarm circuit formed by an indicator connected by conductors to the different outputs A, B, C and D of tripping circuits of the two control systems to signal to the user the nature of the tripping of the circuit breaker
A known trigger of the kind mentioned is described in French Patent No. 2,479,556 in which the excitation of the relay is effected by means of a static organ in parallel, piloted by the long delay, short trigger circuits. delay and differential of the two control systems with own current. The output of each trip circuit is connected to a specific indicator which signals the nature of the trip.

According to French patent N 2.501.929, the trigger relay is selectively energized via two separate thyristors, one being driven by the long delay and short delay trigger circuits of the first system, and the other being made conductive by the differential trip circuit of the second system.

The second control system for protection against earth leakage currents of these devices of the prior art has a complex structure which extends the tripping time of the circuit breaker and requires significant tripping energy.

This results in an increase in the volume of the differential transformer which is not compatible with the reduced size of the compact circuit breaker.

The present invention aims to remedy these drawbacks and allow the realization of a low caliber circuit breaker with simple and inexpensive electronic trip device, fitted with a selective trip indicator.

The trip device according to the invention is characterized in that the switching static is piloted by any of the time delay trigger circuits LR, CR or instantaneous INST of the first control system, and that the second control system is arranged to directly apply the signal differential trip across the relay.

The absence of an intermediate thyristor for energizing the relay during a differential tripping makes it possible to send the entire tripping signal of the second system at its own current in the control coil of the relay of the polarized 8 high sensitivity type. The static switching device piloted by the first system is connected in series with the relay, and is blocked during differential tripping.

The differential fault is displayed in the trip indicator by means of a connecting conductor advantageously connected to a common point of connection with one of the terminals of the relay coil. It is then noted that the voltage variation generated at the relay terminals during a triggering command by the first system is liable to display an erroneous differential alarm.

To avoid this faulty operation of the indicator, a priority logic circuit is electrically inserted in the V3 differential signaling signaling channel to prohibit the operation of the V3 channel display member in the presence of a signaling signal delivered by the first control system to the static switching member.

An inhibition circuit formed by a monostable flip-flop is intended to send a blocking order of a predetermined duration to the priority logic circuit in the event of a long-delay, short-delay or instantaneous trip signaled on other channels V1, V2 of the indicator.

Each channel V1, V2, V3 for signaling the indicator comprises a shaping input circuit, a memory circuit, in particular a double table rocker, capable of memorizing the fault, and a display member.

In the case where the display members are constituted by light-emitting diodes, the indicator is associated with an auxiliary supply by means of a switch or reversing contact actuated by the mechanism between two stable positions defined by two pads F, O corresponding respectively to the closing and opening of the circuit breaker. The passage of the switch from the first pad O to the second pad combines F when the circuit breaker recloses automatically causes all the memory circuits of the channels V1, V2, V3 to be reset to zero.

The light-emitting diodes of each channel are switched on by means of a logic circuit, one of the inputs of which is connected to the output of the corresponding block circuit, and the other input of which is connected to a multivibrator as table in connection with the first pad O of the switch. The memory circuits are reset to zero via a monostable flip-flop connected to the second plotF of the switch.

Other advantages and characteristics of the invention will emerge more clearly from the description which follows of an embodiment given by way of nonlimiting example and represented in the accompanying drawings in which - Figure 1 shows the diagram d 'an electronic trip device according to the invention, represented in the open position of the associated differential circuit breaker; - Figure 2 is a block view of the electronic circuit breaker trip indicator.

Figure 1 shows the electronic trip device 10 of a two-pole differential circuit breaker for protecting a single-phase AC network with neutral. The circuit breaker has a pair of movable contacts 12 inserted in the active phase L and neutral N conductors of the network respectively between the input terminals E1, EN and output S1, SN of the circuit breaker, and an actuation mechanism 14 for opening and closing of the contacts 12. The mechanism 14 is equipped with a manual control with trigger button 16 and reset button 18, and with an automatic opening command on fault controlled by an electromagnetic relay 20 of The relay 20 has a magnetic circuit polarized by a permanent magnet, a control coil supplied by the electronic trip device 10, and a movable armature intended to release the lock of the mechanism 14 during the excitation of the coil following a fault on the network.

The electronic trip device 10 comprises a first control system 22 for protection against overload and short-circuit currents, and a second control system 24 for protection against earth faults. The two systems 22, 24 are with own current and ensure the selective excitation of the trip relay 20 according to the nature of the fault current, without the use of auxiliary power sources.

The first control system 22 is of the type described in French patent application No. 82 16 712 of the applicant. I1 comprises a current sensor 26 for detecting the current flowing in the phase conductor L, and a shaping circuit 28 of the signal representing the current emitted by the sensor 26. The latter is formed by an intensity transformer at secondary winding 29 connected a rectifier 30 constituted by a diode bridge. Between the rectifier 30 and the circuit 28 is arranged a resistive bridge PR voltage divider with selector SC for the adjustment of the caliber. The shaping circuit 28 comprises - a circuit LR of delayed long time tripping comprising an operational amplifier A01 whose output A is connected by a diode D6 to the trigger of a thyristor Thl connected in series with the relay 20. the timing of the LR circuit is provided by the progressive charge of an AC capacitor through a resistor RA - a circuit Tripping delay CR with short delay formed by an operational amplifier AO2 whose output C is connected to the trigger of thyristor Thl via a diode D5. The timing of the CR circuit is shorter than that of the LS circuit.

The trip circuit CR intervenes in the event of an overload higher than that causing the trip with long delay; - possibly an INST circuit (not shown) instantaneous tripping agency between the rectifier 30 and the resistive bridge PR, and whose output B is connected to the trigger of the thyristor Thi.

The other electronic elements of the shaping circuit 28 are described in detail in the aforementioned patent application 82 16 712.

The operation of the shaping circuit 28 is conventional, the intervention of the relay 20 for triggering the mechanism 14 resulting from the conduction of the thyristor Thl causing the excitation of the control coil of the relay 20. The thyristor Thi is switched in the conductive state by any of the triggering orders issued by the circuits LR, CR and INST of the shaping circuit 28 following the appearance of an overload or short-circuit current in the network. The current sensor 26 simultaneously supplies the measurement signal to the shaping circuit 28 and the triggering energy to the relay 20.

The second control system 24 comprises a residual current detector DDR composed of a differential transformer with a magnetic core 32 crossed by the active conductors L, N, and a secondary winding 34 intended to supply a control signal when the sum of the currents circulating in the conductives L and N is different from zero. A capacitor C6 is connected in parallel on the one hand to the terminals of the secondary winding 34, and on the other hand a clipper circuit with a Zener diode D26, D28 mounted head-to-head.

The control signal of the winding 34 is generated by the detector
DDR following an earth fault is rectified by a rectifier D24 and is applied directly to relay 20 by a link circuit comprising two conductors 36, 38. The same relay 20 with single control coil is thus used selectively either by the circuit 28 of the first control system 22, or by the DDR differential detector of the second control system 24 to ensure automatic tripping of the circuit breaker. In the first case, the excitation of the relay 20 results from the conduction of the thyristor Thl piloted by one of the tripping circuits LR, CR and INST of the circuit 28. In the second case, the polarized relay 20 is supplied directly by the differential detector DDR while the thyristor Thl remains in the blocked state. The differential transformer of the DDR detector with its own current is arranged to deliver a control signal sufficient for the triggering energy of relay 20. The excitation of relay 20 takes place either in direct current (first system 22), or in current rectifies mono or bi-alternation (second system 24).

A trip indicator 40 is associated with the electronic trip device 10 to signal to the user the nature of the trip of the circuit breaker, following - a differential fault - an overload current - a short-circuit current
To this end, the different outputs A, B, C and D of the release 10 are connected respectively by conductors 42 A, 42 B, 42 C and 42 D to the input terminals LR 1, INST 2, CR 3 and DDR 4 of the indicator 40. The output D for signaling the differential fault is formed by one of the terminals of the trip relay 20 in connection with the anode of the thyristor Thlo
With reference to FIG. 2, the trigger indicator 40 comprises three light-emitting diodes D40, D15, D50 respectively signaling the long delay alarm (overload current), the short delay and instantaneous alarm (short current -circuit) and differential alarm (earth leakage current) .The three diodes D40, D15,
D50 are connected to the output of three channels V1, V2, V3 for signaling the fault each comprising a memory circuit 44, 46, 46 intended to memorize the fault when the corresponding trip circuit of trip device 10 has issued the order to trip to the relay. Note that part of the control signal appearing at the different outputs A, B, C, D (fig 1) of trip unit 10 is used to energize the trip relay 20, and that the other part of the signal used to signal the nature of the trigger in indicator 40.

An autonomous supply 50 of voltage V is capable of supplying the indicator 40 by means of a switch 52 or reversing contact actuated by the mechanism 14 of the circuit breaker. The switch 52 can occupy two stable positions 0, F corresponding respectively to the opening and closing of the circuit breaker. n position O of the switch 52 following a tripping of the relay 20, the diode associated with one of the channels V1, V2, V3 for signaling the fault, flashes or remains permanently on until the circuit breaker has been reset. In position F of the switch 52 following the closing of the circuit breaker, the memory circuit which signaled the fault is automatically reset leading to the extinction of the corresponding diode.

The indicator 40 is selective and insensitive to interference and it is obvious that the light-emitting diodes D40, D15, D50 could be replaced by any other signaling device, mechanical, light or sound, in particular a lamp or a miniature relay.

Each memory circuit 44, 46 48 of the signaling channels V1, V2,
V3 includes a sequential operator, including a flip-flop
JK of which one of the inputs cooperates with a circuit for shaping 54, 56, 58 of the control pulse coming from the outputs A, B, C and D of the trigger 10, and of which the other reset input is connected to a monostable flip-flop 60 for resetting to zero in connection with the pad F of the switch 52.

Each light-emitting diode D40, D15, D50 is inserted in series with a resistor R9, R23, R11, in the collector circuit of a transistor T5, T9, T6 whose emitter is connected to the pad O of the switch 52, and whose base is connected to the output of a Nana logic circuit N6, N13, N17 via a resistor R8, R22,
R10. One of the inputs of the logic circuit N6, N13> N17 is connected to the output of the memory circuit 44, 46, 48 of the corresponding channel V1, V2, V3, and the other input is in connection with a generator. pulses formed by way of example by an astable multivibrator 62 connected to the power supply 50 in position 0 of the switch 52.

Signaling of a long delay trigger.

When an overload current occurs involving the LR delayed long delay tripping circuit, the control signal taken from output A of the operational amplifier AOI is injected into the shaping circuit 54 of the channel V1 by the input terminal LRl of the indicator 40. The switch 52 is in position 0 after tripping of the circuit breaker. The memory circuit 44 memorizes the fault and controls the change of state of the logic circuit N6 to authorize the passage of the signals coming from the multivibrator 62. The intermittent unblocking of the transistor T5 authorizes the flashing of the diode D40 as long as the switch 52 remains on the pad O. The other two diodes DIS, D50 of the channels V2, V3 remain off. The reclosing of the circuit breaker causes the passage of the switch 52 on the pad F causing a reset of the memory circuit 44 and the extinction of the diode D40.

Signaling of a short delay or instantaneous trip.

This type of trigger is signaled by the V2 channel associated with the diode
D15. Channel V2 is common to the two sources of information coming from the outputs B and C of the trigger 10 and applied to the input terminals INST 2 and CR 3 of the indicator 40. A logic circuit OR 66 is connected to the setting circuit in form 56 for taking into account any one of the control signals corresponding either to an instantaneous triggering, or to a timed triggering with short delay. The memory circuit 46 registers the fault and controls the ignition of the diode D15 via the logic circuit Nî3.

The other two diodes D40 and D50 are off, and the reclosing phase of the circuit breaker is identical to that described above.

Signaling of a differential trip.

A differential trip detected by the DDR detector of the second control system 24 is signaled in channel V3 of the indicator 40 by means of the control pulse taken at point D connected directly to one of the terminals of the relay 20. The pulse enters the shaping circuit 58 via the DDR4 terminal and is memorized in the memory circuit 48 after passing through a priority logic circuit 68. The fault is signaled by the flashing of the DSO diode.

The function of the logic circuit 68 consists in prohibiting the ignition of the diode D50 of the channel V3 in the event of tripping of the relay 20 caused by any of the circuits LE, CR and INST of the first control system 22. The logic circuit priority 68 has a first input E31 connected by a conductor 70 to the output S of an inhibition circuit 72 formed by a monostable rocker, and a second input E32 in connection with the output of the shaping circuit 58 of the track V3. The two inputs El, E2 of the monostable inhibition circuit 72 are connected to the respective outputs of the two shaping circuits 54, 56 of the channels V1 and V2. The change of state from O to 1 of each input El, E2 of the monostable circuit 72 following a long delay, short delay or instantaneous trigger signaled on the channels V1, V2, brings the output S of the circuit 72 a state 1 for a predetermined duration, for example 30 ms. During this period, the inhibition circuit 72 blocks the priority logic circuit 68 to prevent the passage of any parasitic pulse coming from the shaping circuit 58. The memory circuit 48 is then inactive and the diode D50 remains off.

The selectivity of the indicator 40 due to the presence of the priority logic circuit 68 associated with the inhibition circuit 72 makes it possible to release parasitic pulses generated by bouncing of the relay 20 or by the influence of the trigger signals of the first system 22 on the toroid 32 of the differential transformer.

The differential fault is displayed by the diode D50 of channel V3 operates in position O of the reversing switch 52. The 2E zero reset of the memory circuit 48 by the monostable flip-flop 60 takes place automatically when the circuit breaker is reset, causing the switch 52 to move on the pad F and the diode 1) 50 to go out.

The technology of the various circuits making up the indicator 40 uses 2E specific integrated circuits intended to reduce the bulk and consumption.

The invention is of course in no way limited to the embodiment more particularly described and shown in the accompanying drawing, but it extends to any variant remaining within the framework of electronic equivalences.

Claims (10)

Claims 1 Electronic trip device (10) of a differential circuit-breaker for protecting a network or an alternating current installation, comprising: - a first control system (22) 2E own current for protection against overload and overcurrent short circuit. constituted by a timed tripping circuit, in particular 2E long delay LE and short delay CR, and / or an instantaneous tripping circuit INST; - a second control system (24) with its own current for protection against earth faults 2E, comprising a differential trip circuit equipped with a DDR residual current detector; - a relay (20) actuated by one of the control systems (22), (24) to trip the mechanism (14) and open the contacts (12) of the circuit breaker when a fault is detected 9 - a static switching element Th1 for excitation of the relay (20); - And an alarm circuit formed by an indicator (40) connected by conductors 42A, 42B, 42C, 42D to the different outputs A, B, B, CC and D of the tripping circuits of the two systems (22), (24 ) command to indicate to the user the nature of the tripping of the circuit breaker, characterized in that the static switching element Th1 is controlled by any of the timed tripping circuits LR, CR or instantaneous INST of the first control system (22), and that the second control system (24) is arranged to directly apply the differential trip signal to the terminals of the relay (20). 2. Electronic trip device according to claim 1, characterized in that the indicator (40) comprises a channel V3 for signaling the differential triggering by means of a display member D50, and that a priority logic circuit 68) is inserted electrically in said channel V3 to prohibit the operation of the display member D50 in the presence of a trigger signal delivered by the first control system (22) 2E the static switching member Thl. 3. Electronic trip device according to claim 2, characterized in that the indicator (40) comprises an inhibition circuit (72) intended to send a blocking order of a predetermined duration to the priority logic circuit (68) of the channel V3 following a long delay, short delay or instantaneous trigger signaled by the indicator (40) on other channels V1, V2 ..., each equipped with a display device, in particular D40 for the '2E long delay trip display, and 1) 15 for displaying a 2E short delay or instant trip. 4. Electronic trip device according to claim 3, characterized in that each channel V1, V2, V3, ... for signaling the indicator (40) is provided with a shaping input circuit (54), (56), (58) and a memory circuit (44), (46), (48) capable of memorizing the fault during the issuance of a trip order to the relay (20) by the trip circuit corresponding of the two control systems (22), (24), said priority logic circuit (68) being interposed between the shaping circuit (58) and the memory circuit (48) of the signaling channel V3 differential trigger. E31 blocking the priority logic circuit 68) of the channel V3, and whose input E1, E2 is connected to the output of the shaping circuit (54), (56) of the other channels V1, V2). 5. Electronic trip device according to claim 3 or 4, characterized in that the inhibition circuit (72) is formed by a monostable rocker whose output is connected by a conductor (70) to the input F, O corresponding respectively to the closing and opening of the circuit breaker, and that the passage of the switch (52) from the first pad O to the second conjugate pad F when the circuit breaker recloses automatically causes all the circuits to be reset to zero 2nd memory (44), (46), (48) of channels V1, V2, V3. 6. Electronic trip device according to one of claims 4 or 5, each display member D40, D15, D50 of the channels V1, V2, V3 being formed by a light-emitting diode, characterized in that the indicator (40) is associated with an auxiliary power supply (50) by means of a switch 52 or reversing contact actuated by the mechanism (14) between two stable positions defined by two studs 7. Electronic trip device according to claim 6, characterized in that the first pad Q of the switch (52) is in connection with a pulse generator, in particular a multivibrator (62), and that each channel V1, V2, V3 of l indicator (40) is provided with a logic circuit N6, N13, N17 for controlling the ignition of the diode D40, D15, D50, one of the inputs of the logic circuit N6, N13, N17 being connected to the multivibrator (62 ) and the other input being connected to the output of the corresponding memory circuit (44), (46), (48). 8, electronic trip device according to claim 6 or 7, characterized in that each memory circuit (44), (46), (48) is formed by a flip-flop of which one of the RESET inputs is connected to a flip-flop monostable (6 (reset, connected to the second pad F of the switch (52). D is confused or is at the potential of one of the terminals of the relay (20). 9. Electronic trip device according to one of claims l to 8, point D being connected to the indicator (40) by the conductor 42D for the display of the differential fault, characterized in that said point 10. Electronic trip device according to claim 9, characterized in that the point D is formed by a common point of connection of the relay (20) to the static switching member Thl.