FR2528248A1 - Panels for microelectronic systems mfr. - by applying circuit patterns to both sides of substrate - Google Patents

Abstract

Printed circuit board having at least two conductor layers is mfd. by (a) disposing two masks on the two opposed surfaces of or planar substrates using a metal etchable in a given etchant; (b) electrodepositing a first layer comprising a first conductor pattern including bridging elements on the first major surface through the first mask using metal impervious to the etchant; (c) electrodepositing a second such layer through the second mask onto the second major surface of the substrate, including conductor elements below and oriented transverse to the bridging elements again using metal impervious to the etchant, the bridging elements having enlarged ends and a contricted portion between thin-ends. Then (d) removing the masks, pre-etching the second surface, etching it to a depth of 0.01-0.5 times the width of the conductor elements of the second layer; (e) immersing the substrate with its two layers in the etchant for long enough to remove the exposed portions of the substrate below the constricted portions of the bridging elements throughout the entire thickness of the substrate at these points; (f) securing an adhesive layer of insulating material to the second layer so that this becomes embedded in the one major surface of the adhesive layer, and securing the other major surface of the adhesive layer to one major surface of a bse. Process is suitable for mfr. of large size multilayer panels whether rigid, flexible or with a built-in-base heat dissipator. The process reduces markedly the labour cost of mfr. Increased layout density can be achieved.

Description

 The present invention relates to the technology of microelectronic systems and, in particular, to the methods of manufacturing wafers usable in microelectronic systems.

 The wafers produced by such methods can serve as a basis for producing a variety of microelectronic systems from the point of view of their constructive complexity, including hybrid integrated circuits, functional modules, blocks and devices manufactured with the application of integrated circuits.

 The manufacture of microelectronic systems requires the interconnection of a considerable number of integrated circuit chips provided with a large quantity (of the order of a few tens) of external outputs. The problem in essence turns out to be more complicated since the number of external outputs of integrated circuits has been constantly increasing in recent years, and this increase will be continued as long as microelectronic systems produced on a single chip do not become an application. universal. Such a widespread application is not expected in the coming years, and the need to interconnect devices with multiple outputs will always increase. In order to solve this problem effectively, a board with at least two wiring levels must be available.

 The key moments of each of the manufacturing processes of the wafers with several wiring levels are the methods of carrying out the crossings, that is to say the wiring conductors which cross in the structure, but which are not connected to the to each other, as well as contacts between the above-mentioned wiring levels.

 Currently it is widely applied methods of manufacturing wafers making it possible to obtain the conductors belonging to the different levels of wiring insulated by a dielectric at the crossing points, these conductors being in contact at the desired points through holes made in the dielectric and filled wholly or partly with a conductive substance.

 This group includes processes for manufacturing double-sided and multilayer wafers, having metallized holes, processes for manufacturing thick layers and multilayer ceramics, as well as recently appeared processes for manufacturing multilayer bases from thin layers of '' an organic dielectric pressed on a metal substrate with a low coefficient of thermal expansion (see, for example, Ch.L. Lassen.

sought a new interconnection technology p. 113
121, "Electronics", vol. 52, NQ 20, 1979).

 The common feature of the processes in this group is the technology of growing layers on a dielectric basis, in which by such or such a process holes are made and filled with a conductive medium. It is thus necessary to make in the structure of a plate a large number of holes (reaching a few thousand) in the desired places, and to metallize them by such or such a process, to create there electrical contacts between the various levels of wiring. . This phase of manufacturing takes the greatest time and essentially predetermines the percentage of rejects during production, as well as breakdowns of the wafers, in service, given the difficulties linked to obtaining high reliability of the contacts between the Even when applying very advanced drilling methods, such as, for example, laser drilling, this operation is considered to be the most complicated, requiring high precision in positioning a blank and the use of a very expensive installation.

In cases where it is possible to make the holes and to metallize them by group processes, as for example, in multilayer ceramic structures, and by applying the methods of screen printing of the conductive and dielectric layers, the parameters of the conductors prove to be low for certain practical applications: there is a loss of precision in the geometrical dimensions of a plate and of relative arrangement of the contact areas and an increase in the electrical capacities and couplings between the mounting conductors (see, for example, ML Topfer, "Thick-Film Microelectronics",
Van Nostrand Reinhold Compang, New-York, 1971).

 Although the mounting plates with beam connections on metal supports satisfy, thanks to their mechanical and electrical characteristics, a range of requirements imposed on hybrid integrated circuits and other types of microelectronic systems, such intersections are not now found. wide use. This is linked to the particularities of the existing beam connection technology comprising twenty technological operations (see, for example, C.E.

Jowitt. The Ingeneering of Microelectronic Thin and Thick
Films, London, 1976).

 Such complexity and such an amount of time taken by this process are explained by the fact that the height of the intersections is defined by an auxiliary layer with a titanium-copper-titanium structure obtained by spray or electrochemical deposition above the wiring level. main, and then completely eliminated by chemical attack. For the supports in the auxiliary layer, holes are made by photolithography and by chemical etching, and then in a photoresist layer, a window for a connection beam, by forming the intersection itself by electrolytic deposition of gold. Such technology can be used successfully only to manufacture wafers, having a small area on rigid bases, which significantly limits their possibilities.

 Greater possibilities from the point of view of production of mounting pads of a larger area are presented by a metal substrate because the metal does not undergo any shrinkage, which is inherent in this or that measure to all types of flexible dielectrics .

 A method of producing wafers for hybrid integrated circuits is known, using a metal substrate (see Japanese patent, NO 52-551, cl. 99 (5) C21, 1977). In this process film conductors and pattern elements are formed by known methods on one side of a copper or iron substrate, then discrete elements spaced apart from the substrate are mounted and this side of the resin substrate is coated epoxy. Photolithography and pickling are then used to create support elements on the other face of the substrate, which will serve as outputs.

 The essential drawback of this process is the complexity and a large amount of time necessary for the manufacture of the intersections, the process ensuring in principle a single level of wiring, not making it possible to solve the problem of making the intersections, avoiding the operations said technologies.

There is also known a method of manufacturing an output frame for an electronic device, constituting a particular version of the production of a wafer (see Japanese patent, NO 48-36111, cl. 99 (5)
C21, 1974). This process consists in forming metallic conductors of the desired configuration on a substrate, in a metal then etched selectively with respect to the metal of conductors, which is formed on one face of the substrate and a base with several layers and that a selective attack is carried out, with respect to the conductors, of the substrate along its entire thickness.

 In this process, masking layers are deposited on the metal substrate, on the side opposite to the conductors, opposite the enlarged sections of the conductors, then by chemical attack, all except the conductors and the areas of metal substrate protected by the masking layers. Thus, the support elements formed by the metal substrate are separated from each other and connected to the narrow sections of the conductors made of precipitated metal.

 A drawback of this method, as of the method described above, lies in the complexity and in a large amount of time required for the realization of the intersections, therefore, of the wafers necessary for the production of modern microelectronic systems.

 The known methods thus aim at the solution of one of the two problems of producing wafers for microelectronic systems consisting either of obtaining a wafer with a large area and a low density of interconnections in the wiring (such or such type of printed wafer, or to obtain wafers with a small area, but with a high density of interconnections in the wiring (such and such a type of micromodules). As a result, at least two types are widely used in microelectronic systems which are very complex from the point of view of their construction. of wiring boards: the integrated circuits are assembled in micromodules, these being arranged together with auxiliary elements on a printed plate. It is then inevitable the existence of two stages of manufacture of the microelectronic systems and the use of two processes technological: that of manufacturing printed plates, and that of manufacturing hybrid structures with thin layers, this constitutes owing to a major flaw arising from the general level of interconnection technology that now exists.

 The object of the invention is to develop a method for producing wafers which can be used in microelectronic systems which would make it possible to produce mounting wafers of a single type with at least two wiring levels, while at the same time simplifying wafer technology.

 This object is achieved by virtue of the fact that in a process for producing wafers usable in microelectronic systems, consisting in that wafer conductors of desired configuration are formed on a metal substrate by selective etching with respect to the metal of the conductors, that the base of the wafer is obtained by superimposing the layers on one face of the substrate and that the substrate is treated according to the invention by selective etching with respect to the wires, throughout its thickness, the method is characterized in that conductors are formed on both sides of the substrate, and on the face of the substrate opposite to that where layers are formed by superposition, such conductors are formed which have at least a narrowed or thin section, and a selective stripping of the substrate is carried out Until complete removal of the metal from the substrate exclusively under the narrowed or thin sections.

 In order to obtain intersecting conductors, the respective conductors on the face of the substrate carrying the layers of the base can be formed in the areas of its surface lying opposite the narrowed or thin sections of the crossed conductors.

 It is useful to form the conductors having at least one narrowed or thin section so that the width of their narrowest section is commensurate with the thickness of the metal substrate, and more than twice the width of the sections of the conductors at the places of their connections on other wires.

 It is useful, before the formation of the base layers, to carry out a selective pickling with respect to the wires of the metal substrate at a depth adopted between 0.01 and 0.5 of the width of the wires and to carry out the annealing of the metallic substrate with the conductors made there.

 As the metal from which the substrate can be made, copper, iron, aluminum or alloys based on these metals can be used, and as the metal for the conductors, nickel, copper, , tin, or combinations of these metals.

 Between the substrate and the base of the wafer, during the formation of the layers forming the base, at least one dielectric layer is formed, it is then useful to produce this with holes made in the places of the wafer where the wafers will be located. elements giving off heat from the microelectronic system and / or at the locations of the connections to the next layer.

 It is most useful from the point of view of technology to form the base itself from a metal, a ready-made wafer or a metal substrate already carrying conductors made in accordance with the proposed method.

 The process pr x * idefRticatRe des plaquette brings together the technology of production of microcircuit wafers and printed wafers into a unique technology of wired wafers having more than two levels of wiring, while improving wafer technology.

In what follows the invention will be explained with the aid of a description of the nonlimiting examples of its implementation, with reference to the drawings, to which
- Figures la, b, c, d, e, f, g, h, show the implementation in stages of the wafer manufacturing process according to the invention;
- Figures 2a, b, c show by operations the formation of the layers constituting the base of a wafer, according to the invention;
- Figures 3a, b, c, d, e, show the implementation in stages of the method of manufacturing wafers having a metallodielectric base, according to the invention;
- Figures 4a, b, c, d, e, f, g, h, i, show the step-by-step implementation of the wafer manufacturing process, having a combined base, comprising a printed board with wiring of the ground circuits and " food ", according to the invention ;;
- Figures Sa, b, c, d, represent an example of application of the wafer in microelectronic systems with various embodiments of the external and internal outputs together with the wiring during a single technological cycle.

 The method of manufacturing wafers for use in microelectronic systems consists in first forming wafer conductors of a desired configuration on a substrate made of a metal removed by selective pickling with respect to the metal of the conductors.

 Such conductors can be produced by two methods, the first of which consists in selectively eliminating the metal of conductors, previously deposited on the entire surface of the substrate, and the second, in carrying out a selective electrolytic deposition of the metal of conductors through a mask. desired pattern protection applied to the substrate. The advantage of the first method lies in the possibility of using ready bi-metallic lamellae obtained by metallurgical plating processes; however, the yarns produced in this way have irregular edges and poor shape reproducibility. The second method is more economical from the point of view of the consumption of the metal of conductors and makes it possible to have a higher density of the conductive design of the plate; and therefore, later, in describing the process, we will have in mind this latter method.

 Thus, on a metal substrate 1, a metal is electrically precipitated to produce the conductors (fig. Id) through a protective mask 2 with a desired configuration, made, for example, into a photoresist by the double-sided photolithography method on the substrate I (fig. la, b, c). The conductors are deposited on both sides, but on one of the faces of the substrate 1 a conductor 3 is produced with a narrowed section 4, this giving it the form of dumbbells. Conductors 5 and 6 of the main wiring level crossing the conductor 3 are laid on the opposite side of the substrate 1, and where the conductors 6 are to be connected to the conductor 3, the width of the latter is increased at least twice , for example, by giving its ends the form of discs.

 The conductors 5 electrically isolated from the conductor 3 are produced at the crossing point opposite the narrowed section 4 of the conductor 3.

 The conductors 3 to 6 made, we remove the protective mask 2 which has become useless (fig. Le) and, we proceed to form by superposition of layers a base 7 of the plate (fig. If) on the substrate 1 on the conductor side 5 and 6 of the main wiring level. The operations for forming the base 7 by layers require special study, and they will be detailed below, but to understand the essential of the process let us assume the base 7 in the form of a dielectric wafer pressed on the substrate 1.

 The structure obtained by this operation is to be stripped along the entire thickness of the substrate 1 with a solution selectively influencing only its metal.

Electrical insulation of conductors 3 and 5 is ensured by the action of the treatment solution not only in depth, but also in width, that is to say, by means of a certain lateral stripping. The action of the deep treatment solution releases the conductors 5 and 6 from the main wiring level between the substrate I and the base 7, and isolates the conductors 5 and 6 relative to each other, while the the lateral auxiliary attack brings an overhang of the edges of the conductor 3 of the second level of wiring above the surface of the base 7. As the width of the narrowed section 4 of the conductor 3 is adopted commensurable with the thickness of the substrate 1, a predetermined time interval after the treatment along the entire thickness of the metal of the substrate 1 the narrowed section 4 will freely overhang the surface of the base 7 (fig. zig), thus eliminating unnecessary contact at the crossing points. At the same time there remain under the ends of the conductor 3 support elements 8 in the form of metal columns of the substrate 1, these elements 8 ensuring the connections of the conductor 3 to the conductors 6 of the main wiring level. In this way, the intersection of the conductors 5, 6 is produced by the intermediary of the conductor 3.

 it is preferable that the width of the narrowed section 4 of the conductor 3 is more than two times less than its width at the points of connection to the conductor 6, otherwise it will be impossible to have reproducibility of the dimensions of the support elements 8.

 After the chemical attack, the structure of the wafer corresponds to that illustrated in Figure 1h. if necessary, it is possible to fill the space between conductors 3 and 5 with a dielectric during the thermalization of the microelectronic system.

 As the conductors 5, 6 of the wafers produced by the proposed process are retained only by the adhesion forces arising between their metal and the base 7 of the wafer, the stability of such a structure with respect to mechanical loads and may be insufficient in a variety of systems.

 In order to improve the reliability and stability of the wafers vis-à-vis the actions of the ambient environment, the total pickling time of the metal substrate is divided into two parts, the first step (prior pickling) being done before training. layers of the base, and the second step (pickling along the entire thickness), after the layering of the base, taking into account the duration of the previous stripping during the first step.

The composition of the pickling solution and the pickling regime in the two stages can be identical.

 The first step ensures the highlighting, of all the conductors including conductors 5, 6, above the surface of the metal substrate I (fig. 2a). The main thing is the appearance of the overhanging edges 9 of the conductors 5, 6 under which penetrates during the formation of the layers of the base 7 a layer 10 of a dielectric material by enveloping the edges of the respective conductors (fig. 2b).

After the stripping of the substrate I, the conductors 5, 6 are retained on the surface of the plate not by the adhesion forces between the metal and the dielectric layer 10, but also thanks to the mechanical resistance of the cylinders Il formed from the same dielectric material, penetrating under the edges in the air 9 of the conductors 5, 6 (fig. 2c).

The second component of the retention force is by its volumetric nature, and therefore, to a lesser extent undergoes the ambient influence. In addition, for narrow conductors it is by its value several times greater than the adhesion force. Thanks to this fact, the force necessary for the decohesion of the conductors 5, 6 from the surface of the wafer increases by several times.

 Furthermore, such a structure minimizes harmful effects, such as faults and migrations of electrical charges between the conductors 5,6 of the wafer because these processes occur intensely along the edges of the conductors where they are concentrated. high potential gradients. In the structure of Figures 2b, c the cylinders II made of dielectric material prevent this process. As a consequence, we can speak of the admissible limit voltage applicable between the adjacent conductors 5, 6.

 The part of the volumetric component in the force resulting from the retention of the conductors 5, 6 on the surface of the wafer begins to manifest itself when the width of the cantilever edge constitutes at least 0.01 of that of the conductor. As it is difficult to control the value of the overhang during the first pickling step, we must establish the relationship between it and the pickling depth of the metal substrate 1. For pickling in a stationary solution these values are quite close one from the other, and therefore, said figure can be related to the prior pickling depth, the control of which is much simpler.

 it is necessary, on the other hand, that after the prior pickling remains the adhesion between the conductors 5, 6 and the substrate I, in order to avoid their decohesion and shifts during the operations which will follow. This is why the pre-stripping depth must not exceed 0.45 of the minimum width of the wire. For pickling in a stationary solution there will remain between the conductors 5, 6 and the substrate 1 a connecting strip, having a width equal to at least 0.1 of that of the conductor, this being in practice sufficient.

 In special pickling regimes, in particular by jet or emulsification, when the ratio between the pickling depth and the side pickling value varies in the direction of predominance of the first, the upper limit can be shifted but it is not useful increase the lateral stripping depth 3-ls to a value greater than 0.5 of the width of the wire.

 By imposing severe requirements on the reliability of the contacts between the levels and on the mechanical resistance of the intersections, it is necessary before proceeding to the superposition of the layers constituting the base to undergo an annealing of the metal substrate 1, carrying the conductors 3 to 6 ( Fig. 2a), in order to ensure diffusion welding of the metals of the substrate and of the conductors. The concomitant effect is then an improvement in the crystal lattice and the removal of mechanical stresses in the metal of the conductors, this making the metal more plastic. This also contributes to an improvement in the stability of the wafers with respect to thermal and mechanical actions, when, as a result of a difference between the coefficients of thermal expansion of the base 7 and of the conductors 3, conditions arise for their detachment from the support elements 8. The rupture of the conductors 3 to 6 in the main material is avoided thanks to an improved ductility of their metal, which had been annealed.

 On the other hand, improved ductility of the narrowed section 4 of the conductor 3 requires to handle the wafer carefully before filling the intersection spaces with dielectric material. However, short circuits between the wiring levels are avoided because the narrowed sections 4 of the conductors 3, bending up to the surface of the plate will not touch the conductors 5 of the main wiring level, but the dielectric projections 11.

 In order to further strengthen the fixing of the support elements 8 in the layer 10, the ends of the conductors 6 of the main wiring level are made enlarged and with holes 12 at the places of their connections to the conductor 3. Under the holes 12 arise , during the preliminary stripping of the base, hemispherical recesses 13 in the metal of the substrate 1 (fig. 2a). During the superimposition of the base 7 the dielectric material 10, which is in a fluid state, flows into the recesses 13 by creating there a kind of "rivets" 14 (fig. 2b, c). As a result, the support elements 8 and the conductors 5, 6 form a notched assembly with the dielectric material of the layer 10.

 By respecting all the above-mentioned requirements, it is possible to produce a wafer having the highest reliability, capable of withstanding thermal cycles up to cryogenic temperatures as well as the strongest mechanical actions, while preserving its constructive integrity and all the wiring parameters. . In such plates the reliability of the connections of the conductors laid in the different wiring levels is no worse than that of a single conductor, this being not possible in the known versions.

 As the materials from which the substrate 1 and the conductors 3 to 6 can be made, metals are widely used satisfying the condition of the possibility of carrying out a selective pickling of the metal from the substrate with respect to that of the conductors. In producing the platelets, having the highest reliability, it is useful that these. metals form between them a continuous series of solid solutions.

A technically good pair of metals is copper for the substrate and nickel for the conductors. Copper is subjected to selective pickling
compared to nickel in anhydride solutions
chromic and sulfuric acid or in ammonia solutions. Instead of copper you can use different
alloys based thereon, especially tin and bronze alloys.

 For articles of large series, when it is their price which is decisive, one can use an iron substrate in the form of sheet or ribbons in low-carburized steel. Such a substrate is pickled selectively with respect to copper or nickel conductors in solutions based on oxalic acid and hydrogen dioxide.

The substrate can also be made of aluminum, but it is then necessary before the electrical precipitation of the metal of conductors to form on the surface of the aluminum substrate an electroconductive conversion layer for example, a fluoride-phosphate film ensuring sufficient adhesion. between the conductors and the substrate little disturbing the contacts between the wiring levels.

it is preferable to pickle the aluminum substrate in alkaline solutions.

 The structure of the conductors of the wafer can be multilayer, for example, the nickel base can be gilded in order to improve the solderability and the electrical conductivity, coated with tin, to ensure the welding conditions, or silver, at cases where severe requirements are placed on the conductivity of the wiring.

Despite the fact that silver negatively influences the reliability in conventional printed wafers and shortens their service life, given its high migration capacity, in the structure of Figure 2b this effect is minimized, and silver can at need to apply without difficulty. This may be necessary when manufacturing microelectronic systems operating at frequencies of several hundred megahertz.

 An extension of the technical facilities of the proposed process, consisting of the possibility of applying it to the production of large wafers on any type of base: rigid, flexible, flexible-rigid and with a device for evacuating the incorporated heat, is obtained thanks to the fact that the actual wiring is carried out separately from the base on a metal substrate, while the base itself can represent a combined structure. For this purpose the base is to be formed at least from two layers, at least one of which, adjacent to the base of the wafer, is made of a dielectric material. The other layers can be made of a metal, a dielectric or a combination thereof.

 In the layer adjacent to the base, it is useful to make holes at the places in the plate where elements for evacuating heat from microelectronic systems and / or connections to the succeeding layer are provided.

 The structure examined above (fig. 2) illustrates one of the most characteristic and important cases in practice of a combined base in which a layer 10 of dielectric material is directly followed by a metal base 7. Such a plate has good thermal characteristics and high mechanical resistance.

 For rigid mounting of the elements of the microelectronic system on the wafer, the base 7 must be made of a metal, having a coefficient of thermal expansion adapted to that of the components, for example, of iron-nickel alloy. When this is not necessary, it is best to use an anodized aluminum plate or special aluminum profile, having ribs or pins to improve heat dissipation.

 When forming the layer 10, exceeding the limits of the base 7, one obtains, provided sufficient flexibility of the dielectric material, a flexible-rigid construction where within the limits of the base can be mounted elements of the system, while the layer 10 of dielectric material, exceeding the limits of the base 7, constitutes flexible loops used to make the connections to the external circuits.

 it is useful to form the layer 10 of dielectric material having an adhesive film by inserting it between the base 7 and the metal substrate 1 before the operation of superposition of the base (FIG. 3a, c). Interlayer layers (fig. 3b) are first obtained by stamping from the adhesive film, having, in addition to the aforementioned holes 15, positioning perforations ensuring its perfect coincidence with the metal substrate 1. The intermediate layers of dielectric material being located between the substrate metal 1 with the conductors 3 to 6 and the base 7 at the holes 15, leave exposed areas of the metal base 7, on which we will then mount elements 16 for removing heat from microelectronic systems (fig. 3d , e). Here we can make electrical contact with the metal of base 7.

In Figure 3e, we see how we can connect the element 16 to the conductors 6, 6a, 6b, 6c.

 As adhesive films, it is useful to apply the compositions based on fiberglass or polyimide, impregnated or coated with an adhesive composition in solid state, but retaining its reactive power.

 When the conditions imposed on the electrical characteristics of the wafers and the use thereof are not severe, the adhesive film may represent a layer of glass fabric impregnated with a hot-curing epoxy resin, which has undergone a treatment. thermal to reach a thermoreversible state.

 In the case of high density wafers of the wiring pattern to be used under severe conditions, the adhesive film must have a polyamide body coated on both sides with layers of high temperature adhesive.

 The temperature regime of the base overlay is to be adopted, taking into account the passage of the adhesive composition in a thermally irreversible state, complete polymerization for adhesive compositions based on epoxy resin or its softening. The pressure to be applied must then ensure good bonding and the pouring of the adhesive composition under the overhanging edges 9 of the conductors 5, 6 of the main wiring.

 In complex microelectronic systems it is useful to use a wiring board with more than two levels of wiring (fig. 4). This object can also be achieved by applying a combined base superposed on an intermediate layer of dielectric 10 having holes 15 at the desired locations (FIG. 4a, d) superposed in turn on the metal substrate 1 with conductors 3 to 6.

 Three or more levels of cabling are obtained when the layer succeeding the dielectric layer adjacent to the base of the board is formed from a ready board. it is of practical interest for very complex digital systems the case where a ready printed plate, which can be simpisface and even without metallized holes for mounting on the surface of the elements of the system (fig. 4b, f), is incorporated in the combined base.

 A digital microelectronic system typically has a considerable number of integrated circuits, having complex wiring of the logic circuits and simple wiring of the "ground" and "power" circuits.

 it appears that a high density of the design of conductors and several, at least a pair, wiring levels are necessary only for the logic circuits, whereas other requirements are placed on the circuits "supply" and "earth", in particular: a minimum ohmic resistance of the conductors and the realization of the screen functions. This is why these circuits, without loss of density of the mounting of the system, can be transferred to a single-sided printed board with large conductors occupying the maximum of its surface.

 The drawing of conductors of the printed circuit board 17, carrying the circuits "earth" and "supply" (fig. 4b, f), can represent two comb structures in opposition 18 and 19, one of which receives a supply voltage , and the other, zero potential. By obtaining sufficient electrical capacity between these structures, each of them will be equivalent to "earth" for the logic circuits, whereby the logic circuits (fig. 4c, d) will be as above a set surface to the earth which is favorable from the point of view of the circuitry.

 Digital integrated circuits 20 produced in plastic or ceramic carriers are to be mounted at the level of the lines, delimiting the structures 18 and 19, whereby the respective outputs of each of the integrated circuits 20 can through the holes 15 in the dielectric layer 10 connect both to structure 18 and to structure 19 (fig. 4g, i, h).

 The wiring of the logic circuits is carried out by the above process on a metal substrate (fig. 4c, d).

After mounting the integrated circuits, the wafer is to be coated with a layer 21 of varnish. This gives a three-level wiring board, optimal for the digital system, given a differentiated density of the design of the conductors of the wiring levels and the unique manufacturing technology. The latter is ensured by the identity of the main technological operations to be carried out, by manufacturing both the wiring of the logic circuits and the card with the wiring of the "earth" and "power" circuits. The mounting density of the digital system on such a wafer can be that of a thin film micromodule, although it does not require expensive materials, and its production process does not include vacuum operations.

 it is possible, if necessary, to carry out load and adaptation resistances on the printed wafer by the screen printing method with application of resistive pastes at low temperature.

 The manufacture of a complex digital microelectronic system on such wafers requires the minimum of material and technological equipment because the integrated circuits of the same batch, being part of the system, have as a general rule the same arrangement of the outputs "ground" and " food". This fact makes it possible to apply the unique type of printed wafer and the unique type of the adhesive interlayer with holes to form the dielectric layer, then realizing all the diversity of mounting pads intended for different logic blocks of the system by the single replacement of the metal substrate with wiring conductors of the logic circuits.

 A composite base can carry a second system of conductors on a metal substrate produced in a similar manner to the first by the above technology. A mounting plate is then obtained with four levels of wiring intended to receive elements of the system on its two faces. Such a wafer is of interest for the production of complex microelectronic systems, having a minimum volume and weight and consuming little power.

 Other combinations of structures and materials constituting the base of the wafer are also possible, the choice of these structures and materials being made according to the components to be used and the degree of integration of the microelectronic system for which the given wafer is intended.

 When, for example, the system comprises a significant number of passive components produced by thin or thick film technology, a ready card, forming part of the base, may be a ceramic or glass wafer carrying a set of thin film components of the system. In the case of a large power arrangement it is better to apply an anodized aluminum plate here.

 it is possible to use in digital systems ready-made double-sided printed plates with metallized holes or even multi-layer printed plates, the outer layers of which are executed using the technology just described.

Such a structure is not a simple association of several types of wiring boards, but represents a wiring board offering qualitatively new possibilities which are not inherent to the separate elements constituting it. This composite structure is also a particular version of a typical wiring board intended to produce printed assemblies and hybrid micromodules with thin layers, combining the possibilities of the constituent structures and free from the drawback of each of them residing in their technology and equipment. non-universal manufacturing.

 We will now examine concrete examples of the implementation of the proposed method.

 it is useful to classify the examples below described in two groups: the first will include those which relate to the realization of a two-level wiring structure on a metal substrate (examples 1 to 3), and the second, the examples of 'execution based on this structure of the finished wiring boards and their use in electronic systems (examples 4 to 8).

Example 1
Manufacture of a two-level wafer
wiring by photolithography methods.

 A 0.05 mm thick copper foil substrate, having its surface prepared (cleaned of oxides and degreased) by the immersion method, is to be coated on both sides with a photoresist layer of 0.004 to 0.006 mm thick. This done, the substrate is placed between two photographic masks, produced on a flexible film or on glass plates, previously combined and their irradiation on both sides is carried out with ultraviolet light, thereby ensuring an exposure corresponding to the type of photoresist applied. . The design of the masks defines that of the conductors of the main wiring level of 0.025 mm in width with a spacing between the conductors of 0.005 mm. The narrowed sections of the conductors, belonging to the second level of wiring, also have the width of 0.025 mm and they have disc ends of 0.1 mm in diameter at the points of contact with the level of main wiring.

 The photoresist is developed and tanned, and the substrate is then placed in a galvanic nickel plating bath with sulfonamide electrolyte allowing plastic and unconstrained precipitates to be obtained and ensuring a high growth rate. The nickel is precipitated until a thickness of 0.015 mm of the conductors is obtained. Then, the photoresist that has become useless is eliminated, and the substrate is treated additionally in a solution based on chromic anhydride and sulfuric acid to a depth of 0.01 mm. The annealing of the substrate is carried out in an inert gas medium at a temperature of 8500C, for 15 minutes.

 The base is made from an aluminum plate 0.5 mm thick, and for its superimposition on the substrate, a polyimide film is applied to the plate, coated on both sides with layers of fluororganic adhesive.

The superposition is carried out under a pressure of 50 to 75 kgf / cm2 at a temperature of 4500C. A final treatment is carried out in a solution based on chromic anhydride and sulfuric acid along the entire thickness of the substrate until complete removal of the copper from below the points of intersection.

 After the chemical treatment the wiring board is washed in deionized water, applying the ultrasound and dried using infrared rays. The wiring board is now ready to receive elements with wire outlets, these elements can be mounted by thermocompression or ultrasonic welding methods.

From the construction point of view, a microelectronic system manufactured using the described wiring board represents a hybrid integrated circuit with deep integration.

Example 2
Manufacturing of a wiring board for two
wiring levels without resorting to
photolithography, transferring the design of
conductors directly on a metal substrate.

 The application of photolithography methods for the production of small batches of complex wiring boards with a large number of modifications is not rational. The optimal effect of developing a topology using a computer is obtained by directly applying the project data to transfer the drawing of the conductors to a metal substrate.

 For this purpose, a substrate similar to that just described (see Example 1) is coated on both sides by a method of extraction of a solution, layers of a chemically stable varnish of 0.04 0.06 mm thick.

 Then, using concentrated laser radiation and using the reflection properties of the metal substrate, the varnish is selectively burned on both sides of the substrate to free the surface of the conductors to be obtained. The substrate is then blown with compressed purified air, washed in deionized water with the application of ultrasound, all the operations following the electrical precipitation of nickel being similar to those of Example 1.

Example
Manufacturing of a two-level wiring board
wiring without applying photo methods
lithography using offset.

 it is useful to apply this method, by producing large batches of low and medium complexity wiring boards having a not very high density of the wiring drawing of the wires.

 The formation of a protective mask on the metal substrate similar to that of Examples 1, 2 is carried out here by transfer of a chemically stable paint from a plate on the substrate via a rubber plate , the operations which follow will be identical to those of Example 1.

 As there is a loss of precision in the geometrical dimensions of the conductors in relation to the plate during transfer, the width of the sections of the conductors cannot ordinarily be narrower than 0.1 mm. This restriction being admissible, the given process is to be considered preferential, given its highest yield.

Example 4
Making a wiring board on a base
flexible, with two levels of wiring.

 A metallic substrate carrying on its two faces of the conductors is made according to any of Examples 1-3, as a base is applied a polyimide film coated on one side with a layer of fluoroorganic polymer to be welded. When the metal substrate represents a ribbon, the base is superimposed, by advancing the substrate and the polyimide ribbon whose layer to be welded is oriented towards the substrate between heated cylinders.

 The laminate obtained obtained undergoes a selective chemical treatment of the metal substrate and a washing, completing the technological cycle of the production of the wiring board on a flexible base.

Example 5
Making a wiring board on a base
flexible, with four wiring levels.

 The operations are the same as in Example 4, but as a base a perforated polyimide film is used coated on both sides with layers of a dyed fluoroorganic polymer. On this film are superimposed on both sides of the metal substrates carrying on its two faces conductors formed according to any of Examples 1 to 3. The pattern of the conductors on the metal substrates is defined in accordance with the topology of the first and second pairs of wiring levels.

Example 6
Making a wiring board on a base
flexible with three wiring levels, the third
level representing a "ground" or "power" bus.

 The process is analogous to that of Example 5, but instead of the second metallic substrate carrying on its two faces of the conductors, a metallic strip of 0.05 to 0.1 mm thick is made made of a metal resistant to pickling whose agents act on the substrate.

 This metallic tape is then applied as a "ground" or "supply" bus, contact with the latter being made through the perforations made in the polyimide tape.

Example 7
Making a wiring board on a base
flexible-rigid composite with evacuation device
incorporated heat.

 The process is analogous to that of Example 6, but instead of the metallic tape, aluminum plates 0.5 to 2.0 mm thick are used, having its dimensions smaller than those of the perforated polyimide tape. Without exceeding the limits of these plates, on flexible wiring plates, a rigid heat extraction section will be formed intended to receive components of the electronic system.

 In the case of a large power dissipation it is useful to replace the aluminum plates with an aluminum rolling product, having a developed surface on one side.

Example 8
Applications in electronic systems.

 The key moment in the application of a wiring board in electronic systems is the realization of indoor and outdoor outputs, this being decisive for the connection of the wiring board to external circuits and therefore imposes strict requirements to meet the elements usable in such a system.

 Figure 5 illustrates part of a microelectronic system fabricated using the given wiring board with different types of exterior and interior outputs.

 The essential feature of this system is that all the types of outputs used are obtained simultaneously with the wiring levels in a single pass, without requiring any other operations. The configuration of the outputs as well as that of the conductors 3 to 6 are carried out simultaneously on the two faces of the metal substrate 1 (fig. Sa, b).

 Internal outlets 22 in the form of columns are produced as separate disks on the side of the metal substrate 1 opposite to that on which the base 7 is superimposed.

 External outputs in ribbons 23 are produced in the form of identical designs on the opposite faces of the substrate 1 emerging from the edges of the base 7 (FIG. 5c).

 Special internal outlets 24 making it possible to avoid a contact defect due to a difference in the coefficients of thermal expansion still existing between the materials from which the base 7 is produced and the components, forming part of a system, are produced in the form of combs on the face of the metal substrate 1 opposite to that on which the base is superimposed 7. The width of the teeth of the combs is made equal to that of the narrowed sections 4 of the conductors 3. Then, we will mount on the outputs 22 a sub-plate 25, and on the outputs 24, a component 26 (fig. 5c, d).

 The base 7 being obtained by its superposition on the substrate 1 selectively treated, under the discs of the outputs 22 are formed metal columns of substrate 1 similar to the support elements 8, ensuring contact between the wiring levels. The mechanical resistance of the ribbon outlets 23 is due to ribbons 28 formed of metal from the substrate and located in their middle part. Above the support elements 29 formed from the metal of the substrate 1 under the edges of the special internal outlets, the freely overhanging teeth of the combs 24 are seen after the chemical treatment.

 During the assembly of the components 26 these teeth flex towards the base of the wiring board and thanks to this fact they acquire the properties of the springs, reacting to variations in the dimensions of the rigid elements under the thermal influence exerted on the system. The resistance of such outputs to shock and vibration loads is ensured by the presence of the layer of varnish 21, the latter having to be, on the one hand, sufficiently rigid to make possible the bonding of the components 26 on the surface of the wiring board, and on the other hand, sufficiently elastic to keep the flexibility of the outputs 24. These are dielectric compounds based on organosilicon rubbers which best satisfy these conditions.

 The wiring board manufactured by the technology described also always has a second mounting surface, which can then be used for welding the outputs by thermal compression or by ultrasound.

An example of application of this second mounting surface is illustrated in FIG. 3.

The essential advantage of the proposed process is the elimination of the manufacturing and metallization operations of the contacts between the levels which are inevitable in the known processes which can be used to carry out wiring at several levels, as well as the application of a unique technology for the realization of printed sets and hybrid modules. This allows to
- reduce the time taken to produce a system from 35 to 750%, depending on the complexity of the system
- increase the mounting density of the system by 5 to 10 times compared to the printed wiring technology, and by 1.5 to 2 times compared to the thick film technology;
- improve the reliability of the system;
- avoid or minimize the use of noble metals and expensive materials.

 it becomes possible to reduce the cost price of the wiring boards themselves more than twice, taking into account boards of various types which can be replaced by a single one manufactured in accordance with the given technology.

 An important positive feature of the proposed process is that it not only eliminates the drawbacks inherent in the prior art but also gives virtually any of the available types of wiring boards qualitatively new mounting capabilities achievable in the proposed composite base plate.

 The given process, based on electrical precipitation and pickling operations requires the use of liquid chemical reagents, but compared to the "dry" processes applied in hybrid technology it presents wider technical possibilities, and it can be said that it is universal. This process makes it possible to produce a qualitatively new wiring board which has very little in common with a printed wiring board only manufacturing technology and a low price, and which comes close, by its possibilities of technical applications, to Precision wiring boards used to make incomparably more expensive hybrid integrated circuits for the same dimensions.

Claims (12)

 1.- A method of manufacturing wired plates usable in microelectronic systems consisting of forming wafer conductors of desired configuration on a substrate of a metal pickled selectively from the metal of the conductors, superimposed on one side of the substrate a wafer base and a selective pickling is carried out with respect to the conductors of the substrate along its entire thickness, characterized in that the conductors (3 to 6) are formed on the two faces of the substrate (1), and, on the face of the substrate (1) opposite to that carrying the base (7), such conductors (3) are formed which have at least one narrowed or thin section (4), the selective pickling of the substrate (1) being done until eliminated completely the substrate metal only under said narrowed or thin sections (4).  2.- Method according to claim 1, characterized in that in order to produce conductors intersecting on the face of the substrate (1) to which the base (7) is superimposed the conductors are formed precisely in the areas of the surface of the substrate which are located opposite the narrowed or thin sections (4) corresponding to the crossed conductors (3).  3.- Method according to claim I, characterized in that the conductors (3) having at least one narrowed or thin section (4) are formed so that the width of their narrowest section is commensurable with the thickness of the substrate metallic (1) and more than twice the width of the sections of the conductors (3) at the places of their connections on other conductors (5, 6) of the intersection to be formed.  4.- Method according to any one of claims 1 to 3, characterized in that before the superposition of the base (7), a selective pickling is carried out with respect to the conductors (5, 6) of the metal substrate (1) over a depth adopted between 0.01 and 0.5 of width of the conductors (5, 6).  5.- Method according to any one of claims 1 to 4, characterized in that before the superposition of the base (7) the metal substrate (1) is annealed with the conductors (3 to 6) produced there.  6.- Method according to any one of claims 1 to 5, characterized in that as the metal for the substrate (1) copper, iron, aluminum or alloys based on these metals are used, and as the conductor metal (3 to 6), nickel, copper, tin, gold or their combinations are used.  7.- Method according to any one of claims 1 to 6, characterized in that between the substrate (1) and the base (7) of the wiring board is formed during the superposition of the base at least one layer (10) in a dielectric material.  8.- Method according to claim 7, characterized in that the dielectric layer (10) is formed with holes (15) made at the locations of the wiring board where elements (16) of heat dissipation must be placed from the microelectronic system and / or connections connecting the wiring board to a next layer.  9.- Method according to claim 7 or 8, characterized in that the base (7) is formed of a metal.  10.- Method according to any one of claims 7 or 8, characterized in that the base (7) is formed from a plate of prefabricated wiring.  11.- Method according to any one of claims 7 or 8, characterized in that the base (7) is formed from a metal substrate with conductors already formed thereon by the method according to claim 1 .  12.- Microelectronic system, characterized in that it comprises one or more wiring plates obtained by the method according to any one of the preceding claims.