FR2490372A1 - Concentrateur multiplexeur intelligent pour postes de travail graphique - Google Patents

Concentrateur multiplexeur intelligent pour postes de travail graphique Download PDF

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Publication number
FR2490372A1
FR2490372A1 FR8019815A FR8019815A FR2490372A1 FR 2490372 A1 FR2490372 A1 FR 2490372A1 FR 8019815 A FR8019815 A FR 8019815A FR 8019815 A FR8019815 A FR 8019815A FR 2490372 A1 FR2490372 A1 FR 2490372A1
Authority
FR
France
Prior art keywords
multiplexer
concentrator
lines
peripherals
computer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR8019815A
Other languages
English (en)
French (fr)
Other versions
FR2490372B1 (enrdf_load_stackoverflow
Inventor
Serge Gauthron
Vincent Piazzini
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ASSIGRAPH SA
Original Assignee
ASSIGRAPH SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ASSIGRAPH SA filed Critical ASSIGRAPH SA
Priority to FR8019815A priority Critical patent/FR2490372A1/fr
Publication of FR2490372A1 publication Critical patent/FR2490372A1/fr
Application granted granted Critical
Publication of FR2490372B1 publication Critical patent/FR2490372B1/fr
Granted legal-status Critical Current

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Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4022Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G06F3/153Digital output to display device ; Cooperation and interconnection of the display device with other functional units using cathode-ray tubes

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • Human Computer Interaction (AREA)
  • Time-Division Multiplex Systems (AREA)
FR8019815A 1980-09-15 1980-09-15 Concentrateur multiplexeur intelligent pour postes de travail graphique Granted FR2490372A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR8019815A FR2490372A1 (fr) 1980-09-15 1980-09-15 Concentrateur multiplexeur intelligent pour postes de travail graphique

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8019815A FR2490372A1 (fr) 1980-09-15 1980-09-15 Concentrateur multiplexeur intelligent pour postes de travail graphique

Publications (2)

Publication Number Publication Date
FR2490372A1 true FR2490372A1 (fr) 1982-03-19
FR2490372B1 FR2490372B1 (enrdf_load_stackoverflow) 1984-06-22

Family

ID=9245913

Family Applications (1)

Application Number Title Priority Date Filing Date
FR8019815A Granted FR2490372A1 (fr) 1980-09-15 1980-09-15 Concentrateur multiplexeur intelligent pour postes de travail graphique

Country Status (1)

Country Link
FR (1) FR2490372A1 (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0125773A3 (en) * 1983-05-13 1986-09-10 Able Computer Communication control apparatus for digital devices
EP0196400A3 (en) * 1985-02-28 1990-09-05 International Business Machines Corporation Logical arrangement for controlling use of different system displays by main processor and co-processor

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3828325A (en) * 1973-02-05 1974-08-06 Honeywell Inf Systems Universal interface system using a controller to adapt to any connecting peripheral device
FR2355332A1 (fr) * 1976-06-15 1978-01-13 Bunker Ramo Dispositif de commande programmable permettant la communication entre divers dispositifs peripheriques a mode de communication differents et entre ces dispositifs et un organe de traitement d'informations
US4174536A (en) * 1977-01-21 1979-11-13 Massachusetts Institute Of Technology Digital communications controller with firmware control

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3828325A (en) * 1973-02-05 1974-08-06 Honeywell Inf Systems Universal interface system using a controller to adapt to any connecting peripheral device
FR2355332A1 (fr) * 1976-06-15 1978-01-13 Bunker Ramo Dispositif de commande programmable permettant la communication entre divers dispositifs peripheriques a mode de communication differents et entre ces dispositifs et un organe de traitement d'informations
US4174536A (en) * 1977-01-21 1979-11-13 Massachusetts Institute Of Technology Digital communications controller with firmware control

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0125773A3 (en) * 1983-05-13 1986-09-10 Able Computer Communication control apparatus for digital devices
EP0196400A3 (en) * 1985-02-28 1990-09-05 International Business Machines Corporation Logical arrangement for controlling use of different system displays by main processor and co-processor

Also Published As

Publication number Publication date
FR2490372B1 (enrdf_load_stackoverflow) 1984-06-22

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