FR2487145A1 - SYSTEM FOR SYNCHRONIZING SUBSCRIBER TERMINALS OF A DIGITAL TELECOMMUNICATION NETWORK - Google Patents

Abstract

SYSTEM OF SYNCHRONIZATION OF A SUBSCRIBER TERMINAL WITH THE SWITCHING CENTER TO WHICH IT IS CONNECTED IN A TELECOMMUNICATION NETWORK WITH DIGITAL TRANSMISSION ON THE SUBSCRIBER LINES. NO SIGNAL IS TRANSMITTED ON AN AVAILABLE SUBSCRIBER LINE TO KEEP ENERGY DISSIPATED AT A MINIMUM. REMOVING THE HANDSET TRIGGES THE PG CLOCK PULSE GENERATOR FROM THE SUBSCRIBER TERMINAL AND SENDING A 0 SO SUITE THROUGH THE ESL LINE CIRCUIT UNDER THE CONTROL OF THE NON-SYNCHRONIZED CLOCK PULSES PS, FOR EXAMPLE At 80 KEBS. THE CENTRAL RESPONDS WITH A SYNCHRONIZATION SIGNAL, FOR EXAMPLE OCTTE 01111110, DETECTED IN THE TERMINAL BY A TSCD REGISTER AND ASSOCIATED DOORS WHICH RESET A TSCS BISTABLE TO 0 AT THE END OF A TSCD CYCLE IF THE FLAG IS INCORRECT. UNDER THE CONTROL OF A TCT DIVIDER BY 2, THE DETECTION OF 2 CORRECT FLAGS SET AN IS SYNCHRONIZATION BISTABLE TO STATE 1, SO THAT THE SAME FLAG IS RETURNED TO THE CENTRAL AS ACKNOWLEDGED OF RECEIPT, VIA A TSCP REGISTER ORDERED BY PS WHILE THE GENERATOR PG IS SYNCHRONIZED BY THE RATE SIGNAL OF THE P INPUT SIGNALS UNDER THE CONTROL OF THE IS1 OUTPUT. AN IDENTICAL DETECTION SYSTEM IN THE CENTRAL IS USED TO TRIGGER THE SENDING OF THE INVITATION TO BE TRANSMITTED TO THE TERMINAL AFTER CHECKING THE SYNCHRONIZATION.

Description

The present invention relates to automatic telecommunications in

  which any communication between a central office (often referred to as the system node) and the terminals

  number of subscribers served is done numerically.

  With such a system, synchronization must be maintained between the subscriber terminals and the central during call establishment and during communications. To be sure that this is done, an idle terminal can transmit signals continuously to the central, but this results in unnecessary power consumption at the terminal, and could also cause difficulties due to crosstalk. Another technique is to allow only the amount of idle energy required to detect incoming signals. While such a system could be maintained in synchronism with the terminal, it would require the transmission of a characteristic signal from the central office, which would also consume

  energy and could cause crosstalk.

  An object of the invention is to provide systems in which these drawbacks have been minimized if not overcome.

mentioned above.

  According to the present invention, there is provided an automatic telecommunication system in which a central office serves a number of remote terminals, the communication between the central office and the served terminals being carried out digitally, in which when a call is initiated by the one of said terminals sends to the exchange a non-synchronized signal (which in the following will be referred to as a warning signal), upon reception of the warning signal the exchange returns to the calling terminal a binary train containing a synchronization pattern, upon detecting the synchronization pattern in the bitstream it receives from the central office the calling terminal replaces the warning signal with a bit stream which contains a synchronization pattern, and the detection by the central of said synchronization configuration coming from the calling terminal indicates that this terminal is in synchronism with the c the central, this detection producing the sending of an invitation signal to transmit (which in the following will be called IAT signal) to the calling terminal to instruct him to transmit the number of the

  called terminal or other signals.

  Thus, the condition of rest of the terminals is a condition of waiting for the reception of signals coming from the central, the latter

  establishing the initial synchronization.

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  There are two main approaches to achieving synchronization according to the technique above. In the first of these, the operational sequence when a terminal makes a call is as follows: a) a non-synchronized train of signals is sent to the central office at the line transmission rate (assumed to be 80 keb / s), to form the warning signal; b) in response to the reception of this bit stream, the exchange returns a synchronization configuration, also at the on-line transmission bit rate; c) when receiving the synchronization configuration from the central terminal locks on this configuration and sends a synchronized configuration to the central office to "tell" it has been synchronized; d) the exchange responds to receipt of the synchronized configuration by changing the high-rate synchronization configuration to a synchronization verification code sent at 2 keb / s

  in the transmission time interval of the ninth eb (ITEY.

  code words of ten eb; e) when the terminal detects this lower rate synchronization check configuration it also changes its high rate synchronization signal to a 2 keb / sec synchronization check configuration in the IT 9-: f) the central sends then an invitation signal to transmit (IAT) so that the calling terminal can send

the requested number.

  With such a device, it is possible to perform the frame synchronization in 8 eb of warning plus an additional frame to check the synchronization, plus the recognition time for the

  receipt of verification codes at 2 keb / s.

  We thus have: 8 eb at 80 keb / s + 2 frames at 125 Ps / frame + 1 byte of verification of synchronization at 2 keb / s, that is to say

  8/80 ms + 0.5 ms + (8 x 0.5 ms) = 4.6 ms.

  If synchronization is lost, the recovery process is the same as the initial setup process, except that other line inputs can be blocked so that the

  synchronization can be easily detected.

  The other approach uses bandwidth at 2 keb / s to establish word synchronization between the terminal and the central, and

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  vice versa. The operational sequence in this case when triggering a call from a terminal is as follows: i) sends a train of unsynchronized signals keb / s, such as the signal "warning" central; ii) the exchange responds to the warning signal by sending a synchronization configuration at 2 keb / s in the IT 9, all other ITs with zero eb and all other line inputs being blocked; iii) the terminal identifies the synchronization configuration

  since all the eb other than those in the configuration are zeros.

  When a true 2 keb / sec synchronization configuration has been

  confirmed, the terminal sends a similar configuration to the central office.

  iv) when the central unit detects and confirms the synchronization configuration returned from the calling terminal it sends back an invitation to transmit signal (IAT) to the terminal, at the reception of which the terminal can send the number it desires or to other

signaling information.

  If a loss of synchronization is detected, either at the central office or at the terminal, then the data and signaling channels are fixed

  to zero, and only the 2 keb / sec synchronization configuration is -

  found in IT 9 is sent to the line. The terminal or the central office then try to find the synchronization, that is to say, two synchronization verification frames. When the synchronization has been completed, the terminal transmits the configuration at 2 keb / s in the IT 9, the remaining data and signaling channels being at zero. The procedure

is then described in (iv).

  We can get frame synchronization in the same

  8 eb warning, plus two frames at 2 keb / s, plus the signal of invita-

  to be transmitted (IAT) at 6 keb / s. We thus have 8 eb at 80 keb / s + 2 frames at 2 keb / s + 8 eb at 6 keb / s, that is to say: 8/80 ms + (16 x 0.5 ms) + ( 8 x 1) ms, that is to say

0.1 ms + 8 ms + 1.33 ms = 9.43 ms.

  Of these two approaches, the first involves the detection of a special byte at the rate of the line, while the second has the advantage of using the same method for synchronization detection as for

synchronization control.

  Synchronization can be performed at a lower speed using the 2 keb / s configurations in IT 9 of the above method but the terminal or the central office would have no indication as to the location of eb 9 and therefore should look for the configuration

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  synchronization in any of the ITs 1 to 10. Although slower, this has the advantage that if there is loss of synchronization in one direction, it is not necessary to close the other path, since the end which has lost the synchronization looks for the configuration of 'correct synchronization in the IT 9, and can not be blocked by the information in the bit stream on the other channel. This method, although a little simpler, would take much longer than the

  second method which is described above.

  The invention will be better understood on reading the description

  DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 and 2 are diagrams of a first embodiment of the invention based on the second method described above. Figure 1 showing the elements of the system at a subscriber terminal and Figure 2 the elements of the system at the central office; FIGS. 3A, 3B and 4A, 4B, similar representations of a second embodiment of the invention, also based on the second

method described above.

  In the device which will be described with reference to FIGS. 1 and 2, simple central-terminal connections are established, whereas with regard to FIGS. 3A, 3B and 4A, 4B,

  inserts a multiplexer between the central office and the terminals.

  Figure 1 shows the terminal directly connected to the central office, and in order to conserve energy there are no line signals in one direction or the other. When the exchange initiates a call, the flag or frame synchronization signal 01111110 is

  sent in lIT 9 to 2 keb / s, the others including all zero eb.

  Thus, the line signals are repetitive frame signals at 2 keb / s, and this is detected at the terminal which, in response, returns a similar signal so that the central can lock on these signals. The exchange detects the verification signal of

  -synchronization and sends an IAT signal in the signaling channel.

  The terminal then sends back an acknowledgment signal and the circuit

goes into the information phase.

  When the terminal initiates a call, the free line condition is replaced by a continuous sequence of zeros, which are detected at the exchange as a warning signal since there was previously no line signal. In response to the warning signal, the exchange returns the synchronization check signal, or flag, and this is detected by the terminal, which responds by returning e487145 a similar check signal. Upon detection of this, the exchange returns an IAT signal and receives the acknowledgment signal from

  of the terminal, the circuit then passes into the information phase.

  When the call is released by a signal from the central office, the line returns to its idle state without signals. 1 - As regards more particularly Figure 2, we will now discuss in more detail the operations that take place when the central establishes a connection. With regard to Figure 2, it should be noted that the PM pulse is the main impulse at 2 keb / s of the central, and that PM 'is another signal shifted by PM of half

of a period.

  When the central takes the line connected to a terminal, the signal LS is received from the main control equipment of the central office: the synchronization configuration generator ESCP is then triggered to send the flag 01111110 line to a speed of 2 keb / s. This flag is marked in ESCP by the set of doors shown above ESCP in Figure 2, the first and last of these doors setting the state of the appropriate floor to 0 while the middle six doors provide their stages in state 1. The line transmission occurs under the control of the SDBF counter which divides by 40, in order to derive the bit rate of 2 keb / s from the basic bit rate of 80 keb / s. The line signal thus produced is controlled by the gates connected to the outputs "1" of the ESCP configuration generator through which the ESCP output signal arrives to the transmitter of the ESL line signal and by the mother clock from the central via its PM pulse. Through the differential coupler CD these signals are combined on the two-wire circuit which leads to the terminal. We will now talk about Figure 1 which represents everything related to the invention in the subscriber terminal. In this circuit, the flag reception (01111110) is detected by the timing verification distributor TSCD and its associated circuits. Regarding this figure, very few points are worth mentioning before

  the description of the operation. Thus, the pulse generator PG is

  locks on the pulses received from the central after the

  synchronization. It oscillates freely after the subscriber

  picks up to initiate a call until the lock occurs.

  The next point to note is that when synchronization and signaling share the same channel, the TOBU 40 divisor counter may have an increased cycle to enable synchronization verification.

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  for a flag of 8 eb every l / (m x 40) th eb of the train at 80 keb / s.

  For example, m can be between 4 and 32. Other counters of the same type can be assigned in the same way. Note also that * when the device is in the warning condition, the signal SO (at the central station see Figure 2) is active for the signal transmitter

  ESL line only sends zeros.

  In FIG. 1, the information coming from the exchange is received via the CD coupler and the RSL line signal receiver, whose outputs RO and R1 apply the information to the detection circuit, and also to the terminal itself. even. The actual detection is carried out by the TSCD timing verification distributor and all the comparator gates controlled by it and to which the outputs RO-R1 are applied. The actual detection indication is given by a TSCS bistable, which is set to its state 1 at the end of a TSCD cycle so that it is ready to be reset to O by any outgoing signal from aforementioned doors. These doors are indeed controlled by the reverse of the flag that must be detected. So the bistable TSCS detector will not be reset if the real signal is received. Thus, the output of TSCS remains at the end of flag reception (01111110), which controls a split counter by two TCTs. Thus, the second time that the flag to be detected is correctly received, the synchronization lever IS is set to its state 1, which, as will be seen, results in the sending of a synchronized eb configuration to central. That is, this marks this configuration in the TSCP configuration generator, and the contents of the latter are then sent to the central office under the control of the TDBr counter. This is similar to the operation of ESCP and EDBF

in Figure 2.

  The detection is carried out under the control of a division counter by 40 TDBF, necessary since the bit rate of the synchronization configuration is one fortieth of the bit rate of the line, and of a starting bistable ST, which is fed into state 1 as soon as a signal 1 is detected by the RSL line signal receiver. The transient output STR, which occurs when ST goes to state 1, sets the TDBF counter to state two, and also sets the content of the TSCD verification distributor to two. As long as the flags (01111110) continue to be received, the bistable TSCS detector is always reset before the end of the cycle. If a signal other than a flag is received, the TSCS detector is not reset to zero. As a result, the three TDBT division counter records these received signals, and

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  when three of these have been received it brings the synchronization bistable IS to zero and at the same time returns the starting bistable ST to zero. The circuit is then in a condition in which it looks for the timing signal, and when two correct timing signals have been received the circuit is again

  switched on the condition "in synchronism", the bistable IS being at 1.

  The Ven synchronism condition "causes the synchronization signal to be returned by the use of the TSCP shift register, in which the appropriate configuration is noted through a set of gates by the transient output ISR, which is occurred when I5 was set to 1. It should be noted that because of the INV inverter, when the circuit is in the warning condition, see below, the signal SO at the input of the transmitter of ESL line signal is active so that the ESL circuit is able to send only zeros, in this case when-IS is at 1, the clock pulses PS and the output of the register to

  offset TSCP control this transmitter, in the case of TSCP through

  mediator of INV, Si and SO. This output is then sent to the line via the differential gear CD. The information transmitted by the terminal is also applied to the input Si of the transmitter

  ESL through the door shown.

  In the central office, see Figure 2, there is a similar ESCS verification detector, controlled via a synchronization detection distributor of the same type ESCD and its associated doors and counters. They detect the reception of

  flags, in the same way as in the description relating to the

  When the "synchronism" condition is reached, the bistable IS (of FIG. 2) being at 1, a signal is transmitted to the appropriate part of the exchange to trigger the IAT signal. When this signal has been received by the signaling circuit of the terminal, it sends back an acknowledgment signal and the system can then exchange information. The circuit is released by the signaling system. FIG. 1 is now considered. When the subscriber picks up his handset, the pulse generator PS is switched through the door shown, the bistable IS "in synchronism" being then in condition 0. PG then produces the pulse train PS, which is unsynchronized. At this time, the input 0 of the line signal transmitter is energized but before the PS pulse occurs, it does not transmit. However, it now sends a series of zeros to the central office, via the CD coupler, as a warning signal. As we

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  as can be seen in FIG. 2, this causes the warning bistable WU to be set to state because of the condition that the RSL line signal receiver transmits to the access port at W [J, as well as a P pulse. The transient output WUR loads the ESCP timing shift register by the flag pattern, while setting the division counter by 40 EDBF in condition 2. Output 1 of WU produces a control condition for EDBF which therefore produces synchronization signals at 2 keb / s, and the ESCP register is

  ordered to transfer the flag to the ESL sender.

  Thus the line signals now carry the flag to the terminal where it is detected as explained above.

  in the description in Figure 1. This leads to a new reference

  from the centralized flag configuration (Figure 2), where it is detected via ESCD and its associated circuit. As before, the IS bistable is set to 1 to record the condition "in synchronism" and therefore triggers the IAT signal to which the terminal responds with an acknowledgment signal, after which the two ends can exchange

informations.

  We now consider the situation in which multiplexers are interposed between the line terminals and the central office. In this case, a block of n terminals is multiplexed on a single line of the central office, where the signals of said terminals are demultiplexed to provide

entrances to the central office.

  In the idle condition, there are no line signals from the subscriber terminals, while the multiplex channel, when it is free, carries zeros plus the reverse sync signal. During a connection, the central multiplexer synchronizes with the inverted synchronization signal, which is then sent on channel 1, the other channels being at 0. The other multiplexer returns a similar bit stream, when it is synchronized; detection

  at the central of the return of this signal allows the opening of the other ways.

  As shown in FIGS. 3A, B and 4A, B, the operation is largely similar to that described with respect to FIGS. 1 and 2 as indicated by the use of like reference numerals. The only differences necessary for operation are those required by the need to establish synchronization between the two ends of the multiplex system, prior to terminal-central synchronization. Note that Figure 3A relates to a line terminal, which is very similar to the line terminal of Figure 1, while Figure 3B relates to the subscriber end of the system.

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  multiplex. FIG. 4A shows the terminal synchronization equipment at the other end of the multiplex system, the central side, which is similar to that of FIG. 2, and FIG. 4B represents the equipment.

  additional synchronization of the multiplex system by the central office.

  As already mentioned, the determination of the multiplex synchronization condition uses channel l of the n-channel multiplex (usually 24 or 32 votes are provided), so that channel 1 can be used to transmit information in addition to the multiplex sync command. This is achieved by the use of flag inversion - i.e., 10000001 - to initially obtain the multiplex sync condition. Thus, during a connection, the two ends of the multiplex system synchronize synchronously synchronizing the 10000001 synchronization signal, the remainder of the bitstream being composed of zeros. This inversion is maintained until occupying track 1, while in good time

  the configuration is changed to get the real flag, the synchronization

  the multiplex is still maintained.

  As before, when the central initiates a call, it sends the non-inverted flag through the multiplex system in order to connect the desired line to the appropriate channel. Then, as before, the terminal sends the flag back to the central office as an acknowledgment signal. The detection of this acknowledgment of receipt allows the transmission of the

  IAT signal which is followed by the exchange of information.

  When the terminal initiates a call, it does so by sending an unsynchronized zeros in the appropriate multiplexing channel, this being the warning signal. The central returns the flag to the terminal, after which the latter (as usual) sends the flag to the central office. This detection makes it possible to send the IAT signal to the terminal, after which the exchange of information takes place. The return to the state of rest after release of the connection is made by the signaling system. Note that a regular check can be made on the synchronization of the multiplex, using the flag

  in its true form or inverted form, in lane 1.

  It will thus be seen that the transmission of the line signals between the two parts of the multiplexing system continues throughout the time of use of this system, whereas the signals between the line terminals and the central are as described. Referring to FIGS. 1 and 2, i.e., there are no signals in either direction in the rest condition. This also affects the warning that does not appear in the central office (Figure 4A) but on the

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  terminal of the multiplex system (Figure 3A). Otherwise the systems are very similar. Figures 4A and 4B show that the central side of the multiplex system is similar to the central office equipment shown in Figure 2, while the subscriber side of the system is almost the same as that of Figure 1, except for differences in relating to the warning signal. Figures 4A and 4B "generally" mirror Figure 2, but they further include the reverse sync signal detection means. This is still based on the ESCD synchronization verification distributor, but with a second set of gates (FIG. 4B) controlled from ESCD for the detection of the inverted flag. In addition, the circuit comprises MR reception memories and ME transmitters (FIG. 4A) and the control of the multiplex, but these have not been described because they can follow the established practice. Another difference is that the ESCP shift register (FIG. 4A) has two sets of doors for controlling it, the upper set for

  enter 01111110 in ESCP and the lower set to register 10000001.

  The channels 2 to n of the multiplexing system are similar to channel 1, but without the equipment to invert the registration in ESCP (FIG. 4A) and without the elements MSCS, MCT, MDBT and IMS (FIG. 4B). MSCS, MDBT, MCT and IMS are similar to the combination of ESCS, EDBT, ECT and IS, but are used for the function of

synchronization of the multiplex.

  In the previous description, it will be noted that the

  systems have been described using the "all zeros" condition to aid in the detection of "ones" of the flag. However, the use of the "all" condition to allow detection of the first zero of the flag could be used. This would in some cases be preferable to the method

"all zeros".

  In the devices described above, the signaling channel employed is separate from that used for synchronization. However, it would be possible to employ a repetitive synchronization signal associated with the signaling conditions, so that the synchronization signal could be repeated often enough to maintain the synchronization check condition, while still providing a signaling capability. To achieve this, an additional counter would be needed to match the desired shape of the flag so that all x bytes of information occur, where x is

in general between 5 and 32.

  When synchronization is actually incorporated into it

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  a signaling channel, as just mentioned, a possible solution for the provision of digital subscriber access is a 64keb / s example which will be increased by at least one additional signaling channel A. may also allow the transmission of other data that can be manipulated in the same way as the signaling (S), defined as telemetry signals (t) or supervision signals (d '). Thus the subscriber access becomes at least M + A1, M being-either speech or data (64 keb / s) and t being S + t + d '(8 keb / s). In some cases, we may need

more than one A-way of this type.

  In this case, as in the previous case, it is considered that synchronization is obtained when two consecutive flags have been detected, after which the normal conditions apply. When no signal is sent, the way is filled with flags so that a check is made on each lane. Other conditions that are considered are the sending of a) an acknowledgment signal, b) a single-character signal and e) a multi-character signal. With such signals, considering the need

  for them to include selection data, identifica-

  tion and the actual message, the worst case for a synchronization check becomes a flag of 31 ms. That is, the lengths of the signaling messages may be such that the channel is reserved for signaling for such a period. Thus, the detection of the absence of flags for a certain longer period, for example 62 ms, has been provided. In such a case, a synchronization procedure is triggered if a period of 62 ms elapses without detection.

of flag.

  When the data s + t + d are manipulated in the manner described above, this traffic uses the same format. In some cases, it may be necessary for the data t to be stored for later retrieval and for the data to send an alarm to the appropriate destination. This channel can not link this data directly to different destinations as this would involve switching. Another consideration that must come to mind is that the

  flag must have no meaning for the data s + t + d '.

  Since the above device must account for both cycles in the worst case of selection information and identity transfer, the system must not detect the condition "loss of frame synchronization" before 62 frames have occurred. place

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  without a flag being identified. It is therefore necessary to substitute a 63-stage counter for the 3-stage TDBT meters (FIGS. 1 and 3A) and EDBT meters (FIGS. 2, 3B and 4A). When any of these reaches 63, it resets IS and ST, or TST or EST to zero to introduce the resynchronization cycle. The AND gates, bringing ST, TST and EST to state 0, should also be controlled by the

63 sTrties of these meters.

  It is clear that the above description has not been

  only as a non-limitative example and that other variants may be

  be considered without departing from the scope of the invention.

-not a word

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Claims (5)

  1. An automatic telecommunication system in which a central office serves a number of remote terminals and the communication between the central office and the terminals served is performed numerically, characterized by only when a call is triggered by one of said terminals. an unsynchronized signal (hereafter referred to as a warning signal) is sent from the calling terminal to the central office, when the reception of the warning signal is sent to the call terminal by the central office a binary train containing a configuration synchronization, that during the detection of the synchronization configuration in the bitstream it receives from the central office the calling terminal replaces   the warning signal by a binary train which contains a configura-   synchronization, and the central detection of said synchronization configuration from the calling terminal indicates that the terminal is in synchronism with the central office, this detection producing the sending of an invitation signal to transmit, that the in the following IAT signal will be called, at the calling terminal, said signal IAT giving the calling terminal the instruction to transmit the number of the   desired terminal or other signals.   2. System according to claim 1, characterized in that said transmission of the synchronization configuration is performed at the bit rate used for the transmission line, after the detection of the synchronization configuration sent by the terminal, the central replaces the synchronization configuration that it itself sent to the terminal by a relatively low bit rate synchronization check code in the nth bit time slot of the digital words used for the communication, and that at the reception of said low bit rate verification code the terminal also replaces the synchronization configuration with a low bit rate verification code of this type, after which   said IAT signal is sent from the central office to the terminal.   3. System according to claim 1, characterized in that any synchronization is carried out using the nth intervals   time for binary element words used for said communication.   System according to any one of claims 1 to 3,   characterized by the fact that the detection of said synchronization check code either at the central office or at said terminal implies a   comparison with the inverse of said verification code.   5. System according to any one of claims 1 to 3, 14 2L4871 45   characterized in that some of said terminals are connected to a multiplexer which is itself connected via a channel   multiplexer to another central multiplexer, and that prior to synchronization   terminal the multiplex system is synchronized using the reverse code code as the synchronization check code.   verification mentioned above.