FR2484117A1 - VOICE SYNTHESIZER BASED ON PHONEMAS WITH INTEGRATED CIRCUIT - Google Patents

Abstract

THE SYNTHESIZER ACCORDING TO THE INVENTION IS PARTICULARLY SUITABLE FOR ITS IMPLEMENTATION IN THE FORM OF AN INTEGRATED CIRCUIT CHIP. THE VOCAL ASSEMBLY 60 INCLUDES A FIXED RESONANT FILTER AND A PLURALITY OF ADAPTABLE RESONANT FILTERS WHOSE RESONANCE FREQUENCIES ARE CONTROLLED ACCORDING TO THE VALUES OF CERTAIN CONTROL PARAMETERS. THIS ASSEMBLY IS IMPLEMENTED BY USING A CAPACITIVE SWITCHING TECHNIQUE WHICH ALLOWS THE ELIMINATION OF IMPORTANT COMPONENTS TO OBTAIN THE RELATIVELY LOW FREQUENCIES OF HUMAN SPEECH. IN ADDITION, A NEW DIGITAL TRANSITION CIRCUIT 50 IS INCLUDED WHICH ALLOWS A GRADUAL TRANSITION OF THE VALUES OF THE CONTROL PARAMETERS OF THE VOICE SET DURING THEIR PASSAGE FROM ONE PHONEME TO ANOTHER. A SINGLE GLOTTAL SOURCE GENERATOR 58 IS ALSO DESCRIBED THAT IS INTENDED TO DIGITIALLY GENERATE A GLOTTAL PULSE SIGNAL IN A MANNER WHICH ALLOWS EASY SPECTRAL SHAPING OF THE GLOTTAL PULSE.

Description

1. The present invention relates to speech synthesis and, more

in particular, a speech synthesizer based on phonemes intended to be implemented in a single

coated integrated circuit.

  Speech synthesizers based on phonemes

  the prior art mainly contain sets of vo-

cals made up of a plurality of resonant filters. Hitherto it has been considered impractical to produce such vocal ensembles as an integrated circuit

  for several important reasons. First, the threads

very resonant adaptable of the type commonly used in

vocal ensembles require resistances and con-

densifiers with relatively large values of fa-

  lesson in giving resonant frequencies in the relatively low frequency range of the voice. Of

  components of significant value translate into increased

  sensitive statement of the size of an integrated circuit. Second, the resonant filters of the vocal sets are

  high precision filters that are difficult to manufacture

  quer in the form of an integrated circuit within the limits of

rance required.

The present invention uses a new technique

  as capacitive switching for the implementation of a 2. voice assembly, as well as additional functions controlled by parameters, which eliminates the problems mentioned above and allows the realization of the voice synthesizer of the present invention in the form of a "chip "in silicon for integrated circuit. This technique not only eliminates the need to deal with high value components in the vocal ensemble, but also the imperative that the values, and therefore the size, of the components

  agree must be specific. On the contrary, as we see-

  ra below, with this capacitive switching technique of the present invention it is only necessary that the ratio

  of the components of the tuning components is precisely checked

  which makes it significantly easier to maintain

high levels of precision during manufacturing.

  In addition, the present speech synthesizer includes a single digital transition circuit which proceeds to a gradual transition of the values of certain parameters of the control signal between the different constant-state values allocated to different phonemes. In this way, contiguous phonetic sounds are integrated correctly

  in the production of seemingly natural speech.

The speech synthesizer of the present invention includes

  also takes a new glottal source, which generates nu-

  merically the glottal pulse signal in a per-

putting an easy spectral shaping of the waveform

  of this signal in the desired manner.

  In general, the speech synthesizer of this

  invention includes a coated silicon chip, which synthesizes

  continuously sound speech from data

input streams at low flow. The system includes a memory

  re dead of parameter storage containing parameter values defining 64 different phonemes accessed

  a command word of 6 binary elements, Two bi-elements

  Additional input strings are used to vary the pitch or inflection of the voiced phonemes. Parameters

  are produced by ROM in a multi-

tiplexed on parallel byte output buses. The pa-

  3. rameters which are used in the control of the vocal ensemble are initially supplied to a new digital transition circuit which is used to make a gradual transition from the variations of the values in the constant state of the parameters occurring from a phoneme to the other. As

as we will see later, this digital transition circuit

  that performs this function in a unique way by continuously adding an eighth of the difference between the target value of a parameter and its current value, and using

  the result as the new current value of the parameter.

  In the preferred embodiment of the present invention, the transition circuit is paced at a speed allowing approximately 70% of the target value to be reached.

within 33 milliseconds.

After transition, the parameters of the com-

  signals from the digital transition circuit are provided

  nis to the vocal ensemble to control frequencies of re-

sonance of resonant filters F1, F2 and F3, and for controlling the injection of vocal and fricative excitation energy into the vocal assembly. In addition, the "Q" or bandwidth of the

resonant filter F2 can be ordered separately to produce

re nasal phonemes like this is classic. The various parameter-controlled functions are implemented by the use of digital parameter signals parallel to four bits so as to selectively control the capacitive ratio of the capacitor circuits in the controlled circuits. The capacitor circuits are then closed and open at a predetermined frequency, so

that circuits with controlled capacitors effectively simulate

  a variable resistance element controlled.

  The glottal source generator circuit produces

a glottal pulse signal having a fundamental frequency

  tale which varies according to the setting of two bi-

inflection control naries. In addition, a certain degree of

  automatic inflection control is obtained by 'making equal

  Lely vary the fundamental frequency of the glottal signal in inverse proportion to the movement of the resonance frequency of the 4. resonant filter F1 of the vocal ensemble. The spectral shape

  of the glottal pulse is controlled by a pre-setting se-

  reading of applied analog continuous signal levels

at the parallel inputs of a multiplexer. The entrances to the

Multiplexer readers are connected to the output of a counter which is paced at a predetermined speed. The form

  waveform of the glottal signal produced at the serial output of the multi-

  plexer therefore understands a segmented approximation of an analog signal of glottal impulse with the levels

  various segments determined by the pre-

  rules. The present invention will be well understood during

  the following description made in conjunction with the drawings

attached in which Figure 1 is an overall diagram in the form of

blocks of a speech synthesizer system according to this in-

vention;

  Figures 2 to 8 show circuits of the system

the speech synthesizer of FIG. 1; FIG. 9 comprises a resistance equivalent to the part of the circuit of the vocal assembly of FIG. 4; Figure 10 is a sample waveform of a glottal pulse signal; Fig. 11 is a time diagram showing the time relationship between various clock signals, as well as the multiplexing arrangement in which the control parameters are produced by the parameter storage read only memory; Figure 12 is a diagram of the read only memory

  parameter storage representing how

the values of the control parameters are stored in the ROM; Figure 13 is a circuit model representing

the operating principles of the switching technique

capacitive tion used in the present invention; and Figure 14 is a time diagram showing

the time link between the clock signals without a path

  vauchement e l and e2 used in the capacitive switching circuit. In connection with Figure 1, a block diagram of a phoneme-based speech synthesizer 20 according to the present invention is shown. The system represented

sensed is intended to be controlled by a numeric input word

  byte risk. Six of the input bits 22 of the numerical control word are used for the selection of phonemes and the two remaining bits 56 for the

variation in the level of inflection or the height of the exit

  audio tie. The six bits 22 are triggered by a line 24 sampling signal to give a

storage order 26 of six bits, six of which are

  parallel links are applied to the six most significant address entries of a parameter storage read only memory

40. The sampling signal on line 24 also gives

ment to zero an output flip-flop 28 which causes an acknowledgment / request output line 30 to acknowledge receipt of the new data. The least significant signal of line 30 is also transmitted to a phoneme delay and pause synchronization circuit 44 so as to initialize the

  phoneme time counter, as will be described later

laughs in more detail.

  The parameter 40 read-only memory con-

holds data defining 64 different phonemes accessed by the six phoneme selection bits 22

  For each of these 64 phonemes, memory 40 contains 12 pa-

control signal rameters that define electronic-

  the phoneme. Each parameter stored in the memory 40 preferably comprises 4 binary resolution elements, which gives 16 different values for each parameter, at

except the synchronization command parameter of-

  phoneme which includes 7 binary resolution elements and has

  therefore 128 possible values. Memory 40 is pre-

  view to provide the appropriate set of control signal parameter values defining the particular phoneme identified by the bits 22 on its 8 lines of 6. data output in a multiplexed manner, so that

two control parameters with 4 binary elements are pre-

  smells at all times on the 8 data output lines,

except again for the syn- command parameter

  phoneme chronization which uses 7 of the 8 data outputs. The parameter storage read-only memory 40 is further accessed by three selection bits of

parameter 48 which are supplied by the output of a time circuit

porel 38 to the three least significant address entries of the

  memory 40. The time circuit 38 includes an internal circuit

  dull master clock 32 which produces a signal having a frequency which is determined according to the values of an external RC circuit connected to the input terminal MCRC. Alternatively, the input terminal MCRC can be grounded and an external clock signal supplied directly to the additional clock input terminal MCX. The signal

  master clock from the output of circuit 32 is ap-

plucked to a repetition counter 34 which can produce 8

  clock signal outputs at various predetermined frequencies

  born. Three of these signauns include the parameter selection bits which are provided by line 48 to

  Least significant address entries in the parameter memory

  very 40. The outputs of counter 34 are then applied to

  a non-overlapping trigger and clock circuit 36

two-phase ment, which develops the 12 time signals

  used in all parts of the system.

To summarize, the 6 binary elements 22 of selection

phoneme tion identify the particular phoneme desired and the three parameter selection bits 48 determine which of the 12 control signal parameters defining the identified phenomenon are present in the output data of the parameter storage memory 40

at any time during the duration of the phoneme. Some of the parameters

control signal which must be supplied to the

  seems vocal require a transition operation so

to clip the sudden variations occurring in the va-

7.

  their command parameters between a phoneme-and the pho-

  next nth. As a result, the data output lines

born from read only memory for storage of trans-

  putting these control signal parameters are connected to a digital transition circuit 50 which digitally implements the desired transition function. The lines

output of data from the ROM of sto-

ckage of the parameters transmitting the signal-parameters of

remaining commands that relate to the various time functions

  porelles and do not require any transition are connected di-

directly to circuit 44. As will be described later-

  In detail, circuit 44 includes a counter which is

  paced at a frequency determined by the com parameter

  phoneme synchronization command so as to control the duration of each phoneme. More particularly, the count rate of the counter is determined by the frequency of the clock signal of a line 43 coming from the output of a sub-phoneme clock synchronization circuit 42, which comprises

essentially an oscillator whose frequency is controlled

  dée by the command parameter of synchronization of phonè-

  me. When the counter reaches a predetermined count, an output signal is produced on a line 45 which loads the output flip-flop 28, bringing the output line 30 of weight

strong to indicate that a new phoneme data is required.

The synchronization circuit 44 also includes a voice delay and closing delay circuit which is

  essentially consisting of an amplitude comparator intended

born to compare the counting output of the phoneme time counter with the values of the control signal parameters

  vocal delay and delay in closings presented to the exits

  memory 40. When a condition of equivalence is

detected by the comparator, the duration of the delay is over.

  The purpose of the voice delay control signal parameter

  is to delay the transmission of the am-

  vocal fullness, and therefore delay or maintain

  injecting voice excitation energy into the whole vo-

  cal, for a predetermined duration less than the duration 8. of a phoneme time interval, during certain fricative-vowel phonetic transitions where the amplitude of the fricative component decreases rapidly while the amplitude of the vocal component increases quickly. The

  closing delay control signal has a function if-

  milaire and serves to delay the transmission of am-

  fricative fullness and closing control. The implementation of the delay function is carried out each time a voice delay or closing delay control signal parameter is present, effectively "freezing" a digital transition circuit 50 during the period of

  transmission for am- command signal parameters

  fricative fullness and vocal amplitude, respectively, for a period of time specified by the value of the parameters of

  voice delay and closing delay control. Like this-

la will be described later in more detail, this-

the function is executed by a gel transition circuit 46 which effectively loops a write / read line 47

to a random access memory of the digital transition circuit 50.

  Control signal parameters, after trans-

  sition, at the output of the digital transition circuit 50

  are demultiplexed by a flip-flop circuit 52 in accordance with

tee with appropriate time signals from the circuit

  38 which are supplied via a clock circuit

  synchronization ge 54 for controlling the rhythm of the

  cules 52. In addition, a glottal source circuit 58 produces a glottal synchronization signal at the beginning of each

glottal pulse period which is also supplied to the circ

  cooked 54 by a line 55 so as to trigger the parameters

de- control signal Fl, F2, F2Q and F3 in the tran

sition 50.

  The voice excitation signal is generated digitally-

ment by the circuit 58 in accordance with the two binary elements 56 for selecting inflection of the digital input byte order word, which control the fundamental frequency of the glottal signal. In addition, it will be noted that a certain degree

automatic inflection control is provided by doing

24 841 17

9.

also the fundamental frequency of the excitation signal

  voice in accordance with the inverse of the control signal parameter Fl (F1). The resulting voice excitation signal is then supplied to a voice amplitude circuit 62 which modulates the amplitude of the voice excitation signal by

  compliance with the amplifier control signal parameter

vocal study before the injection of the vocal excitation signal

the in a vocal set 60.

  The fricative excitation signal is provided by

  a white noise generator 64. During fricatives see

sées (for example z, v) when the excitation energies

both fricative and vocal are present, the general

  white noise leveler 64 puts closed during the last part

  tie or part-of "rest" of the glottal pulse signal under the control of the signal FGATE of a line 65 coming from the circuit at the glottal source 58. The resulting white noise signal coming from the output of the generator circuit 64 is applied to a high-pass noise shaping circuit 66 and

  of fricative amplitude which has the function of filtering the

  general fricative excitation and modulate its amplitude

compliance with the amplifier control signal parameter

fricative study before injection into the vocal assembly 60 under the control of the fricative control parameter (FC)

and its inverse. (FC).

The vocal assembly 60 in the embodiment

particular of the present invention comprises four threads

  very resonant connected in series and represented by Fl, -

  F2, F3 and F5. The resonance frequencies of the IF filters at

F3 can be controlled according to the parameters of

general command Fl, F2 and F3. Bandwidth or "Q"

  of the second order resonant filter (F2) in the set vo-

cal 60 is also controlled by the control signal parameter F2Q. Finally, the output of the vocal assembly 60 is applied to the closing circuit 68 whose function is to suddenly modulate the amplitude of the audio output signal

in accordance with the closing control signal (CL).

  Now in connection with Figures 2 to 8, and 10.

  more particularly with FIG. 2, a diagram of the circuits

of the speech synthesizer 20 of the present invention is shown. As already indicated in connection with

  the description of the diagram in the form of blocks of FIG. 1,

synthesizer 20 must be controlled by a digital byte input control word. The 6 phoneme selection bits (PO-P5) are provided in parallel with

  data inputs D of the flip-flop 26 to 6 binary elements.

The data present on the phoneme selection lines

  (PO-P5) is paced in flip-flop 26 by an exchanging signal

  tillon produced for line 24 which also serves to reset the output flip-flop 28, which requires the

  line 30 to acknowledge receipt of the new phonè-

me. The low-weight output signal from line 30 also serves to reset a phoneme time counter 84, the function of which will be described later. The Q outputs of flip-flop 26 are applied to the address inputs of

  most significant (A3-A8) of the parameter storage read-only memory

  very 40. The three remaining low weight address entries

ble (AO-A2) of memory 40 are connected to the bi-

  parameter selection naries 48 from the output of the

circuit 38. As indicated above, the para-

  meters of control signal defining the phoneme identified by the phoneme selection bits 22 are produced in multiplex at the data outputs (DO-D7) of memory 40 in accordance with the three bits 48

parameter selection.

Although known to those skilled in the art, the functions

  the various control signal parameters produced

by memory 40 will be briefly summarized so that

  provide a better understanding of how the system works

* subject of the present invention.

  The control parameters F1, F2 and F3 determine the locations of the resonant frequency blades in the

first three variable resonant filters of the set vo-

cal. The FC fricative command parameter replaces two

  control parameters normally provided in the syntheses

  11. sisters of this type; i.e. the frequency parameters of

  fricative and low-pass fricative control.

  specifically, it has been determined that generally, when a phonetic

  fricative me requires a low fricative energy

quence in the range of the characteristic tone of vowel F2, it does not require a significant quantity either

high frequency fricative energy in the tone range

  vowel F5 characteristic, and vice versa.

The invention uses a single parameter for controlling frica-

  tive (FC) and the inverse of this control parameter (TC) for

  the control of the parallel injection of the frictional energies

high and low frequency in the vocal ensemble. The parameter-

  The F2Q control tre varies the "Q" or bandwidth of the second order resonant filter F2 of the vocal ensemble and is used mainly in connection with the production of

nasal phonemes' ln "," m "and" ng ". The nasal phonemes pre-

  typically feel a greater amount of energy at the first characteristic tone of vowel F1 and substantially a lower and wider energy content for the tones

  higher vowel characteristics. So during the pre-

  sence of nasal phonemes, the control parameter F2Q is

generated in order to reduce the "Q" or increase the

  bandwidth of the resonant filter F2 which, as a result of the

  resonant filters in the vocal ensemble in series, prevents significant amounts of energy from reaching the characteristic high vowel tones. The voice amplitude control parameter VA is generated each time a

phoneme with a voiced component is present. The pa-

* voice amplitude control branch controls the intensity of the component voiced in the audio output. The FA fricative amplitude control parameter is generated each time

  once a phoneme with an unvoiced component is pre-

smells and is used to control the intensity of the

  health not seen in the audio output.

ture CL is used to simulate the interaction of phonemes which occurs, for example, during the production of the phoneme "b" followed by that of the phoneme "e". In particular, the closing command parameter 12, when supplied to the closing circuit 68, is designed to cause modulation

  abrupt amplitude in the audio output which simulates the state

  blinding and brutal release of energy occurring during the pronunciation of phoneme combinations of this

  kind. The Voice Delay (VD) control setting is used

  read mainly during certain phonetic transitions

  fricatives-vowels o the amplitude of the component of frica-

  tive would quickly go out while the amplitude of the

  the voice component is increasing rapidly. This parameter is thus used

  if to delay the transmission of the amplifier control signal

  vocal study (VA) in such circumstances. The CLD closing delay command parameter is also used

especially during certain phonetic transitions vowels-

  where it is desirable to delay the transmission of the CL closing control parameters and the amplitude of

  fricative FA as described in connection with the para-

  voice delay control meter. The PAC pause command parameter is generated each time a pause phoneme is selected to insert a period of silence into the speech. However, as the articulation pattern of the vocal ensemble is "frozen" during a pause phoneme

  until all the excitation energy of the whole vo-

cal is completely dissipated, an additional function

important is also provided by the pause phoneme.

- In particular, certain words whose end tends to "se

  lose ", such as words ending in phonemes na-

  saux, behave as if an additional phoneme had

been included when the articulation scheme of the last pho-

nth changes abruptly before the excitement of the vocal ensemble's energy is completely dissipated. For example, the English word "sun" may look like "suna". This is d

to the fact that the residual excitation energy in the set-

  ble vocal is vocalized as something other than an "n" after the duration of the phoneme "n". Inserting a pause phoneme after the phoneme "n" in this example will therefore improve speech recognition by

248 4 1 17

13. freezing the articulation scheme of the phoneme "n" until

that the totality of the energy of fricative excitation and voca-

  be dispelled. The final command parameter is the pa-

  phoneme synchronization control ram which is pro-

duit for each phoneme and is used to establish the du-

production of the phoneme.

  The parameter storage read-only memory 40 in the particular embodiment of the present invention has the configuration shown in FIG. 12. In particular,

  memory 40 allows the storage of 12 values of the para-

  control signal meter for each of the 64 phonemes identifiable by the phoneme selection bits 22. Each parameter has four bits

  resolution except the control signal parameter

of synchronization of phoneme which comprises seven binary elements of resolution. Thus, for example, as shown in FIG. 12, when the selection-parameter binary elements 48 are equal to 0.11, the signal signal parameter

  closing command (CL) will be present at the data outputs

D0-D3 from memory 40 and the control signal parameter F3 will be present at the data outputs D4-D7 of the

  memory 40. Likewise, when the binary elements of para--

meter 48 is equal to 100, the com-

closing delay command (CLD) and F2Q will be present at the data outputs D0-D3 and D4-D7, respectively, from memory 40. In the particular embodiment of the present invention, the frequencies of the binary elements 48

  parameter selection are 40 KHz, 20 KHz and 10 KHz.

Thus, as the duration of the phonemes varies approximately from

  50 to 250 milliseconds, we can notice that each parameter

The control signal will be generated on the data output lines DO-D7 of the memory 40 a minimum of approximately 500 times during the duration of each phoneme. A time diagram representing the relationship between the parameter selection bits 48 at the address inputs AOA2 of the memory 40 and the data outputs DO-D7 of the memory

is shown in figure 11.

14. Parameter selection signals for lines 48 are generated at outputs Q4-Q6 of the repetition counter

  to 10 binary elements 34 which is punctuated by the clock signal

mother box, which in the embodiment of the invention is set at 1.28 MHz. As the man in the art will later note, the variation in the frequency of the master clock

will vary the height of the head and the frequency

  this from the audio output. In addition, by varying the frequency

  quence of the master clock above or below the value

  necessary for normal speech ranges, the present system

teme can be used to produce high sound effects

textured.

  The outputs QO-Q3 of the counter 34 are applied to the data inputs (D) of a first flip-flop 70 with four binary elements and its outputs Q4-Q6 and Q9 to the inputs of

  data (D) of a second flip-flop 72 with four bi-elements

  naries. The three most significant Q outputs from the

  flip-flop 70 include binary element clock signals

  re Q, bit 1 and bit 2 which are

  supplied to the digital transition circuit 50, the des-

cription will be given later. The remaining Q output signal from flip-flop 70 is supplied by a line 73 to an R-S flip-flop 74 so as to produce at its terminal

  SET output a clock signal (el) having a double frequency

ble of that of the clock signal with binary element 0 and opposite phase. Clock signal 61 is also used

in the digital transition circuit 50. The three outputs

  low-order Q links of flip-flop 72 include the if-

  A0-A2 clock signals that are used in various settings

  system to control the pre-

  feels and to demultiplex the command parameters of

  transition. AO-A2 clock signals have the same frequency

what the parameter selection signals supplied by lines 48 to the address inputs AO-A2 of memory 40, with

only a slight shift.

  In addition, it will be noted that the output signal Q3 of the counter 34 is also applied to a pair of flip-flops 15. R-S 77 and 78 so as to produce at the output terminals RESET clock signals with low overlap el and e2. As shown in Figure 14, the clock signals $ 1 and 02 have

  phases in opposition and in the partial embodiment

  of the invention have a frequency of 20 KHz. The clock signals el and e2 are used mainly in connection with the implementation of the control technique by capacitive switching parameters described below, although they are also used simply as signals

  convenient clock. Likewise, the output signal Q5 of the comp-

  tor 34 is further supplied to a pair of flip-flops RS 75. and 76 so as to produce at the output terminals RESET (reset) a second pair of clock signals without overlap Pl and P2 which also have phases in opposition of the same

  so that the clock signals dl and e2, and have a frequency

  this of 5 kHz in the particular embodiment of the invention

tion. The clock signals P1 and P2 are used only in the sub-phoneme clock circuit 42 (FIG. 7) which will be

described later in more detail.

  Parameter values stored in memory

  dead 40 which are generated in the data output lines

most significant born D4-D7 include control parameters

  of the vocal ensemble that require a trans operation

  dynamic sition and are therefore supplied to the

digital transition 50 which will be described later. However

In this case, the parameter values stored in memory 40 which are produced in the least significant data output lines DO-D3 are essentially "closed / open" signals.

or synchronization signals requiring no operation

transition ration and are therefore supplied direct-

ment to the phoneme, pause and delay synchronization circuit.

  The operation of the synchronization circuit

  phoneme will now be described. The seven least significant binary elements DO-D6 coming from the output of the parameter memory 40 are supplied to the data inputs (D) of a flip-flop with seven binary elements 80 which is paced 16. by a signal received on a line 85 from output channel nc 7 of an eight-channel multiplexer 86. The binary control inputs A, B and C, of the multiplexer 86 are linked to the clock signals AO-A2 coming from the output of the flip-flop 70 of the time circuit 38. Thus it will be noted that,

  when the AO- parameter selection bits

  A2 are equal to 111, indicating that the signal parameter of

  phoneme synchronization command is present at the outputs

data links DO-D7 of the read-only memory 40, the output channel n0 7 of the multiplexer 86 will have a high pointing level

in flip-flop 80 the value of the com- signal signal parameter

  phoneme synchronization command.

  Again, in connection with FIG. 7, the seven parallel outputs (PHOPH6) of the flip-flop 80 are applied to the sub-phoneme clock synchronization circuit 42 which effectively comprises an oscillator circuit whose

  frequency is controlled-by the value of the seven bi-elements

  output naries of this seesaw. In particular, the outputs

  flip-flop 80 (PHO-PH6) control state "closed / or-

green "of seven analog switches, as shown, which are individually connected in series with one of the seven

  binary-weighted capacitors connected in parallel.

  As will be described later in connection with the

vocal ensemble cription, thanks to fast switching

  of the capacitive network 79 as described under the order

  of clock signals without overlap Pl and P2, a value

their resistance is effectively simulated which is equal to the inverse of the product of switching frequency (Pl) and

  the resulting capacity value of the capacitive circuit 79.

  In other words, the value R simulated in the partial mode

The embodiment of the present invention is determined by the following relation R

K (C79)

  Therefore, the frequency of the output signal from the oscillator-

  reader- 42 on line 88 is given by the product of la- va-

  their of the resulting resistance (R) and the value of the 17. fixed capacitance (C) of the time circuit RC of the oscillator 42. Returning to FIG. 2, the output signal of the line 88 coming from the circuit 42 is applied to the clock input of a phoneme time counter 84 and thus determines its counting. The duration of the phoneme is determined by the period of time that it takes counter 84 to reach a count equal to 16. In particular, when the outputs (QO-Q3) of counter 84 are equal to 0000, the output of a gate NO OR 90 will be at the high level, providing a high level signal to the data input of a flip-flop 92. After a short time, specifically, two pulses of the clock signal P2 - the output of a door NO AND 94 will pass

  at the low level - to load the output flip-flop 28 by the

  through an inverter 96 and force line 30 to indi-

quer that a new phoneme data is necessary.

  The operation of the voice delay and closing delay circuit will now be described. As previously stated, the purpose of the control command signal * parameters

voice delay and closing delay is delay delay

  During a predetermined part of the duration of a phoneme, the transmission of the voice amplitude and fricative amplitude control signals, respectively, during certain phonetic vowelfricative transitions. This is done

  as follows. The four outputs (QO-Q3) of the com-

tor 84 are applied via inverter 100

  at the inputs (B) of a four-element amplitude comparator

binary elements 82. The inputs A of comparator 82 are linked to the data outputs DO-D3 of memory 40. The output A = B of comparator 82 is supplied by a line 102 to a pair of NO gates and 104 and 106. L the other input of gate 104 is connected via a line 110 to the output channel No. 5 of multiplexer 86 and the other input of gate 106 is connected via a line 108 to the channel of output nO 4 of the multiplexer 86. Thus, it will be noted that, when the clock signals A2-AO supplied to the binary control inputs A, B and C of the multiplexer 86 18. are equal to 101, indicating that the parameter of the signal of voice delay control (VD) is present at the data outputs DO-D3 of memory 40, and that the outputs QO-Q3 of counter 84 are equal to the parameter value of the voice delay control signal, the two inputs NAND gate 104 will have a high level, bringing the output of NAND gate 104 to low level to load a switch ule 112. Similarly, when the clock signals A2-AO are equal to 100, the output channel no. 4 of the multiplexer 86 on the line 108 will have a high level indicating that the parameter of the closing delay control signal is present at the data outputs DO-D3 of memory 40. Consequently, when the output of counter 84 simultaneously reaches a count equal to the parameter value of the closing delay control signal, the output A = B of the comparator amplitude 82 on line 102 will also have a high level, thus supplying high level signals to the two inputs of the NAND gate 106 and forcing its low level output to load a flip-flop 114. As will be seen later, the signals of outputs of flip-flops 112 and 114 are applied to the circuit

  of transition from "gel" 46 (Figure 3) which effectively inhibits-

the transition process in the transi-

digital tion 50 during the transition of the parameters of

  general command of vocal amplitude and fricative amplitude.

  The flip-flops 112 and 114 are reset to zero at the end of each duration of the phoneme by a low-level reset pulse on a line 124 coming from the output of an AND gate 122. The output of the AND gate 122 passes at the low level at the end of each phoneme duration by the high level reset pulse produced by the counter 84 on the line

  which is inverted by an inverter 120 and applied to the in-

  * entry of AND gate 122. Note that the output "equal to" of

  comparator 82 is also reset to low level at the start

cementing of each new phoneme when the output (QO-Q3) of counter 84 is equal to 0000 by the resulting high level signal produced at the output of the NOR gate 90 which is

inverted by an inverter 98.

  19. In addition, it should be noted that the closing delay control signal (CLD) parameter is also used.

  to inhibit transmission of the control signal parameter

of closing (CL) to a closing circuit 68 (FIG. 1).

  In particular, during the duration of the closing delay the

  output of flip-flop 114 is at low level, and therefore

  a low level signal is supplied on a line 126

  to one of the inputs of a NON AND 128 gate with three inputs.

  The two remaining inputs of gate 128 are connected to a line 116, which is linked to output channel No. 3 of the multiplexer 86, and to a line 115 which is connected to the data output D3 of memory 40. When a closing signal is present, the data outputs DO-D2 of memory 40 are not used because the closing command signal is simply an opening type signal /

  closing. Therefore, only the state of the data output

  born D3 from memory 40 on line 115 is controlled during

  for the duration of the closing parameter when the A2AO clock signals are equal to 011 and the output channel

  nu 3 of the multiplexer 86 on line 116 is at the high level.

However, even if high level signals are present on both lines 115 and 116, the output of NAND gate 128 will not go low to reset

  the initial state flip-flops 132 and produces a close signal

  low level at the exit of the gate ET 136 until the scale 114 is loaded at the end of the duration of the

closing delay, and a high level signal is pre-

felt on line 126. When the iron delay function

meture is not present and that the output of the flip-flop 114 is at the high level, a low level closing signal will be produced at the output of a NAND gate 136 when high level signals are detected coinciding with the times on line 115 from data output D3 of memory 40 and on line 116 from

output channel 3 of multiplexer 86. The closing signal

ture ends when the output of a NAND gate 130 goes low so as to load the flip-flop 132, which happens when the output channel no 3 of the multiplexer 86 on the line 116 is at the high level and that the data output D3 of the memory 40 is at the low level, which indicates that the closing function is no longer desired. This typically occurs at the beginning of the next phoneme if that phoneme does not also require the closing function, because

  the output of the closing delay flip-flop 114 on the line

  gene 126 will always be at least temporarily high

at the beginning of each phoneme.

  In addition, it will be noted that an iron control signal

  meture is also produced whenever the values of the voice amplitude (VA) and fricative amplitude (FA) control parameters are equal to zero. In other words, when the signals VA and FA coming from NOR gates 190 and 192 (FIG. 3) are both at the high level, the output of the NAND gate 134 will be at the low level, which has the effect of produce a low level closing signal at the exit of the door ET 136. This is used to make completely silent

  the vocal ensemble for periods when no ex-energy

citation is not present in the set to avoid bour-

  data and other forms of noise are not produced during

during break periods.

  The remaining non-transition control parameter produced at the data outputs DO-D3 of memory 40 is the pause control parameter (PAC). As already mentioned, the pause command parameter is generated whenever a phoneme of silence is desired, and is also used to freeze

the positions of the characteristic vowels tones of the

seems vocal until all the excitation energy is dissipated. The pause control parameter is similar to the close control (CL) parameter in that it is an open / close type parameter and therefore requires only one bit of signal data. For convenience, the data output D3 of memory 40 is again selected and the data outputs DO-D2 are not used. The data output D3 from memory 40 on line 115 is applied to the input of a NAND gate 138 of which 21. the other input is connected to bare output channel 6 of the

  multiplexer 86. Therefore, when the clock signals

lodges A2-AO are equal to 110, which causes the transition to

  high level of output channel No. 6 of multiplexer 86, indi-

  as the pause command parameter is present at the data outputs DO-D3 of memory 40, and that the data output D3 on line 115 is also at the high level, the output of the NAND gate 138 will go to the level bottom and will load a flip-flop 142. The output of flip-flop 142 is at

  its turn applied to the entrance of an ET 146 gate whose au-

The input is connected to the output of a NAND gate 144.

The inputs of the NOT AND 144 gate are connected to the

  VA and FA signals from the NO OR 190 and 192 door outputs (Figure 3). Therefore, since the energy

of vocal and / or fricative excitement is always present during

in non-silent phonemes, the exit from the door NO

ET 144 will normally be high. Therefore, when

that flip-flop 142 is loaded at the start of a pause phonreme, a high level signal will be produced at the output

AND gate 146-, which is applied to the transition circuit

  tion of gel 46 (Figure 3) and, as will be seen later-

  allows to inhibit the digital transition circuit to maintain the transition control parameters at their current values. The signal "characteristic tones of gel vowel" of high level at the exit of the door AND

  146 will be finished, however, as soon as all the excitation energy

voice and fricative has been completely dissipated, or at the

end of a pause phoneme whatever the event occurs

  duisant first. In particular, when the signals VA and FA both pass at the high level, the output of the NAND gate 144 will pass at the low level and will force the output of the

  gate ET 146 to pass at the low level. Conversely, if the output

  tie of the gate NOT AND 144 is always at the high level at the end of the pause phoneme when the data output D3 of the memory 40 on the line 115 goes to the low level, the reset

at zero of flip-flop 142 by the result of the low level signal

  so much produced at the exit of the door ET 140 will oblige the exit

22.

  door ET 146 to pass at the low level.

More particularly in connection with FIG. 3,

  the operation of the digital transition circuit 50 se-

ra now explained. As already indicated, the purpose of this circuit

  cooked 50 is to ensure a gradual change in values

control parameters of the vocal ensemble between values

  their old or "current" values and new values

  "target" values or values. The four parameter lines TO-T3 coming from the data outputs D4-D7 of the memory 40 are applied to the input channels 1 to 4 of an 8-channel multiplexer 150. The binary control inputs A, B and C of the multiplexer 150 are connected to bit 0, bit 1, and bit 2 transition clock signals, respectively, from the circuit

38 (Figure 2). The temporal relationship between si-

  binary element 0 - bit 2 transition clock gnals and the clock signals of parameter AO-A2 is shown in figure 11. As can be easily seen in the time diagram of figure 11, the signals bit element clock 0 - bit element 2 define

eight states within each state defined by si-

AO-A2 clock signals. It will be recalled that the time signals

  AO-A2 boxes define the parameter which is present on the four TG-T3 parameter lines coming from the outputs of

data D4-D7 from memory 40.

  The multiplexer 150 thus serves to transform the data

  parallel input lines of TO-T3 lines in serial data on an output line 151 in preparation for functions

arithmetic of series which will be carried out later.

In addition, however, as the parallel output of the digital transition circuit is ultimately drawn from the

four most significant bits of the parallel output signal

  the byte from the output flip-flops 168 and 170, and that the input lines TO-T3 to the transition circuit are connected to the input channels 1 to 4 of the multiplexer 150 and therefore shifted 3 bits downwards by compared to

the output, the multiplexer 150 also serves to divide ef-

23.

the value of the "target" parameter by 23 or 8.

  The serial output of multiplexer 150, which is therefore equal to 1/8 of the value of the target parameter, is

  supplied on line 151 at input B of an energy adder

binary elements 158. The input A of the adder 158 is

  connected to the summation output (E) of a second addition-

  binary element neuron 156. The input A of the adder 156 is connected to the serial output of a second eight-channel multiplexer 152 which is simply used to transform the resulting parallel output signal from the circuit

  digital transition 50 to serial signal. Thus, the signal pre-

  lies on a line 153 coming from the serial output of the multiplexer 152 represents the most recent value or

  current value of the command parameter. Entrance B of the ad-

  adder 156 is connected to the serial output of a third

  me eight-channel multiplexer 154 which is also used for trans-

forming the parallel output signal from the digital transition circuit 50 into a serial signal. However, as the four most significant bits of the flip-flop 168 output signal are shifted down by three bits and connected to the input channels 1 to 4 of the

multiplexer 154, this also serves to effectively divide

the current parameter value by 8. Thus, as the

  serial output of multiplexer 154 on a line 155 is supplied

  negates input B from adder 156 via

of an inverter 172, it will be noted that the adder 156 sub-

  effectively draws 1/8 of the current parameter value

  of the current parameter value and provides the total to the

  input A of the adder 158. The adder 158 then adds

in total of the adder 156 1/8 of the target value of pa-

  branches. The value of the resulting signal at the output of summa-

tion (E) of the adder 158 on line 165, which represents

  feels the "new" current parameter value, is therefore

  sequence given by the following equation: (Current value - 1/8 current value) + 1/8 target value = new current value The serial signal on line 165 coming from the

* 248 4117

  24. summation output of adder 158 is transformed back into parallel signal by a pair of Hex D flip-flops 160 and 162, and the resulting byte signal is supplied to the 8 data inputs DO-D3 of a pair of active memories of temporary storage 164 and 166. The address entries AO-A2 des.mémoi-

  res 164 and 166 are connected to the parameter clock lines

be AO-A2. Thus, it will be noted that as long as the R / W inputs of memories 164 and 166 remain validated correctly,

  each new current successive parameter value se-

  ra correctly stored in memories 164 and 166 in the address locations identified by the clock signals

AO-A2 parameter.

  The read / write (R / W) inputs of the two meta

mories 164 and 166 are connected to the output of an OR gate 172, one of the inputs of which is connected to the serial output of a multiplexer 174 and the other of which is linked to the clock line e2.by an inverter 173. The binary control inputs A, B and C of the multiplexer 174 are also linked to the parameter clock lines AO-Q2. The five least significant input channels of multiplexer 174 (nu 0-4) are connected to the output of a first NO gate 176, the input channel no 5 is connected to the output of a second NO gate AND 178, and the bare input channel 6 at the output of a third NAND gate 180. One of the inputs of the NAND gate 176 is linked via an inverter 182 to the signal line "Freeze vowel characteristic tones" (FF) so that, when a high level freeze signal is produced, the output of the NAND gate 176 goes high. Likewise, one of the inputs of each NAND gate 178 and 180 is connected to the voice delay (VD) and closing signal lines.

  (CLD), respectively, so that when a signal of re-

late voice or low level closing is produced, outputs

NOT AND doors 178 and 180, respectively, pass through

high level.

  Thus, it will be noted that, in the absence of a voice delay (VD), closing delay (CLD), or tone of gel vowel (FF) signal, the serial output of the

24841-17

  25. multiplexer 174 will remain low and the R / W inputs of memories 164 and 166 will be paced under the control of the clock signal ç2. Consequently, new current values for each parameter will be written in memories 164 and 166, then read on the data outputs QO-Q3 of memories 164 and 166. With the frequency of the signal

  clock 02 in the preferred embodiment of the invention

  tion set to 20 KHz, a parameter will normally transition to approximately 70 6 of its new

target position in 33 milliseconds.

However, when a signal (FF) is produced, the serial output of multiplexer 174 will go high.

  so as to inhibit the R / W inputs of memories 164 and 166 during

during the periods during which the binary elements of parameter A2-AO are equal to 000, 001, 010, 011 and 100,

  which corresponds to the production periods for the parameters

  control types Fl, F2, FC, F3 and F2Q. Therefore, when

as this happens, new values for these parameters

very will not be written in memories 164 and 166 and-

  the values of these control parameters will be effective-

  frozen at their current values as long as the FF signal is produced. Similarly, the presence of a voice delay (VD) signal will cause the serial output of multiplexer 174 to go high and inhibit the R / W line 47 connected

memory at 164 and 166 during the speech amplitude parameter period or "101" and will prevent new values for the speech amplitude parameter from being written to memories 164 and 166 until the end of the voice delay signal. Finally, when a closing delay signal

(CLD) is produced, the serial output of the multiplexer 174 steps-

  will be high during the amplifier setting period

  of fricative or "110" and therefore will maintain the value of the fricative amplitude parameter until the signal

closing delay is over.

The eight parallel data outputs Q0-Q3 of memories 164 and 166 are applied to a pair of flip-flops

  output to four binary elements 168 and 170 under the com-

  26. command of the clock signal e1. The four most significant bits, as noted above, or the

  outputs Q of the output flip-flop 168 are then demultiple-

  xed by a plurality of flip-flops 194-200 so as to supply the transition control signals F1, F2, FC, FC, F3, F2Q, VA and FA which are supplied to the various parts of the assembly

  vocal 60. In particular, the four Q outputs of the bascu-

the 168 are connected in parallel to the data inputs (D) of each of the 194-200 demultiplexing flip-flops. The 194-200 flip-flops are rhythmic under the control of signals

AO-A2 parameter clock which are connected to the

A, B and E of a 3/8 line decoder 210. The output channels 2,5 and 6 of the decoder 210 are connected directly to the

  clock inputs (CK) of flip-flops 196, 199 and 200, respectively

  tively. However, the output channels 0, 1, 3 and 4 are subject to

  feels an AND operation by the synchronization pulse glot-

  tale of line 55 in doors ET 202-208 connected to

  clock inputs (CK) of flip-flops 194,195, 197 and 198. Ain-

if, we will notice that the transition values for the pa-

  Rameters FC, F0, VA and FA are rhythmized in flip-flops 196, 199 and 200, respectively, as of the update, while the transition values for the parameters Fl, F2, F3 and F2Q

  are punctuated in scales 194, 195, 197 and 198, respectively

tively, in synchronization with the glottal impulse

from source 58 (Figure 6).

In addition, it will be noted that the scale of demultiple-

xage 195 which produces the F2 transition control signal parameter also receives the fifth bit the

  most significant (1/2 LSB) of the output byte pro-

  from the digital transition circuit 50 so that the transition value for the control parameter F2 has five bits of resolution. This is done to increase

the pitch resolution of the control parameter F2 due to the extent

  due to the higher frequency of the resonant filter F2 in the

sounds vocal 60 (Figure 4).

Now in connection with FIG. 6, the single glottal source circuit 58 of the present invention will be 27. now described. The duration of the glottal pulse signal is determined by the time it takes for a byte counter, consisting of counters with four cascaded binary elements

220 and 222, to count from a pre-count

  set up to 00. Specifically, the counters 220 and 222 are punctuated by the clock signal e2 of 20 KHz. The three most significant data inputs (Ll-L3) of counter 222 are connected unlike the three binary elements

  least significant (FlO-Fl2) in the com- parameter

  mande Fl transition from the output of the scale

194 (Figure 3). The inverse of the most significant binary element

  ficative (F13) in the Fl transition command parameter

  and the two bending control binary elements (Il-

I2) 56 from the byte input command word are

  provided to the three least significant data entries

ves (LO-L2) of counter 220. The data present at the inputs

  (LO-L3) of counters 220 and 222 is loaded in the accounts

  ters so as to preset them at the end of each period

  glottal impulse when a high level signal is pro-

  leads to the carry output (TC) of the counter 220, which is

supplied by an inverter 228 and supplied by a line 230 to

Load inputs (LD) of counters 220 and 222. Consequently

  this, like the frequency of the carry signal from the comp-

tor 220 determines the frequency of the pulse signal

tale, we will notice that the fundamental frequency of this signal

  is controlled by setting the control bits

  of inflection 56 and, to a lesser degree, by the value of the pa-

Fl control ram. As the Fl control parameter is

inverted, the fundamental frequency of the glottal signal varies

ra in reverse. In other words, when the value

  of the Fl parameter decreases, the height of the audio output increases

  you. This allows for some degree of self-control.

  inflection matic in the audio output in addition to the varia-

  programmable height adjustments allowed via

  re binary control elements of inflection 56. However

Dant, it will be noted that, as the two binary control elements of inflection 56 are supplied to data inputs 28. counters 220 and 222 of a higher weight than that of

  binary elements of parameter Fl, the automatic changes

  inflection issues that arise from movement in frequency

  this resonant of the resonant filter F1 will have a less pro-

  stated on the pitch of the audio output that changes

  programmed performed via binai-

res 56.

  In addition, it will be noted that a third counter 224 with 4 binary elements is provided which is loaded with the same data and validated simultaneously with counter 220. The only difference is that counter 224 is punctuated by the clock signal AO and consequently counts twice as fast as counter 220. The carry-over output (TC) of counter 224 is connected to the "load" input (SET) of a flip-flop RS 226 and

the reset input (RESET) of this flip-flop is connected

  ted at the transfer output (TC) of flip-flop 220. Thus, the output of flip-flop 226 on line 65 will be set at the low level at the beginning of each glottal pulse and will go to the high level at mid-distance of the pulse glottal. The signal on line 65, called the FGATE signal, is supplied to the white noise generating circuit 64 (FIG. 8) so as to inhibit the

  white noise signal during the first half of the pulse

  glottal sion for voiced fricative phonemes when the energies of vocal and fricative excitation are presented in

same time.

  The waveform of the glottal pulse signal is produced by a 4-bit counter 234 and a pair of analog multiplexers 8/1 242 and 244. The counter 234 is paced by the output Ql of another counter at 4 binary elements 236 which is in turn punctuated by the

  clock signal e2 of 20 KHz. Thus, the counter 236 serves ef-

  effectively divide the frequency of the clock signal e2 by 4, so that the frequency of the clock signal supplied to the counter 234 is 5 KHz. The three least significant counting outputs (QD-Q2) of counter 234 are connected in parallel to the binary control inputs A, B and C,

  multiplexers 242 and 244. The most significant counting output

29.

  ficative (Q3) of the counter 234 is connected to the input of inhibit

  bition (INH) of multiplexer 242 and via an inverter 245 to the inhibition input (INH) of multiplexer 244, so that for the first eight counts (0-7) of counter 234, the multiplexer 244 is invalidated and during the

  the following eight counts (8-15) of counter 234, the multiple-

  xeur 242 is invalidated. The parallel inputs (0-7) of the two

  multiplexers 242 and 244 are each connected to a resistor

  this variable connected between the voltage source (V) and the ground P, whose function is to represent a signal level

  pre-adjustable in direct current. As we will see, the ni-

continuous calves are pre-set to appro- priate values

  requested so as to provide the approximate waveform glot-

desired tale.

  The serial outputs of multiplexers 242 and 244 are connected and provide the glottal output signal on

  a line 246. The continuous analog level produced on the line

The output 246 is therefore determined by the counting output of the counter 234 which is supplied to the binary control inputs A, B and C of the multiplexers 242 and 244. In

  in other words, each of the 16 counts coming from the

tie of counter 234 identifies only one of the 16 inputs to multiplexers 242 and 244. For example, when the output

  of counter 234 is equal to 0110, the continuous level pre-

Sent to input channel 6 of multiplexer 242 will be produced on output line 246. Similarly, when the output of counter 234 is equal to 1101, the continuous level present at input channel 5 of multiplexer 244 will be product on the line of

exit 246. In the particular embodiment of the present invention

  tion, where the clock signal î2 is set at 20 KHz, the counting speed at 5 KHz of the counter 234 results in a segment of 0.2 milliseconds in the glottal output signal on line 246 for each count of the

counter 234. Thus, it will be noted that by a suitable presetting

required continuous signal levels supplied to the inputs of the multiplexers 242 and 244, any desired glottal waveform can be generated. In the particular embodiment of

  the present invention, it has been determined that a glot-

30. tale with 8 segments of the type shown in FIG. 10 convi ent, and

  therefore only one 8/1 multiplexer can be used.

  The carry-over output (TC) of counter 234 is returned

seen at its validation input (EP) via an inverter 238 so as to invalidate the counter once

  this has reached a count of 1111 and to prevent it from re-

  overwrite additional clock pulses. The objective is to maintain the counter 234 at its last count so that the last continuous level produced on the output line 246 is maintained for the duration of the period

glottal. More specifically, it will be noted that the output of re-

port of the counter 220, which determines the glottal period, is supplied via the line reverser 228

  230 at the entrance of a door OR 232, the other entry of which is re-

  linked via an inverter 231 to the clock signal

  lodge el. The output of the OR gate 232 is connected to the

erase entry (CLR) of the two counters 234 and 236. Thus,

we will notice that at the end of the period of the glot-

  tale, when a high level signal is produced at the carry output (TC) of the counter 220, a low level signal is supplied to the CLR inputs of the counters 234 and-236, which has the effect of adjusting the four outputs (QO-Q3) of each counter

to zero in order to initialize a new glottal pulse.

  When the QO-Q3 outputs of counter 234 are re-

set to zero at the start of each glottal pulse, a high level output pulse is produced on the glottal synchronization line 55 at the output of a NOR gate 240 whose four inputs are connected to the four outputs of the counter 234- . As noted earlier, the impulse of

glottal synchronization of line 55 is supplied to the circuit

  cooked transition (Figure 3) to trigger the flip-flops

Fl, F2, F3 and F2Q (194,195, 197 and 198, respectively-

ment) in synchronization with the beginning of each pulse

  glottal sion. The purpose of synchronizing the transition of the control parameter values F1, F2, F3 and F2Q with

  the beginning of the glottal impulse is to avoid the pro-

duction of an audible random noise which would be produced if 31. the CMOS switches of the variable capacity circuits of the vocal ensemble could switch during the "rest" period of the glottal pulse signal when no energy

  excitement is present in the vocal ensemble.

  Now in connection with FIG. 8, the fricative excitation signal is produced by a noise generator

  white consisting of a 250 meter and a shift register

static ge 252 with 18 stages, which produces a random white noise output signal on a line 256. The counter 250 and the register 252 are rhythmized by the clock signal Pl which is supplied to their clock inputs (CK ) by a NOR gate 254. The other input of gate 254 is connected opposite to the fricative amplitude control parameter

(FA) coming from the exit of the door NO Or 192 (figu-

  re 3). So when no fricative excitation energy

  is not necessary, the noise generator is disabled

to avoid unnecessary interference with the rest of the system.

teme. -

The white noise output signal on the output line 256 is supplied to the input of a NAND gate 258 the other input of which is connected to the output of an OR gate 260. The inputs to the OR gate 260 are connected to the signal line FGATE 65 and to the signal line VA from the

door exit NO OR 190 (figure 3). During the phonè-

  voices of fricative voices which require both an energy-

speech excitement and a delicate excitation energy

  ve, both signals VA and FA will be low. Thus, it will be noted that the signal FGATE on line 65. which, it should be remembered, goes high during the second half

or "rest" position of the valid glottal signal period-

  re door NO AND 258 and will trigger the white noise signal during the last inactive part of the period

glottal signal. -

The white noise signal from the output

  of the NO gate AND 258 is then supplied to the control circuit

  of fricative amplitude 260 which controls the amplitude of the

  general white noise as a function of the value of the parameter of 32. control of fricative amplitude (FA). The resulting white noise signal is then filtered by a high-pass noise shaping filter before being injected into the vocal ensemble under the control of the parameter of the fricative control signal (FC) and its inverse ( FC). The functioning

  of the '260 amplitude control circuit and of the circuit

  high-pass noise shaping 262, which use the same capacitive switching technique employed in

  the vocal ensemble 60, will appear in the following description

of it.

In connection now with Figures 4 and 5, a circuit diagram of the new vocal assembly 60 of the present invention is shown. This consists mainly of four resonant filters in cascade F1, F2, F3 and F5. The

resonant frequencies of filters F1, F2 and F3 are varied

and are controlled according to the control parameters

  de-Fl, F2 and F3, while the wire's resonant frequency

  tre F5 is fixed. The voice or source excitation signal

  global is supplied via the control circuit

of speech skill 62, which controls the amplitude of the signal

  glottal as a function of amplitude control parameter vo-

wedge (VA), and is then injected in series into the filter F1.

  The fricative excitation signal is injected in parallel into the resonant filters under the control of the parameter of

  control of fricative (FC) and its inverse (FC), respectively

vement. In addition, note that the "Q" or bandwidth

  of the filter F2 is also controlled by the com- parameter

  mande F2Q, which, as already described, is used mainly during nasal phonemes in order to reduce the Q and thus increase the bandwidth of the resonant filter F2. The unique manner in which the parameter control functions are implemented in the present system will now be explained. As previously indicated, the embodiment

particular of the present invention is particularly suitable

  tee to be implemented in a single integrated circuit used

  sant symmetric oxide-metal semiconductor technology

33. complementary sorting (CMOS). In order to design a complete speech synthesizer, which can be built on

  a single silicon "chip", a unique approach was made

  te in the manner in which the parameter control functions are implemented. In particular, instead of using time-weighted duty cycle control signals as in many speech systems of the prior art, the present invention uses a technique of

  capacitive switching in the control of the tuning of the

seems to be vocal, as well as in other controlled functions

by parameter.

  More particularly in connection with FIG. 13,

a circuit model representing the theory of operation

The capacitive switching technique is shown

  you. In this figure, the current I at the negative input of the operational amplifier is determined by the charge of the capacitor Cr and its switching frequency Fo1. As an equation, we therefore obtain:

1 = F C V.

IForVi given that I is, of course, also equal to Vi / R, we obtain the following relation:

R = 1

  RF Fol Cr So you can see that a capacitor that is switched from the

shown in figure 13 is essentially equivalent

slow to a resistance. In addition, since the time constant T of the circuit is given by the following equation: 1 î Cf T RCf = (F 1C) Cf = () TRf FolCr f -FQl r the frequency response F of the circuit is equal to: F = Fl (Cr) 27 Cf Consequently, it will be noted that the time constant and

  the frequency response of an RC circuit simulated by tech-

  previous capacitive switching nique depends not only-

  of the switching frequency Fol, but also, and

  importantly, from the ratio of the capacities Cr and Cf.

34.

It follows that, in order to obtain a response in French

  quence in the low frequency range of the human channel, it is not necessary to use large capacitors, but simply capacitors having a suitable ratio between capacities. For example, with a switching frequency Fol of 20 KHz, values of 1 pf for Cr and of 8.183

  pf for Cf will give a frequency response of 100 Hz.

Thus, as will be appreciated by those skilled in the art, thanks to the

  mination of large capacitors, the physical size of the silicon chip can be minimized. In addition, given

  that the frequency response depends on the ratio between capacitance

  ters and not actual physical dimensions, the tolerances of the manufacturing batches of silicon chips can be

  easily maintained at high levels of accuracy.

  As can be seen in the circuit diagrams

Figures 4, 5, 7 and 8, the switching technique capa-

  citive described above is used in the reaction modes

  Specialization of the present invention for the implementation of the functions controlled by the parameters F1, F2, F3, F2Q, FC, FC, VA- and FA. In each case, the control signal parameter is used to control the value of the ratio between the capacities of the particular circuit involved and therefore the value of the effective resistance of the circuit by controlling the conductive / non-conductive state of a plurality

  CMOS switches that are connected in individual series-

  with a capacitor of a plurality of capacitors connected in parallel, weighted in binary. The switching frequency (F) is set to 20 KHz, as it is ol

  established by the clock signals el and e2 from the circuit

  temporal cooked 38, except in the sub clock circuit

  phoneme 42 (figure 7) which uses the clock signals Pl

  and P2 of 5 KHz coming from circuit 38. The time signals

  ge el and e2 include two-phase digital clock signals, both having a frequency of 20 KHz. As shown in FIG. 14, the clock signals e1 and e2 have opposed opposing phases and only overlap very little. The purpose of the second clock signal (e2) is to eliminate 35. the stray capacitances due to the operational amplifier

and circuit design.

  The operation of the capacitive switching parameter control circuit is probably best understood by comparing the diagram of the voice amplitude circuit 62 and the resonant filters F1 and F2 of the voice assembly 60 in FIG. 4 with the equivalent resistance of this circuit. in figure 9. As you can easily see, the parameters

control signal. VA, Fl, F2, F2Q and FC command each

  cun the value of the effective resistance of a circuit

  sistant equivalent variable by adjusting the ratio between capacities between 1 and 16 finite values. These 16 values are

  determined, naturally, by the state of the 4 binai elements

  res of each control signal parameter. This is true

for all parameters except the command parameter

  of F2 which controls the frequency movement of the reso filter

  nant F2. Although the control signal parameter F2 con-

* hold four binary resolution elements defining 16 different target positions as in the case of the others

command parameters, a fifth bit of reso-

  lution is added to control parameter F2 during pro-

transition stops as described above, in order to reduce the movement by discrete incremental steps in the fundamental frequency of the filter F2 while there

has a dynamic transition to the new position of ci-

corn. The fifth transition bit in the para-

control meter F2 is provided in this embodiment of the present invention since the frequency range of the resonant filter F2 is approximately twice that of the filter

  resonant F1, which also uses four binai elements

  resolution res to provide 16 incremental steps. Therefore

  quence, as it is desirable that the incremental changes

rates are small enough for the movement, of the transition step to be perceived as a gradual change by the human ear, it was -Estimated necessary to add a

fifth resolution bit in parameter. order

  of F2 in order to reduce the momentum of each step 36. discrete. The present invention is not limited to the examples

  which have just been described, it is

milking subject to variations and modifications which

  will appear to those skilled in the art. 37.

Claims (9)

  1 - Speech synthesizer based on compressed phonemes   providing a vocal ensemble model which is controlled in accordance with mapped with a plurality of control parameters generated for each phoneme, characterized in that it comprises a digital transition means for gradually modifying the value of a control parameter between a current value towards a target value, comprising: - means input to provide the target value of the control parameter;   - an output means to provide the current value   te of the command parameter; and - circuit means for continuously adding at a predetermined rate to the current value a predetermined percentage of the difference between the target value and the current value and supplying the resulting value to the output means so that the resulting value includes the new current value.   2 - Synthesizer according to claim 1, character-   rised in that the circuit means comprises a first circuit means connected to the input means for producing a first signal equal to the predetermined percentage of the target value, a second circuit means connected to the output means for producing a second signal equal to the predetermined percentage of the current value, a third way of circuit to subtract the second signal from the current value   te and, produce a third signal equal to their difference,   and a fourth circuit means - to add the first if - general to the third signal and provide the resulting signal to the way out.   3 - Process for digital generation of a transi-   progressive tion in the value of a control parameter in a speech synthesizer based on phonemes comprising a vocal ensemble model which is controlled in function of a   plurality of control parameters generated for each photo   neme, characterized in that it comprises the following stages: - definition of a target value for the parameter of 38. command;   - definition of a current value for the parameter-   be in control; - addition to the current value of a predetermined percentage of the difference between the target value and the current value; - replacement by the resulting value of the their current so as to define a new current value you; and   - continuous repetition at a predetermined speed - undermined by the third and fourth stages.   4 - Vocal synthesizer based on compressed phonemes   nant a vocal ensemble model which is controlled as a function of a plurality of control parameters generated for each phoneme, characterized in that it comprises a glottal source generator for generically a glottal pulse signal which is injected into the vocal assembly to supply vocal excitation energy to this assembly, comprising:   - a parallel / series conversion means having -   -a plurality of parallel inputs, each input being con- connected to a predetermined DC signal level   born, a serial output to provide the pulse signal   and a plurality of selection entries for se-   select the one of the parallel inputs which is connected to the serial output; and - counter means having a clock input which is connected to a clock signal having a predetermined frequency to cause counting by the counter means at a predetermined rate and a plurality of counting outputs connected to the plurality of serial inputs   lection from the parallel / serial conversion means   in such a way that each count of the accounting means   tor causes the connection of an input different from the   very parallel to the serial output. 5 - Speech synthesizer based on phonemes including a vocal ensemble model which is controlled accordingly a plurality of control parameters generated for each 39.   that phoneme which define the constant state of each phonè- me, characterized in that it includes:   - a glottal source means to produce a si- gnal of glottal impulse which is supplied to the vocal unit to communicate to it the energy of vocal excitation, this signal of glottal impulse with which is associated a fundamental frequency mental with each of its periods comprising an active part and an inactive part, the glottal source means   comprising means for producing a synchronous pulse   glottal position at the start of the active part; and - a digital transition means for incrementally changing the values of the control parameters from a first constant value to a se-   this constant state value comprising a means of syn- chronization of each incremental variation of the values of the control parameters with the production of the pulse glottal synchronization.   6 - Synthesizer according to claim 5, caracté--   laughed in that the glottal source means further comprises: - a parallel-series conversion means having a plurality of parallel inputs, each connected to one level   predetermined DC signal calf, a serial output to provide the glottal pulse signal and a plurality of selection inputs to select which of the parallel inputs is connected to the serial output; and - a counter means comprising a clock input box which is connected to a clock signal having a frequency predetermined frequency to cause counting by means   meter at a predetermined rate and a plurality of outputs metering ties connected to the plurality of input inputs   lection from the parallel - serial conversion means so that each counting of the counter means causes the   connection of a different input among the parallel inputs them at the serial output.   7 - Synthesizer according to claim 6, character-   laughed at in that the glottal source means further comprises time means for determining the period of the signal   40. glottal pulse by producing an output signal at the end of each glottal pulse period which is supplied to the counter means so as to reset this means to zero.   8 - Synthesizer according to claim 7, character- laughed at in that the glottal synchronization pulse is   produced when the counter means is reset to zero.   9 - Synthesizer according to claim 5, character- laughed at in that the vocal ensemble model includes a greater   reality of resonant filters with switched capacitor, numerically tuned by a plurality of capacitors weighted in binary, connected in parallel, each connected in se- laughs with an electronic switch which is controlled by one of the command parameters. - Speech synthesizer based on phonemes,   laughed in that it includes means responding to input data identifying a desired sequence of phonemes to generate a plurality of parallel digital control parameters which electronically define the constant state of each of the phonemes in the desired sequence of phonemes :   - a glottal source means to produce a si-   general glottal pulse with which is associated a fundamental frequency, each period of which comprises an active part and an inactive part and comprising means for producing a glottal synchronization pulse at the beginning of the active part; 1 - a digital transition means for incrementally modifying values of the control parameters   between a first constant value and a second value   their in the constant state comprising means for synchronizing each incremental variation of the values of the parameters of control with the production of the synchronization pulse   glottal tion; and - a vocal ensemble model responding to the glottal pulse signal to produce substantially the spectrum of   frequency of each of the desired sequences of phonemes, including   taking a plurality of resonant capacitor filters including   mutated, digitally tuned by a plurality of condensa-   41. binary weighted ters, connected in parallel, each being connected in series with an electronic switch ordered by one of the command parameters.