FR2483718A1 - PASSIVE DATA CONTROL CIRCUIT, CALL CONFIGURATION GENERATOR CIRCUIT, AND TERMINAL VERIFICATION CIRCUIT FOR CAB TELEVISION SYSTEM - Google Patents

Abstract

THE INVENTION RELATES TO VERIFYING THE TERMINALS OF A CABLE TELEVISION SYSTEM. IT RELATES TO A CIRCUIT MOUNTED BETWEEN A TELEVISION MONITOR 11 AND A TRANSMISSION CENTER CONNECTED BY A CABLE 9. THE CIRCUIT INCLUDES AN INTERRUPTION CIRCUIT 30, A MIXER 31, A CALL CONFIGURATION GENERATOR CIRCUIT 34, A PASSIVE DATA CONTROL CIRCUIT 32, AND A MAIN CONTROL CIRCUIT 10. APPLICATION TO CABLE TELEVISION SYSTEMS.

Description

The present invention relates to

  cable television and more specifically a general circuit

  signal of such a system, intended to transmit

  periodically placing a polling or calling signal on terminals to control the transmission of

  particular data by the terminals.

  A cable television system is intended to transmit various programs to television monitors of terminals placed in subscribers' dwellings, by means of coaxial cables. Many such systems allow simultaneous two-way communication in addition to program transmission, a center simultaneously transmitting information to a network.

  number of terminals and receiving information.

  More precisely, predetermined functions of the terminals

  should be called periodically or irregularly

  is lying. The calling operation includes transmitting a downlink data signal to the terminals, receiving upstream signals in response to the downlink signal, and

  comparing an order of the descending signal with these

  nals. However, until now, a large-scale user has had to be used for the formation of such a

  downlink data signal for terminal call.

  Such a computer is not easily transportable in

  the whole system, which would be desirable.

  The invention therefore relates to a generator circuit

  call configuration, for a set of televi-

  cabling and eliminating the aforementioned drawbacks, portable type, simple construction and able to form

  periodically a terminal call configuration.

  More specifically, the invention relates to a terminal verification circuit for a cable television system comprising a single center and a number of terminals connected to that center so that programs

  are transmitted by cables to

  nal. The verification circuit of the latter includes a call configuration generator circuit which creates

  periodically call configuration signals. Cha-

  each of them has a specific address code which allows

  both the call of a corresponding terminal and a code of

  request a designated response from the terminal called

  the. A passive data control circuit compares a rising signal of data from the terminal as a result of the command code with the designated response requested

  by the order code so that it judges the state of function-

  terminal from the result of the comparison.

  The passive control circuit comprises a device for

  born to arbitrarily determine an address code. He com

  also takes a determination device in the terminal of an address code identical to that which is fixed in the passive control circuit. The latter is placed between the center and the terminal while the generator circuit of

  call configuration is placed between the center and the cir-

  Cooked passive control. The call configuration signal is transmitted by the generator circuit via a cable up to

  terminal. When an address code of the configuration signal

  call is identical to an address code determined in the terminal by the address determining device, a signal coming up from data coming from the terminal as a result of the control code, reaches the passive data control circuit and therein, a designated response, requested by the control code and the upstream signal of data thus transmitted by the terminal are compared and indicate that the operating state of the terminal is

acceptable or not.

  In addition, the invention relates to a passive circuit

  control system for a cable TV system

  having a single center and a number of

  connected to the center which transmits tele-

  vision to the terminals via cables.

  Each terminal has an address determination device that can arbitrarily set an address number that may be specific to that terminal. The control circuit includes a device for receiving a configuration signal

- 2483718

  with an address code designating a terminal cor-

  respondent and a command code requesting a designated response from the called terminal, and a device for comparing a data signal transmitted by the terminal following the command code, with the designated response requested by the command code, that device being intended to judge the state of operation of the terminal according to the result of

the comparison.

  The invention also relates to a call configuration generator circuit for a television system

  cables having a single center and a number of

  related to this unique center so that programs

  televisions are transmitted to the terminals by the cables.

  This generator circuit comprises a device intended to

  transmit call configuration signals having

  a specific address code for the call of a corresponding terminal, and a command code for requesting a designated response from the called terminal. One at

  least call configuration signals are issued periodically

  at predetermined intervals. Accordingly, the called terminal that corresponds to the address code creates a designated response based on the signal control code.

call setup.

  Other features and advantages of the invention

  will be better understood by reading the description

  which will follow examples of embodiment and with reference to the accompanying drawings in which - Figure 1 is an explanatory diagram representing

  a cable television system to which the

vention

  FIG. 2 is a block diagram representing

  both the installation of a call configuration generator circuit;

  FIG. 3 is a block diagram of a circuit

  passive cooked data control according to the invention; FIG. 4 is a front elevation of the panel of the passive data control circuit; FIG. 5 is a block diagram of a

  call configuration generator circuit according to the invention.

  tion; - Figure 6 is a front elevation of the panel of the generator circuit of Figure 5; FIG. 7 is a plan view showing

  groups of data switches used in the

baked generator of Figure 5; -

  FIG. 8 is a perspective of part of the interior of a terminal, representing an address block

  and an address determining circuit placed in the field.

  minal; and FIG. 9 is a schematic diagram partly in schematic form of an installation variant, a

  call configuration generator circuit.

  FIG. 1 represents a cable television system in which the invention is advantageously implemented. The system includes a single center 1 and

  terminals 28 which are placed for example in several di-

  zaines of thousands of subscriber dwellings. The center 1 is connected to the terminals 28 of the dwellings 2 by cables

  coaxial. A main cable 3 starts from center 1 and from

  4 cable fitter and 5 circuit breakers

  rivera are arranged on the main cable 3 to

  predetermined investments. Several bypass cables 6 leave each circuit 5. Amplifiers 7 and

  circuits 8 of connection are arranged at pre-existing points

  determined 6 bypass cables. Each branch circuit 8 is connected to the branch lines 9 which

  join the terminals 28 homes 2 subscribers.

  Each terminal 28 comprises a main circuit 10, a

  he TV monitor and a control circuit 12.

  The bypass line 9 is connected to the main circuit which is itself connected to the monitor 11 and to the circuit

  12 order. As the above description indicates,

  the main cable from the center is divided into a first

  first set of branch cables which divide themselves

  same in a second set of bypass cables that

  are finally connected to the terminals 28.

  A receiving antenna 13 is installed at the

  1. It is connected to a demodulator 15 placed in a group 14 of sources arranged in the center.

  1. This group 14 also includes a video-player 16

  disc, VCR 17 and studio 18. The signals transmitted by the group 14 reach a modulation section 19 comprising two sets. One of them comprises an intermediate frequency modulator 20, a scrambling circuit 21, and a boost converter circuit 22, while the other set comprises an intermediate frequency modulator circuit 23 and a boost converter circuit 34. converters 22 and 24 are connected to the main cable 3 which is connected to a transceiver 25 for providing data communication between the center 1 and each main circuit 10. The transceiver 25 is connected to a computer

  24 connected to a device 27 such as an

  primante or a display device.

  We now consider the functioning of the

  cable television system thus realized.

  First, the power switch of the monitor 11 is closed. When the latter is on an unused channel, the control circuit 12 is set to

  action so that the frequency of a channel that we want to receive

  see either transformed into that of the unused channel. The channels that can be selected by the circuit 12

  order, as described above, can be classified as

  in three groups, (A) retransmitted programs such as television signals from a local station, received without modification, (B) independent programs (free), and (C) paid programs. Ten channels are assigned to each group, and one of thirty channels can

  therefore be chosen by implementation of the circuit 12.

  (A) Retransmitted Programs The television signals received by the antenna 13 are demodulated in the demodulator 15 and transmitted to the output section 19. The signal thus transmitted is modulated

  by the intermediate frequency modulator 23. The frequency

  the signal thus modulated is raised by the conver-

  24 to a predetermined value depending on a pre-determined plan.

  determined frequency assignment. Thus, it is affected

  to a predetermined channel. The resulting signal is transmitted

  put by the main cable 3, the bypass cable 6 and

  line 9 diversion to monitors 11.

(B) Independent Programs

  These programs include meteorological forecasts

  logical, information and the like. In the case of programs recorded by the videodisc player 16 or the video recorder 17 or in the case of programs produced live in the studio 18, the video signal is modulated by the intermediate frequency modulator 23 and the frequency of the modulated signal is high. to the value corresponding to a

  predetermined channel, converter 24. The signal

  sultant is transmitted to a main cable 3. The reception of these programs is free regardless of the number of reception of programs and the duration of reception. So,

  these programs may be received as part of the

monthly payment paid by the subscriber.

  (C) Paid programs These programs include new movies

  cinematographic, special and similar programs.

  In the case of programs transmitted by the reader 26 of

  videodisc or VCR 17 or in the case of

  grams transmitted live from studio 18, the video signal is modulated by the intermediate frequency modulator and is then processed by the scrambling circuit 21 to

  that it can not be restored without special treatment.

  The frequency of the signal is then raised to that of a predetermined designated channel, and the signal is transmitted to the main cable 3. The reception of the paid programs requires the descrambling of the video signal by the main circuit of the dwelling 2 so that a normal picture appears

  11. The subscriber is billed for the reception of

  paid programs. Thus, pre-billings

  determined are added and he is asked to pay a

  particular amount, at a measured rate, in addition to the

monthly payment.

  As previously described, center 1 is connected

  to terminals in dwellings 2 by coaxial cables. However, subscriber billing

  for the reception of the paid programs absolutely requires

  the detection of subscribers receiving the programs

  my channels. Thus, the channels selected by the subscribers at the different times must be detected. For this purpose, the transceiver 25 of data transmits a

  search signal at predetermined time intervals.

  in order for the terminals 28 to be called by their assigned address number. Thus, the channels received by

  the terminals during the transmission of a signal of

  are detected, this operation being known as

  After this interrogation, each terminal 28 responds to the transceiver 25 by transmitting data representative of the received channel.

  by the terminal at the time of the interrogation or the call.

  Different reception and transmission data for the transceiver 25 are arranged and stored by the computer 26 and are displayed or printed by a peripheral member 27. The interrogation operation or

  call is executed at predetermined intervals of

  seconds to several tens of seconds, so that listening or hearing rates can be easily calculated. Sometimes subscribers can participate in the production of programs. In this case, they can answer the programs by watching the monitors 11, by order

  circuits 12, The answers are transmitted by the cables

coaxial in the center 1.

  Figure 2 is a block diagram of a mode

  advantageous embodiment of a generator circuit for con-

  call appearance or interrogation according to the invention.

  An interrupt circuit 30 for stopping the downstream data signal but transmitting the video signal;

  has an input connected to a branch line 9. A cir-

  The passive circuit 32 is connected to the circuit 30 by a mixer 31. The signal of the passive circuit 32 reaches a main circuit 10. An address determining circuit 33, described in more detail later. memory, is associated in removable form to the main circuit 10 and is connected to the control circuit 32 by a cable. Reference 34 designates a circuit

  call configuration generator. The signal of this cir-

  The generator 34 generates a downlink call data signal either itself or under the control of an external data circuit coupled to an external data input terminal. The generator 34 can thus call the terminals 28 by assured connection

  between the line 9 and the main circuit 10 of Figure 1.

  In this apparatus, a frequency-modulated down-stream data signal and video signals or the like are transmitted through the center 1 and arrive at the interrupt circuit. Only the video signals are transmitted by the circuit 30, the control circuit 32 and the circuit

  to the monitors 11. In this way, a moni-

  11 can restore the video and sound signals from

  usual, even during the call.

  The generator 34 normally creates a call configuration signal comprising in combination an address code and a command code, in the same transmission mode as that used by the center 1.

  Call Signs contain all the common command codes

  the corresponding address data which is transmitted

  repeated repeatedly by the generator. The

  call signals are transmitted by the mixer 31 to the circuit

  cooked 32 of control. The terminal 28 is set to select an address corresponding to a special command code. In this way, the control circuit 32

  can determine the content of a response from the

  The address for the control circuit 32 can be freely selected and determined by the circuit 33 in the main circuit 10. The construction and operation of the address determination circuit 33 are described in more detail in the following. of this memoir. When the address is determined in the main circuit 10, it receives only the call configuration of the address code determined by the circuit 33, among the call configurations from the generator 34, and it transmits an answer corresponding to the order code

  followed by the address code, at circuit 32 of control,

  ci compares the address code thus determined to a signal

  transmitted in response by the main circuit 10, and it de-

  terminates if the operation is normal or erroneous depending on whether the code received from address corresponds to the command code

or not.

  Figure 3 is a block diagram of the passive circuit 32 for data control. It comprises an input terminal 35 connected to the mixer, a connected output terminal 36

  to the main circuit 10, and an output terminal 37 of

  is connected to the circuit 33 for determining address. The output terminal of a signal distribution circuit 38 is connected to the terminal 36 while the high level terminal is connected

  at the input terminal and the low level terminal is

  linked to a bandpass filter 39. The output of the latter is

  connected to a signal detector 40. The output signal

  of the latter reaches the inputs of a pass filter.

  high 41 and a low-pass filter 42. The output signal

  of the high-pass filter 41 reaches a generator 44 of hor-

  accommodates via a shaping circuit 430 A bit-code converter in zero-return code 45 receives the signal from the shaping circuit 43 and that from the clock generator 44 and transforms the non-return code code into zero. A serial-to-parallel converter 46 converts the output signal of the converter 45 into a parallel signal. The signal of the filter 42 is connected to a latch control circuit 47. The exit of this circuit

24 83 71 8

  is connected to a latch 48 and a comparator 49. The signal of the converter 46 reaches the latch 48. The signal thereof reaches both the comparator 49 and a control circuit 50. The signal of the comparator 49 reaches a display unit 51 which can be a

  light emitting diode device or the like.

  Reference 52 designates a selector circuit which

  can be set manually. Its exit signal par-

  comes to the inputs of a passive memory 53 of data and

  of a passive address memory 54 that retain

  predetermined addresses respectively. The output of the memory 53 is connected to the comparator 49.

  memory output 54 is connected by a tamper circuit.

  55 isolation, to address output terminal 37. The

  determining circuit 33 is connected to this terminal 37.

  FIG. 4 shows a front panel of the circuit

  Cooked passive 32 data control. The front panel carries connectors 57 and 58 corresponding to the input and output terminals 36 respectively in the portion

  upper left, a multi-pin connector 59 cor-

  responding to address output terminal 37, below the

  connector 58, and light emitting diodes 60 to 65

  it is part of the control circuit 50 and the display unit 51, close to the central part. The light emitting diodes 60 to 62 of the control circuit are aligned

  on a horizontal line. The letters A to J placed on the

  above the diodes 60 correspond to data-response terminals. The letter placed above the diode 61

  corresponds to a parity bit. The reference AD placed

  above the diode 62 is an additional bit. The diodes 63 to 65, intended to indicate the state of the terminals, are placed above the diodes 60 to 62. The diode 63 indicates the reception of a upgoing phase-modulated signal coming from the main circuit 10. The Diode 64 indicates that this signal is normal. Diode 65 indicates that

is wrong.

  The panel 56 also includes a power switch 66 and a control lamp 67 indicating the state of the switch 66 at the top right. The panel also carries a check number button 68 connected to

  a rotary switch and placed under the switch 66.

  The rotary switch is used in the selector circuit

52.

  Figure 5 is a block diagram of the gen-

  34. The outputs of a

  passive memory 70 of data retaining various codes

  of address and control codes, and the outputs of a

  data setter used for the manual determination of

  number of address and control codes are connected

  to a selector circuit 72. A control signal of a circuit

  cook 73 which determines the rate of production of the data is transmitted to both the memory 70 and the switch 71. The output of the selector circuit 72 is connected to a

  converter 74 of non-return code to zero in binary code.

  The output of the converter 74 is connected to a frequency-modulated signal transmitter circuit. The output of the transmitter 75 is connected to a frequency modulated signal output terminal 76. A terminal 77 allowing the input of data from an external device is

  directly connected to the converter 74.

  Figure 6 shows the appearance of the generator 34.

  A panel 78 placed at the front of the circuit has a power switch 78 and a control lamp 80 indicating the state of the latter at the top left of the connectors 81 and 82 respectively forming the terminal 77

  input terminal and external data output terminal 76,

  below the switch 79, and a selection switch 83

  external or internal data, placed to the right of the terminals.

  The panel 78 also includes dimming switches 84.

  to adjust the levels of the output signals

  and aligned on a horizontal line, in the central part

  tral. These switches 94 are push-button and are

  for determining the level of the output signal.

  The panel also has a lamp 85 indicating the calling process and a function button 86 for varying call speed on the right side. Furthermore, as shown in FIG. 6, the circuit 34 includes a removable cover 87 above the upper central portion and groups of switches for adjusting the data.

  wanted, below the convercle 87.

  FIG. 7 shows the construction of the switch groups that are accessible by opening the lid 87 of the generator 34. These groups correspond to the aforesaid data switch 71. The individual switches of four groups 88, 89, 90 and 91 can be set at a minimum. high or low value corresponding to high or low logic levels. The switches 88

  and 90 include six individual switches corresponding to

  six digits while groups 89 and 91 have five, corresponding to five digits. Groups 88 and 89 are used for determining a group address and switch 90 for determining an address

  individual. The switch 91 is used to determine

order.

  Fig. 8 shows the address determining section of the main circuit 10, when the cover of this circuit is removed. A board circuit board 93

  is fixed on a metal substrate 92 from which it is

  EEA. A female connector 94 for determining the address of the main circuit 10 is mounted at the corner of the wafer 93. This female connector 94 has two lines of twelve holes.

  opening upwards and aligned along two straight lines.

  At a normal reception of television programs,

  a block 96 for determining the address of the primary circuit

  cipal 10 is plugged into the female connector 94. This block, 96 formed of plastic or the like, has two rows

* twelve cards 97 on its underside. The connection

  lective of designated pins 97 placed in block 96

  determines a desired address. The pins 97 are inserted

  in the holes 95. When the main circuit 10 is tested during operation, the block 96 is removed from the female connector 94 and the determination circuit 33

  address is put in its place in cooperation with the

  94. The cards 98 protrude under circuit 33. When

  they have penetrated into the holes 95, the circuit 33 is electrically connected to the female connector 94. The si--

  control signal from the passive circuit 32 of con-

  control connects any of the pins 98 through the

  of a switching circuit in the cir-

  baked 33 address determination, so that the address

  can be determined at will.

  We now consider the functioning of this

embodiment.

  A. Apel 34 configuration energer circuit The operation of this circuit is considered

reference to Figures 5 to 7.

  When the switch 79 is closed, the lamp

  80 turns on, and the power reaches the various cir-

  cooked. When it is desired to use the passive memory 70 or the switch 71, the selector switch 83 is placed in the position of use of the internal data. We

  adjusts the level of the output signal by switching

  attenuation, to obtain the desired level.

  For example, when you want an output signal at -38 dB,

  the push buttons 20, 10, 5 and 3 are depressed.

84.

  When the switch 79 is closed as previously described, the address code and the data code are created successively and periodically, with a predetermined period, at the connector 82. The calling operation is then executed. When this type of data is transmitted, the calling lamp 85 turns on. The speed of call (or its period) can vary by command of the button 86 of

function (see Figure 6).

  Operation with the passive memory 70 of

born.

request

  As previously described, the circuit 73 of

  rhythm periodically transmits a pulse of

  rhythm, intended for the memory 70, during a pre-

  determined. The memory 70 thus transmits the data that

  keep it at each rhythm pulse selector circuit

  72. This interrupts the input of the data of the switch 71 and transmits only the data of the

  moire 70 to the converter 74 which transforms the non-code

  return to zero of the data of the memory in binary code.

  The transformed data is modulated at a predetermined frequency by the transmitter 75 and then amplified. The modulated and amplified signal is transmitted by the output terminal 76

  and via the connector 82.

  The data memory 70 keeps several games

  combinations of address code and command code.

  The data sets are transmitted successively, a game with each pulse of rhythm. When all the stored data has been transmitted by the memory 70, they are

  retransmitted repeatedly from the initial data.

  Specific examples of these types of data are considered.

  born. (The passive memory 70 is of the 256 x 8 bit type).

TABLE I

Da D7 D6 D5 D4 D3 D2 D1

0 0 0

0 Q 0

0 0 0

0 0 0

1 1 -1

1 1 1

0 0 0

1 0 0

1 1 1

0 0 0

1 0 1

! 0 0

0 '0 0

1 0 1

! 0 0

0 0 0

1 0 1

1 1 1

0 0 0

1 0 1

1 1 1

i i 1 i 1 1

1 Q Q

i Q 1

O QO Q

O Q Q

1 Q i i 1 1

0 0 0

0 0 0

0 0 0

0 0 0

1 1 1

1 0 0

0 0 0

I 1 1

1 1 0

0 0 0

0 1 1

0 0 1

0 0 '01

1 0 1

1 0 1

0 0 0

1 1 0

0 0. 1

0 0 0

1 1 1

1 1 0

Q Q

1 1 1

1 Q Q

Q 1 i

1 1 Q

1 1 1

i 1 0

O O \

) Reserve

0 0

0 O- block l) MG

1 0

0 0

i 1) MP 2

0 0

O O0

1 0

O O0

i 1) MP2 i Q

0 0

O O0

1 0

0 0

0 1 IMP25

  ) 0 0 Q Q M O O OB O OD 0 E o o o o o o o o o

T 0 T

I 0 I

o o o

T 0 0

I 0 T

0 0 0

o o o

I 0 T

0 0 0

0 T I

1 T1- 0

o o o

0 0 T

T T T

0 0 0

T 0 0

T T T

0 0 0

0 0 T

0 I I

0 0 0

0 I I

I 0 I

0 0 0

0 1- T

I 0 I

o o o

0 0 I

I 0 T

0 0 0

I I IT

T O I

0 0 0

T O 1

O O T

O O O

O T T

T O I

O O to

at Za a Sa Sa 9a La 8a II il 9

8 L ú8Z

  O oo 0 (oo 6dw (O oo 8cW (o (0ao 9cw 0 9ci O oo IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII If in this way, the address code data

  and control are read selectively in the memory 70.

  The data contains steps numbered successively "00" to "29". In step "29", the operation starts again. When the interval for creating the timing pulses of circuit 73 changes as a result of the command of the button 86, the

  period where the calling speed varies.

  Operation with the data switch 71 When the lid 87 of the generator 34 is

  open, groups 88 to 91 of switches are

  ble. With the cover 87 removed, the selector circuit 72 is automatically selected simultaneously and alone.

  the signal from the switch 71 reaches the converter 74.

  The switches 88 to 91 can be manually set to the high or low position, and the switches 88 and 89 allow the selection at will of the address code of

  group, the switch 90 of the individual code and the

  91 of the order code. (The start, index codes

  and parity are determined separately beforehand).

  The data thus determined are transmitted to the selector circuit 72 by means of the pulse pulse originating from

  of circuit 73 as previously described.

  Operation with introduction of ex-data

  The output of the generator that forms other data is connected to the connector 81. The selector switch 83 is set to the external data input position. So,

  external data are transmitted directly to the conver-

  weaver 74. They are then transmitted by the circuit

transmitter.

  B. Passive Data Control Circuit 32 The operation of this circuit 32 is considered

with reference to Figures 3 and 4.

  When the switch 66 is closed, the indicator light 67 lights up and the electric current reaches the

  different circuits. When the 68 number button is pressed

  rification is turned, the passive memories incorporated

  are selected and the stored call list is

  MODIFIED. A male plug connector (not shown) is

  connected to the circuit 33 for determining the address by means of

  The mode address chosen by the button 68 is transmitted in the form of a control signal from the connector 59. The phase-modulated signal of the main circuit 10 reaches the connector 57. When this signal is thus transmitted, the

  LED 53 lights up and indicates that the signal has been received

  phase modulation. When the latter is suitable, the diode 64 lights up and indicates that it is suitable while,

  when this signal is incorrect, diode 65 lights up and

  say an error. The diode 60 indicates the content of the phase-modulated signal, the diode 61 the presence or absence of parity, and the diode 62 the presence or absence of the bit.

additional (see Figure 4).

  Address Determination - When the selector circuit 52, set by the knob 68, is controlled, it selects the address number corresponding to the function to be checked so that the address memory 54 transmits the desired address number to the circuit. isolation buffer 55 and transmits the address signal to the terminal 37. As the address determination circuit 33 is connected by a coaxial cable to the terminal 37 (connector 59), the address signal reaches the circuit 33 When receiving this signal, the latter adjusts the interconnections of some of the pins 98 (FIG. Thus, as the pins 98 of the circuit 33 are introduced into the holes of the block 94, the address is determined in the main circuit 10 via the pin 98.

  the address number thus determined is called, the

  are transmitted to the main circuit 10.

  Determination of data When the address number is chosen in the

  memory 54 by the selector circuit 42 as described previously.

  previously, the selected signal is simultaneously transmitted to the passive memory 53 of data. The data corresponding to the address number is transmitted by this memory to the comparator 49. Thus, the address number and the data are processed in the form of a pair. The special issue

  address is always transmitted simultaneously in combination with

  sound with special data. The address number and the contents of the data are equal to the address number and

  the response data corresponding to the data of

  following instructions formed by the generator 34.

  Receipt of the data The generator 34 transmits a control signal, as shown in FIG. 2, to the main circuit 10,

  through the passive circuit 32 control.

  This control signal contains an address number and

  data combined with it as previously described.

  Several types of control signals are successfully transmitted

  sively. When the final control signal of a se-

  is transmitted, the initial command signal is transmitted

  put again, with repetition since the first command signal. More precisely, several types of

  order are continuously and repeatedly transmitted suc-

  by the generator 34. Like the number of

  is a special value determined by the circuit 33 com-

  described above, the main circuit 10 begins to operate after receiving a particular address from the generator 34, it reads the data tracked

  by the address number and it transmits a signal of

  phase-shifted response to center l and consequently

  quence to the passive circuit 32 control. The phase modulated signal is transmitted from the input terminal 36 (connector 58) to the splitter circuit 38 and is then transmitted to the bandpass filter 39. (The frequency modulated signal corresponds to a high frequency and the signal to phase modulation at a low frequency). The phase-modulated signal, after passing through the filter 39, is detected in the signal detector circuit 40 and it reaches the two high-pass filters 41 and the low-pass filter 42. The signal of the filter 41 reaches both the circuit

  shaper 43 and the generator 44 clock. The conversion

  weaver 45 transforms the binary code into a non-return code

  zero and transmits the latter to the series-converter

  Parallel 45. The phase modulated signal arrives at the generator 44 which detects and transmits only the information present in the signal. The generator 44 thus transmits the clock signal formed to the two converters 45 and 46 which use it to synchronize their operation. At the same time as the clock signal is thus transmitted to the converter 45, the phase-modulated signal reaches the converter 46 at each clock pulse. The flip-flop 48 receives the signal from the converter 46 and stores the phase-modulated signal in the form of a parallel signal having a predetermined number of bits (for example 8 bits). The output signal of the flip-flop 48 is displayed by the control circuit 50. The flip-flop detects the data cross sections and controls

  so the operation of rewriting the data in the bottom-

  cule. The output signal of the flip-flop 48 reaches the comparator 49. The latter receives the preset data from the memory 53, compares the signal of the flip-flop 48 with

  these data from the memory 53, and transmits a signal re-

  showing the result of the comparison to 51

  display. If the two signals are identical, the illumination

  Diode 64 indicates that the main circuit 10 is operating normally. However, if the two signals differ, the diode 65 indicates that the main circuit

works in a wrong way.

  Such a series of operations makes it possible

  tion of the normal or erroneous implementation of a particular function of the main circuit 10, using the address

  and special data determined by the circuit

  Thus, when the latter successively determines the designated address and data corresponding thereto, almost all functions of the main circuit 10 are tested. k4 8371 8 Figure 9 is a block diagram of a

  system in which the functions of the terminals 28 can

  to be tested by center 1 and the passive circuit

32 of control. -

  The center 1 comprises a generator 100 of con-

  call appearance connected to a main cable 3. This gen-

  100 keeps several address numbers and more

  any data sets intended for the verification of the operating status of the corresponding terminals 28

  address numbers. The data corresponding to these

  meros are periodically transmitted to the main cable 3.

  The address configuration signals are transmitted

  free time for the call. (This time corresponds to 10 s). The address of the call configuration signal

  is not the one used in the address of an

* seems to 28 terminals, but is a special address that is not really used so that it does not cause a malfunction. The control circuit 32 is connected to the bypass lines 9 from the main cable 3. The main circuit 10 is connected to the

  output of the control circuit 32. A circuit 33 of

  address termination is connected to circuit 32 as described

  previously. The circuit 33 is connected to the feeder connector

  address of the main circuit 10. As center 1 periodically transmits the verification address and

  data during free time in this mode of repair.

  when the address to be verified by the circuit 32 is determined, the circuit 33 forms the address number of the main circuit 10. When the call configuration signal is transmitted to the circuit 10 corresponding to the fixed address, this last transmits a phase modulated signal which corresponds to the data transmitted to the control circuit 32, and this circuit analyzes the modulated signal.

  phase as previously described.

  In the call configuration generator de-

  previously written, the call setup is created using a simple arrangement and without the use of a

2-4 837 18

  large computer. In addition, since the generator according to the invention is portable, it can be used near terminals, without moving the terminal, and can be used for the verification and repair of terminals in the factory or in a repair shop. Of course, various modifications can be made by those skilled in the art to the devices and methods which have just been described solely as examples.

  non-limiting without departing from the scope of the invention.

24837 1 8

Claims (11)

  i. A terminal verification circuit for a cable television system having a single center (1) and a number of terminals (28) connected to the center so that television programs are transmitted by cables to terminals, said circuit being characterized by it comprises a generator circuit (34) for periodically forming call configuration signals each having a specific address code calling a corresponding terminal and a control code requesting a designated response from the called terminal, a circuit passive data control means (32) for comparing a data transmitted signal from a terminal as a result of the command code, with the designated response requested by the command code, and judging a state of operation   of the terminal according to the result of the comparison, this   passive control cooker comprising a device for   arbitrarily determine an address code, and a cir-   (33) for determining the address code already determined   born in the passive control circuit in the terminal, the passive control circuit being placed between the center and the terminal and the call pattern generation circuit being placed between the center and the control circuit, and the configuration signals of The call is transmitted by the generator circuit via a cable, up to   terminal and, when an address code of the   The call management is identical to the address code determined in the terminal by the determining circuit, a signal originating from data coming from the terminal in response to the control code reaches the passive control circuit and therein a designated answer, requested by the code   command, and the backward signal of data thus trans-   put by the terminal are compared so that the fact that   the operating state of the terminal is acceptable no be determined.   2. Circuit according to claim 1, characterized in that it further comprises an interruption circuit (30) mounted between the configuration generator circuit (34).   and the center (1) and a mixing circuit (31)   between the same generator circuit (34) and the circuit   passive (32) data control.   3. Circuit according to one of claims 1 and 2,   characterized in that the determining circuit (33)   address includes a multi-plug connector   connected by a cable to the passive control circuit, this connection   being intended to liaise with a circuit (69) address of the terminal.   A passive data control circuit for a cable television system having a single center (1) having a number of terminals (28) connected to the   center so that television programs are transmitted   placed by the cables to the terminals, each of the terminals   (28) having a circuit (33) capable of determining   bitrairement an address number, the passive data control circuit being characterized in that it comprises a circuit for receiving a configuration signal   with an address code intended to call a ter-   corresponding minal and an order code intended for de-   request a designated response from the called terminal, and a   positive comparison of a signal originating from data transmitted by the terminal following the code with the designated response requested by the command code, and judging the operating state of the terminal according to the result of the comparison.   Circuit according to Claim 4, characterized in   the reception device comprises a feedback circuit   signal splitter (38) having a high level terminal for connection to a cable from the center, an output for connection to a terminus, and a terminal   low level, a band pass filter (39) having a   connected to the low level terminal of the distributed circuit   a signal detector (40) having an input   linked to an output of the bandpass filter, a pass filter   (41) having an input connected to an output of the detector   signal converter, a shaping circuit (43) having a   input connected to an output of the high-pass filter, a con-   a non-return-to-zero code binary code builder (45) having a data input connected to an output of the shaper circuit; a series-to-parallel converter (46) having an input connected to a data output of the binary code converter; non-return code to zero, a generator   (44) having an input connected to the output of the circuit   a shaper and an output connected to the clock inputs of the non-return-to-zero code converter and the serial-to-parallel converter, a low-pass filter (42) having an input connected to the output of the signal detector, a flip-flop control circuit (47) having an input connected to an output of the low-pass filter, a data flip-flop (48) having an input connected to an output of the serial-parallel converter and a connected clock input   to an output of the flip-flop control circuit, and a circuit   control circuit (50) connected to the output of the flip-flop, and in that the comparison circuit comprises a comparator (49) having a first input channel connected to an output of the flip-flop, a selector switch (52) having outings   related to the address entries of a passive memory of   a passive address memory (54) having address inputs connected to the outputs of the selector switch, an isolation buffer (55) having an input connected to an output of the passive address memory, and an display unit (51) of judgment controlled by the signal of output of the comparator.   Circuit according to Claim 5, characterized in   it further comprises a front panel (56), a first   connector (55) mounted on said panel and connected to the high level terminal of the signal splitter circuit, a second connector (58) mounted on the panel and connected to the output splitter of the signal splitter circuit, and a connector (59). ) of multiple plug address, mounted on the front panel and having its plugs connected to the outputs of the isolation buffer circuit, the selector switch and   the control circuit being mounted on the control panel   mande. Circuit according to Claim 6, characterized in   what the judgment display unit of the circuit of con-   control has photoemissive diodes (60-65). 8. A call configuration generator circuit for a cable television system having a single center and a number of terminals connected to the single center so that television programs are transmitted by cables to the terminals, said generator circuit being   characterized by comprising a circuit for   mer call configuration signals each having a specific address code for calling a corresponding terminal and a control code for requesting a designated response from the called terminal, at least one call configuration signal being issued periodically in a predetermined interval, so that the terminal is called according to the address code and a designated response is transmitted by this terminal according to the command code the call configuration signal.   9. Circuit according to claim 8, characterized in   what the circuit intended to form configurational signals   circuit comprises a passive data memory (70), a set of data switches (71), a timing control circuit (73) connected to the passive memory and the game   data switches to cause the transmission of   successive collection of data by passive memory and   set of switches, a control circuit (73) for controlling   valle comprising a multi-position switch connected to the timing control circuit and for determining   the range of output signals, a selector switch   (72) having inputs connected to the outputs of the   passive memory of data and the set of data   to transmit a signal chosen from among these   output terminals, an external data input terminal (77)   a data source switch having input terminals connected to the outputs of the selector circuit and to the external data input terminal, a binary-code zero-return code converter (74) having a   input connected to an output terminal of the selector switch   of a data source, and a frequency modulator circuit (75) having an input connected to an output of the   non-return code converter to zero in binary code.   Circuit according to claim 9, characterized in that   it further comprises an attenuator circuit (84)   linked to an output of the frequency modulator.   11. Circuit according to any one of the claims   8 to 10, characterized in that it further comprises a front panel (78), a first connector (81) mounted on the front panel and connected to the external data input terminal, a second connector (82) placed on the front panel and connected   at an output of the frequency modulator, the   source reader and the multi-position switch being mounted on the front panel, and the generator circuit further comprises a housing mounted near the front panel and having a removable cover (87) providing access to the data switches.