FR2445987A1 - DATA PROCESSING UNIT - Google Patents
DATA PROCESSING UNITInfo
- Publication number
- FR2445987A1 FR2445987A1 FR8000039A FR8000039A FR2445987A1 FR 2445987 A1 FR2445987 A1 FR 2445987A1 FR 8000039 A FR8000039 A FR 8000039A FR 8000039 A FR8000039 A FR 8000039A FR 2445987 A1 FR2445987 A1 FR 2445987A1
- Authority
- FR
- France
- Prior art keywords
- program
- data processing
- execution
- processing unit
- address
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/22—Microcontrol or microprogram arrangements
- G06F9/26—Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
- G06F9/262—Arrangements for next microinstruction selection
- G06F9/264—Microinstruction selection based on results of processing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/448—Execution paradigms, e.g. implementations of programming paradigms
- G06F9/4482—Procedural
- G06F9/4484—Executing subprograms
- G06F9/4486—Formation of subprogram jump address
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Executing Machine-Instructions (AREA)
Abstract
Unité de traitement de données à dispositif d'adressage de mémoire de commande perfectionné. L'unité comprend des moyens logiques 13 pour l'exécution d'un premier et d'un second programme, une mémoire 10 contenant un ensemble d'instructions pour valider les moyens d'exécution de programme, un moyen 40 pour conserver une adresse associée à la dernière instruction d'un premier programme exécuté au moment où celui-ci est arrêté par un moyen approprié pour l'exécution d'un second programme, un moyen 880 (fig. 8B) pour changer l'état d'un des bits de ladite adresse avant retour à l'execution du premier programme, afin d'adresser l'instruction suivante du premier programme qui suit ladite dernière instruction. Application aux systèmes de traitement de données microprogrammés.Data processing unit with advanced control memory addressing device. The unit comprises logic means 13 for executing a first and a second program, a memory 10 containing a set of instructions for validating the program execution means, means 40 for keeping an associated address at the last instruction of a first program executed at the moment when the latter is stopped by an appropriate means for the execution of a second program, means 880 (FIG. 8B) for changing the state of one of the bits of said address before returning to the execution of the first program, in order to address the next instruction of the first program which follows said last instruction. Application to microprogrammed data processing systems.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US06/000,864 US4224668A (en) | 1979-01-03 | 1979-01-03 | Control store address generation logic for a data processing system |
| US06/000,734 US4309753A (en) | 1979-01-03 | 1979-01-03 | Apparatus and method for next address generation in a data processing system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| FR2445987A1 true FR2445987A1 (en) | 1980-08-01 |
| FR2445987B1 FR2445987B1 (en) | 1985-11-22 |
Family
ID=26668073
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FR8000039A Expired FR2445987B1 (en) | 1979-01-03 | 1980-01-02 | DATA PROCESSING UNIT |
Country Status (4)
| Country | Link |
|---|---|
| CA (1) | CA1138118A (en) |
| DE (1) | DE3000107A1 (en) |
| FR (1) | FR2445987B1 (en) |
| GB (2) | GB2040519B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4491908A (en) * | 1981-12-01 | 1985-01-01 | Honeywell Information Systems Inc. | Microprogrammed control of extended integer and commercial instruction processor instructions through use of a data type field in a central processor unit |
| US4450525A (en) * | 1981-12-07 | 1984-05-22 | Ibm Corporation | Control unit for a functional processor |
-
1979
- 1979-12-13 GB GB7942984A patent/GB2040519B/en not_active Expired
-
1980
- 1980-01-02 FR FR8000039A patent/FR2445987B1/en not_active Expired
- 1980-01-02 CA CA000342927A patent/CA1138118A/en not_active Expired
- 1980-01-03 DE DE19803000107 patent/DE3000107A1/en active Granted
-
1983
- 1983-01-25 GB GB08302033A patent/GB2117943B/en not_active Expired
Non-Patent Citations (1)
| Title |
|---|
| EXBK/70 * |
Also Published As
| Publication number | Publication date |
|---|---|
| GB2117943A (en) | 1983-10-19 |
| GB2040519B (en) | 1983-08-17 |
| GB8302033D0 (en) | 1983-02-23 |
| GB2040519A (en) | 1980-08-28 |
| FR2445987B1 (en) | 1985-11-22 |
| GB2117943B (en) | 1984-03-21 |
| DE3000107C2 (en) | 1988-06-01 |
| CA1138118A (en) | 1982-12-21 |
| DE3000107A1 (en) | 1980-07-17 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| ST | Notification of lapse | ||
| AR | Application made for restoration | ||
| BR | Restoration of rights | ||
| ST | Notification of lapse |