FR2437629A1 - Testeur de bus multiplexes de communications numeriques - Google Patents

Testeur de bus multiplexes de communications numeriques

Info

Publication number
FR2437629A1
FR2437629A1 FR7917840A FR7917840A FR2437629A1 FR 2437629 A1 FR2437629 A1 FR 2437629A1 FR 7917840 A FR7917840 A FR 7917840A FR 7917840 A FR7917840 A FR 7917840A FR 2437629 A1 FR2437629 A1 FR 2437629A1
Authority
FR
France
Prior art keywords
combinations
logic
timing
digital communications
receive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
FR7917840A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bendix Corp
Original Assignee
Bendix Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bendix Corp filed Critical Bendix Corp
Publication of FR2437629A1 publication Critical patent/FR2437629A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/14—Monitoring arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Dc Digital Transmission (AREA)
  • Small-Scale Networks (AREA)

Abstract

TESTEUR DESTINE A TESTER UN BUS MULTIPLEXE DE COMMUNICATIONS NUMERIQUES COMPRENANT DES COMMUTATEURS DE SELECTION DE BITS POUR PROCURER DES COMBINAISONS DE MOTS NUMERIQUES; DES REGISTRES A DECALAGE DESTINES A RECEVOIR CES COMBINAISONS; UNE LOGIQUE DE SELECTION DE MOTS DESTINES A RENDRE LES REGISTRES OPERANTS POUR RECEVOIR LES COMBINAISONS; UNE LOGIQUE DE CADENCEMENT DELIVRANT DES SIGNAUX DE CADENCEMENT, LA LOGIQUE DE SELECTION DE MOTS ETANT SENSIBLE A DES SIGNAUX DE CADENCEMENT PARTICULIERS POUR ACHEMINER PAR DECALAGE LES COMBINAISONS SELECTIONNEES DEPUIS LES REGISTRES VERS LA LOGIQUE DE CADENCEMENT, LAQUELLE SYNCHRONISE LES COMBINAISONS SELECTIONNEES ET DECALEES; ET DES VOIES DE SORTIE CONNECTEES A LA LOGIQUE DE CADENCEMENT PAR UNE LOGIQUE DE CONTROLE POUR RECEVOIR LES COMBINAISONS SYNCHRONISEES, LA LOGIQUE DE CONTROLE ETANT SENSIBLE A D'AUTRES SIGNAUX DE CADENCEMENT POUR SELECTIONNER AU MOINS UNE VOIE DE SORTIE AFIN DE PROCURER DES SIGNAUX DE SORTIE DESTINES A TESTER LE BUS MULTIPLEXE DE COMMUNICATIONS NUMERIQUES.
FR7917840A 1978-09-27 1979-07-10 Testeur de bus multiplexes de communications numeriques Withdrawn FR2437629A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/946,286 US4180865A (en) 1978-09-27 1978-09-27 Portable multiplex bus exerciser

Publications (1)

Publication Number Publication Date
FR2437629A1 true FR2437629A1 (fr) 1980-04-25

Family

ID=25484259

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7917840A Withdrawn FR2437629A1 (fr) 1978-09-27 1979-07-10 Testeur de bus multiplexes de communications numeriques

Country Status (6)

Country Link
US (1) US4180865A (fr)
JP (1) JPS5545293A (fr)
CA (1) CA1117670A (fr)
DE (1) DE2932926A1 (fr)
FR (1) FR2437629A1 (fr)
GB (1) GB2030710B (fr)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5810288A (ja) * 1981-02-10 1983-01-20 オムロン株式会社 現金カセツト
JPS61249635A (ja) * 1985-04-26 1986-11-06 Enami Seiki:Kk 板状部材の接合方法
JPS62270232A (ja) * 1986-05-19 1987-11-24 Yokogawa Hewlett Packard Ltd 金属板のかしめ継ぎ構造の作製方法
US5405538A (en) * 1994-01-07 1995-04-11 Clearline Systems, Inc. Immiscible liquids separator
TW508490B (en) * 1999-08-27 2002-11-01 Via Tech Inc PCI debugging device and method and chipset and system using the same

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3638007A (en) * 1969-08-05 1972-01-25 Herbert B Brooks Digital control simulator

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
EXBK/75 *

Also Published As

Publication number Publication date
GB2030710B (en) 1982-10-27
DE2932926A1 (de) 1980-04-17
CA1117670A (fr) 1982-02-02
US4180865A (en) 1979-12-25
GB2030710A (en) 1980-04-10
JPS5545293A (en) 1980-03-29

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Legal Events

Date Code Title Description
ST Notification of lapse