FR2414227B1 - Unite arithmetique et logique d'un systeme de traitement de donnees - Google Patents

Unite arithmetique et logique d'un systeme de traitement de donnees

Info

Publication number
FR2414227B1
FR2414227B1 FR7900272A FR7900272A FR2414227B1 FR 2414227 B1 FR2414227 B1 FR 2414227B1 FR 7900272 A FR7900272 A FR 7900272A FR 7900272 A FR7900272 A FR 7900272A FR 2414227 B1 FR2414227 B1 FR 2414227B1
Authority
FR
France
Prior art keywords
arithmetic
data processing
processing system
logic unit
logic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR7900272A
Other languages
English (en)
Other versions
FR2414227A1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull HN Information Systems Italia SpA
Bull HN Information Systems Inc
Original Assignee
Honeywell Information Systems Italia SpA
Honeywell Information Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Information Systems Italia SpA, Honeywell Information Systems Inc filed Critical Honeywell Information Systems Italia SpA
Publication of FR2414227A1 publication Critical patent/FR2414227A1/fr
Application granted granted Critical
Publication of FR2414227B1 publication Critical patent/FR2414227B1/fr
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/01—Methods or arrangements for data conversion without changing the order or content of the data handled for shifting, e.g. justifying, scaling, normalising
    • G06F5/012—Methods or arrangements for data conversion without changing the order or content of the data handled for shifting, e.g. justifying, scaling, normalising in floating-point computations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/483—Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804—Details
    • G06F2207/3808—Details concerning the type of numbers or the way they are handled
    • G06F2207/3812—Devices capable of handling different types of numbers
    • G06F2207/382—Reconfigurable for different fixed word lengths
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804—Details
    • G06F2207/3808—Details concerning the type of numbers or the way they are handled
    • G06F2207/3828—Multigauge devices, i.e. capable of handling packed numbers without unpacking them

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Computational Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)
  • Complex Calculations (AREA)
FR7900272A 1978-01-05 1979-01-05 Unite arithmetique et logique d'un systeme de traitement de donnees Expired FR2414227B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/867,242 US4161784A (en) 1978-01-05 1978-01-05 Microprogrammable floating point arithmetic unit capable of performing arithmetic operations on long and short operands

Publications (2)

Publication Number Publication Date
FR2414227A1 FR2414227A1 (fr) 1979-08-03
FR2414227B1 true FR2414227B1 (fr) 1987-12-31

Family

ID=25349402

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7900272A Expired FR2414227B1 (fr) 1978-01-05 1979-01-05 Unite arithmetique et logique d'un systeme de traitement de donnees

Country Status (7)

Country Link
US (1) US4161784A (fr)
JP (1) JPS5498146A (fr)
AU (1) AU518371B2 (fr)
CA (1) CA1120594A (fr)
DE (1) DE2900324A1 (fr)
FR (1) FR2414227B1 (fr)
GB (1) GB2015783B (fr)

Families Citing this family (135)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4954951A (en) * 1970-12-28 1990-09-04 Hyatt Gilbert P System and method for increasing memory performance
US5526506A (en) * 1970-12-28 1996-06-11 Hyatt; Gilbert P. Computer system having an improved memory architecture
US5459846A (en) * 1988-12-02 1995-10-17 Hyatt; Gilbert P. Computer architecture system having an imporved memory
JPS5833572B2 (ja) * 1977-10-21 1983-07-20 株式会社東芝 情報処理方式
US4229801A (en) * 1978-12-11 1980-10-21 Data General Corporation Floating point processor having concurrent exponent/mantissa operation
US4293907A (en) * 1978-12-29 1981-10-06 Bell Telephone Laboratories, Incorporated Data processing apparatus having op-code extension register
US4240144A (en) * 1979-01-02 1980-12-16 Honeywell Information Systems Inc. Long operand alignment and merge operation
US4310879A (en) * 1979-03-08 1982-01-12 Pandeya Arun K Parallel processor having central processor memory extension
US4308589A (en) * 1979-11-08 1981-12-29 Honeywell Information Systems Inc. Apparatus for performing the scientific add instruction
US4598358A (en) * 1980-02-11 1986-07-01 At&T Bell Laboratories Pipelined digital signal processor using a common data and control bus
US4360891A (en) * 1980-04-14 1982-11-23 Sperry Corporation Address and data interface unit
JPS56147260A (en) * 1980-04-18 1981-11-16 Nec Corp Lsi for digital signal processing
US4418383A (en) * 1980-06-30 1983-11-29 International Business Machines Corporation Data flow component for processor and microprocessor systems
IT1150998B (it) * 1980-09-02 1986-12-17 Telecomucicazioni Siemens Spa Unita' di controllo di un modulo ingresso-uscita di un elaboratore elettronico
US4422143A (en) * 1980-11-24 1983-12-20 Texas Instruments Incorporated Microprocessor ALU with absolute value function
US4366548A (en) * 1981-01-02 1982-12-28 Sperry Corporation Adder for exponent arithmetic
US4484276A (en) * 1981-02-19 1984-11-20 Sperry Corporation Shift matrix preselector control circuit
US4493025A (en) * 1981-05-22 1985-01-08 Data General Corporation Digital data processing system using unique means for comparing operational results and locations at which such results are to be stored
US4476537A (en) * 1981-06-11 1984-10-09 Data General Corporation Fixed point and floating point computation units using commonly shared control fields
US4468748A (en) * 1981-06-11 1984-08-28 Data General Corporation Floating point computation unit having means for rounding the floating point computation result
US4720783A (en) * 1981-08-24 1988-01-19 General Electric Company Peripheral bus with continuous real-time control
US4577282A (en) * 1982-02-22 1986-03-18 Texas Instruments Incorporated Microcomputer system for digital signal processing
US4491910A (en) * 1982-02-22 1985-01-01 Texas Instruments Incorporated Microcomputer having data shift within memory
US4586131A (en) * 1982-02-22 1986-04-29 Texas Instruments Incorporated Microcomputer having data move circuits for within-memory shift of data words
US4612628A (en) * 1983-02-14 1986-09-16 Data General Corp. Floating-point unit constructed of identical modules
US4914578A (en) * 1983-04-18 1990-04-03 Motorola, Inc. Method and apparatus for interrupting a coprocessor
JPS6043751A (ja) * 1983-08-18 1985-03-08 Hitachi Ltd 情報処理装置
US5093775A (en) * 1983-11-07 1992-03-03 Digital Equipment Corporation Microcode control system for digital data processing system
US4660143A (en) * 1984-09-24 1987-04-21 The United States Of America As Represented By The Secretary Of The Air Force Programmable realtime interface between a Block Floating Point processor and memory
US5034879A (en) * 1984-10-01 1991-07-23 Unisys Corp. (Formerly Burroughs Corp.) Programmable data path width in a programmable unit having plural levels of subinstruction sets
US4773035A (en) * 1984-10-19 1988-09-20 Amdahl Corporation Pipelined data processing system utilizing ideal floating point execution condition detection
US4736317A (en) * 1985-07-17 1988-04-05 Syracuse University Microprogram-coupled multiple-microprocessor module with 32-bit byte width formed of 8-bit byte width microprocessors
US4858115A (en) * 1985-07-31 1989-08-15 Unisys Corporation Loop control mechanism for scientific processor
US4763294A (en) * 1985-12-19 1988-08-09 Wang Laboratories, Inc. Method and apparatus for floating point operations
JPS62229436A (ja) * 1986-03-31 1987-10-08 Toshiba Corp 二進数デ−タ判別回路
US4841435A (en) * 1986-10-29 1989-06-20 Saxpy Computer Corporation Data alignment system for random and block transfers of embedded subarrays of an array onto a system bus
US4800516A (en) * 1986-10-31 1989-01-24 Amdahl Corporation High speed floating-point unit
US4839801A (en) * 1986-11-03 1989-06-13 Saxpy Computer Corporation Architecture for block processing computer system
US5091845A (en) * 1987-02-24 1992-02-25 Digital Equipment Corporation System for controlling the storage of information in a cache memory
US5226170A (en) * 1987-02-24 1993-07-06 Digital Equipment Corporation Interface between processor and special instruction processor in digital data processing system
US5032986A (en) * 1987-07-28 1991-07-16 Texas Instruments Incorporated Data processing device with parallel circular addressing hardware
US4901268A (en) * 1988-08-19 1990-02-13 General Electric Company Multiple function data processor
US5062041A (en) * 1988-12-29 1991-10-29 Wang Laboratories, Inc. Processor/coprocessor interface apparatus including microinstruction clock synchronization
EP0503514B1 (fr) * 1991-03-11 1998-11-18 Silicon Graphics, Inc. Architecture d'ordinateur compatible en arrière ayant une largeur de mot et un espace d'adressage étendus
US5375080A (en) * 1992-12-18 1994-12-20 Xerox Corporation Performing arithmetic on composite operands to obtain a binary outcome for each multi-bit component
GB2274730B (en) * 1993-01-30 1997-05-28 Motorola Inc A mantissa addition system for a floating point adder
US5574928A (en) * 1993-10-29 1996-11-12 Advanced Micro Devices, Inc. Mixed integer/floating point processor core for a superscalar microprocessor with a plurality of operand buses for transferring operand segments
EP0651332B1 (fr) * 1993-10-29 2001-07-18 Advanced Micro Devices, Inc. Antémémoire de microprocesseur à adressage linéaire
EP0651320B1 (fr) * 1993-10-29 2001-05-23 Advanced Micro Devices, Inc. Décodeur d'instructions superscalaires
DE69434669T2 (de) * 1993-10-29 2006-10-12 Advanced Micro Devices, Inc., Sunnyvale Spekulative Befehlswarteschlange für Befehle mit variabler Byteslänge
DE69429061T2 (de) * 1993-10-29 2002-07-18 Advanced Micro Devices, Inc. Superskalarmikroprozessoren
US5878245A (en) 1993-10-29 1999-03-02 Advanced Micro Devices, Inc. High performance load/store functional unit and data cache
US5689672A (en) * 1993-10-29 1997-11-18 Advanced Micro Devices, Inc. Pre-decoded instruction cache and method therefor particularly suitable for variable byte-length instructions
EP0654733B1 (fr) * 1993-11-23 2000-05-24 Hewlett-Packard Company Traitement de données en parallèle dans un processeur unique
US5541865A (en) * 1993-12-30 1996-07-30 Intel Corporation Method and apparatus for performing a population count operation
EP0681236B1 (fr) * 1994-05-05 2000-11-22 Conexant Systems, Inc. Chemin de données de vecteur d'espace
US5696955A (en) * 1994-06-01 1997-12-09 Advanced Micro Devices, Inc. Floating point stack and exchange instruction
US5642306A (en) * 1994-07-27 1997-06-24 Intel Corporation Method and apparatus for a single instruction multiple data early-out zero-skip multiplier
US5574670A (en) * 1994-08-24 1996-11-12 Advanced Micro Devices, Inc. Apparatus and method for determining a number of digits leading a particular digit
US6738793B2 (en) * 1994-12-01 2004-05-18 Intel Corporation Processor capable of executing packed shift operations
ZA9510127B (en) * 1994-12-01 1996-06-06 Intel Corp Novel processor having shift operations
EP0795155B1 (fr) * 1994-12-01 2003-03-19 Intel Corporation Microprocesseur pourvu d'une unite de multiplication
US6275834B1 (en) 1994-12-01 2001-08-14 Intel Corporation Apparatus for performing packed shift operations
US5819101A (en) * 1994-12-02 1998-10-06 Intel Corporation Method for packing a plurality of packed data elements in response to a pack instruction
CN101211255B (zh) 1994-12-02 2012-07-04 英特尔公司 对复合操作数进行压缩操作的处理器、设备和计算系统
US5687359A (en) * 1995-03-31 1997-11-11 International Business Machines Corporation Floating point processor supporting hexadecimal and binary modes using common instructions with memory storing a pair of representations for each value
US5752001A (en) * 1995-06-01 1998-05-12 Intel Corporation Method and apparatus employing Viterbi scoring using SIMD instructions for data recognition
US6643765B1 (en) 1995-08-16 2003-11-04 Microunity Systems Engineering, Inc. Programmable processor with group floating point operations
US7395298B2 (en) * 1995-08-31 2008-07-01 Intel Corporation Method and apparatus for performing multiply-add operations on packed data
US6385634B1 (en) * 1995-08-31 2002-05-07 Intel Corporation Method for performing multiply-add operations on packed data
US5721892A (en) * 1995-08-31 1998-02-24 Intel Corporation Method and apparatus for performing multiply-subtract operations on packed data
US5983253A (en) * 1995-09-05 1999-11-09 Intel Corporation Computer system for performing complex digital filters
US5936872A (en) * 1995-09-05 1999-08-10 Intel Corporation Method and apparatus for storing complex numbers to allow for efficient complex multiplication operations and performing such complex multiplication operations
US6470370B2 (en) 1995-09-05 2002-10-22 Intel Corporation Method and apparatus for multiplying and accumulating complex numbers in a digital filter
US6237016B1 (en) 1995-09-05 2001-05-22 Intel Corporation Method and apparatus for multiplying and accumulating data samples and complex coefficients
US6058408A (en) * 1995-09-05 2000-05-02 Intel Corporation Method and apparatus for multiplying and accumulating complex numbers in a digital filter
US5878266A (en) * 1995-09-26 1999-03-02 Advanced Micro Devices, Inc. Reservation station for a floating point processing unit
US5748516A (en) * 1995-09-26 1998-05-05 Advanced Micro Devices, Inc. Floating point processing unit with forced arithmetic results
US5761105A (en) * 1995-09-26 1998-06-02 Advanced Micro Devices, Inc. Reservation station including addressable constant store for a floating point processing unit
US5822459A (en) * 1995-09-28 1998-10-13 Intel Corporation Method for processing wavelet bands
US5796974A (en) * 1995-11-07 1998-08-18 Advanced Micro Devices, Inc. Microcode patching apparatus and method
US5935240A (en) * 1995-12-15 1999-08-10 Intel Corporation Computer implemented method for transferring packed data between register files and memory
US5984515A (en) * 1995-12-15 1999-11-16 Intel Corporation Computer implemented method for providing a two dimensional rotation of packed data
US5757432A (en) * 1995-12-18 1998-05-26 Intel Corporation Manipulating video and audio signals using a processor which supports SIMD instructions
US5815421A (en) * 1995-12-18 1998-09-29 Intel Corporation Method for transposing a two-dimensional array
US5857096A (en) * 1995-12-19 1999-01-05 Intel Corporation Microarchitecture for implementing an instruction to clear the tags of a stack reference register file
US6792523B1 (en) 1995-12-19 2004-09-14 Intel Corporation Processor with instructions that operate on different data types stored in the same single logical register file
AU1465497A (en) * 1995-12-19 1997-07-28 Intel Corporation A computer system performing a two-dimensional rotation of packed data representing multimedia information
US5835748A (en) * 1995-12-19 1998-11-10 Intel Corporation Method for executing different sets of instructions that cause a processor to perform different data type operations on different physical registers files that logically appear to software as a single aliased register file
US5852726A (en) * 1995-12-19 1998-12-22 Intel Corporation Method and apparatus for executing two types of instructions that specify registers of a shared logical register file in a stack and a non-stack referenced manner
US5940859A (en) * 1995-12-19 1999-08-17 Intel Corporation Emptying packed data state during execution of packed data instructions
US5701508A (en) 1995-12-19 1997-12-23 Intel Corporation Executing different instructions that cause different data type operations to be performed on single logical register file
US6036350A (en) * 1995-12-20 2000-03-14 Intel Corporation Method of sorting signed numbers and solving absolute differences using packed instructions
US5907842A (en) * 1995-12-20 1999-05-25 Intel Corporation Method of sorting numbers to obtain maxima/minima values with ordering
US5787026A (en) * 1995-12-20 1998-07-28 Intel Corporation Method and apparatus for providing memory access in a processor pipeline
US5742529A (en) * 1995-12-21 1998-04-21 Intel Corporation Method and an apparatus for providing the absolute difference of unsigned values
US5880979A (en) * 1995-12-21 1999-03-09 Intel Corporation System for providing the absolute difference of unsigned values
US5793661A (en) * 1995-12-26 1998-08-11 Intel Corporation Method and apparatus for performing multiply and accumulate operations on packed data
US5983257A (en) * 1995-12-26 1999-11-09 Intel Corporation System for signal processing using multiply-add operations
US5740392A (en) * 1995-12-27 1998-04-14 Intel Corporation Method and apparatus for fast decoding of 00H and OFH mapped instructions
US5764943A (en) * 1995-12-28 1998-06-09 Intel Corporation Data path circuitry for processor having multiple instruction pipelines
US6092184A (en) * 1995-12-28 2000-07-18 Intel Corporation Parallel processing of pipelined instructions having register dependencies
US5835392A (en) * 1995-12-28 1998-11-10 Intel Corporation Method for performing complex fast fourier transforms (FFT's)
US5862067A (en) * 1995-12-29 1999-01-19 Intel Corporation Method and apparatus for providing high numerical accuracy with packed multiply-add or multiply-subtract operations
US6009191A (en) * 1996-02-15 1999-12-28 Intel Corporation Computer implemented method for compressing 48-bit pixels to 16-bit pixels
US5621674A (en) * 1996-02-15 1997-04-15 Intel Corporation Computer implemented method for compressing 24 bit pixels to 16 bit pixels
US5959636A (en) * 1996-02-23 1999-09-28 Intel Corporation Method and apparatus for performing saturation instructions using saturation limit values
US5822232A (en) * 1996-03-01 1998-10-13 Intel Corporation Method for performing box filter
US5835782A (en) * 1996-03-04 1998-11-10 Intel Corporation Packed/add and packed subtract operations
US6070237A (en) * 1996-03-04 2000-05-30 Intel Corporation Method for performing population counts on packed data types
US5831885A (en) * 1996-03-04 1998-11-03 Intel Corporation Computer implemented method for performing division emulation
US6049864A (en) * 1996-08-20 2000-04-11 Intel Corporation Method for scheduling a flag generating instruction and a subsequent instruction by executing the flag generating instruction in a microprocessor
US5881279A (en) * 1996-11-25 1999-03-09 Intel Corporation Method and apparatus for handling invalid opcode faults via execution of an event-signaling micro-operation
US6014684A (en) * 1997-03-24 2000-01-11 Intel Corporation Method and apparatus for performing N bit by 2*N-1 bit signed multiplication
US6081824A (en) * 1998-03-05 2000-06-27 Intel Corporation Method and apparatus for fast unsigned integral division
US7395302B2 (en) 1998-03-31 2008-07-01 Intel Corporation Method and apparatus for performing horizontal addition and subtraction
US6041404A (en) 1998-03-31 2000-03-21 Intel Corporation Dual function system and method for shuffling packed data elements
US7392275B2 (en) * 1998-03-31 2008-06-24 Intel Corporation Method and apparatus for performing efficient transformations with horizontal addition and subtraction
US6418529B1 (en) 1998-03-31 2002-07-09 Intel Corporation Apparatus and method for performing intra-add operation
US6205461B1 (en) 1998-09-18 2001-03-20 Ati International Srl Floating point arithmetic logic unit leading zero count using fast approximate rounding
US6199089B1 (en) 1998-09-18 2001-03-06 Ati International Srl Floating point arithmetic logic unit rounding using at least one least significant bit
US6272512B1 (en) 1998-10-12 2001-08-07 Intel Corporation Data manipulation instruction for enhancing value and efficiency of complex arithmetic
FR2802660B1 (fr) * 1999-12-21 2002-11-29 St Microelectronics Sa Procede pour effectuer des operations avec une arithmetique variable
US6725360B1 (en) * 2000-03-31 2004-04-20 Intel Corporation Selectively processing different size data in multiplier and ALU paths in parallel
US7155601B2 (en) * 2001-02-14 2006-12-26 Intel Corporation Multi-element operand sub-portion shuffle instruction execution
US7624138B2 (en) 2001-10-29 2009-11-24 Intel Corporation Method and apparatus for efficient integer transform
US7685212B2 (en) * 2001-10-29 2010-03-23 Intel Corporation Fast full search motion estimation with SIMD merge instruction
US7739319B2 (en) * 2001-10-29 2010-06-15 Intel Corporation Method and apparatus for parallel table lookup using SIMD instructions
US7631025B2 (en) * 2001-10-29 2009-12-08 Intel Corporation Method and apparatus for rearranging data between multiple registers
US7430578B2 (en) * 2001-10-29 2008-09-30 Intel Corporation Method and apparatus for performing multiply-add operations on packed byte data
US7725521B2 (en) * 2001-10-29 2010-05-25 Intel Corporation Method and apparatus for computing matrix transformations
US7818356B2 (en) 2001-10-29 2010-10-19 Intel Corporation Bitstream buffer manipulation with a SIMD merge instruction
US20040054877A1 (en) 2001-10-29 2004-03-18 Macy William W. Method and apparatus for shuffling data
US7047383B2 (en) * 2002-07-11 2006-05-16 Intel Corporation Byte swap operation for a 64 bit operand
US8078836B2 (en) 2007-12-30 2011-12-13 Intel Corporation Vector shuffle instructions operating on multiple lanes each having a plurality of data elements using a common set of per-lane control bits

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE629725A (fr) * 1962-03-29
US3287703A (en) * 1962-12-04 1966-11-22 Westinghouse Electric Corp Computer
US3551665A (en) * 1966-09-13 1970-12-29 Ibm Floating point binary adder utilizing completely sequential hardware
US3571803A (en) * 1968-06-04 1971-03-23 Bell Telephone Labor Inc Arithmetic unit for data processing systems
US3751650A (en) * 1971-06-28 1973-08-07 Burroughs Corp Variable length arithmetic unit
US3739352A (en) * 1971-06-28 1973-06-12 Burroughs Corp Variable word width processor control
US3725649A (en) * 1971-10-01 1973-04-03 Raytheon Co Floating point number processor for a digital computer
DE2222195A1 (de) * 1972-05-05 1973-11-22 Siemens Ag Anordnung zur verarbeitung von operanden von programmen
GB1475471A (en) * 1974-01-21 1977-06-01 Data General Corp Floating point apparatus and techniques
US3987291A (en) * 1975-05-01 1976-10-19 International Business Machines Corporation Parallel digital arithmetic device having a variable number of independent arithmetic zones of variable width and location

Also Published As

Publication number Publication date
DE2900324C2 (fr) 1989-01-19
DE2900324A1 (de) 1979-07-19
JPS618446B2 (fr) 1986-03-14
AU4304579A (en) 1979-07-12
GB2015783B (en) 1982-05-19
FR2414227A1 (fr) 1979-08-03
CA1120594A (fr) 1982-03-23
JPS5498146A (en) 1979-08-02
AU518371B2 (en) 1981-09-24
US4161784A (en) 1979-07-17
GB2015783A (en) 1979-09-12

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