FR2802660B1 - Procede pour effectuer des operations avec une arithmetique variable - Google Patents

Procede pour effectuer des operations avec une arithmetique variable

Info

Publication number
FR2802660B1
FR2802660B1 FR9916177A FR9916177A FR2802660B1 FR 2802660 B1 FR2802660 B1 FR 2802660B1 FR 9916177 A FR9916177 A FR 9916177A FR 9916177 A FR9916177 A FR 9916177A FR 2802660 B1 FR2802660 B1 FR 2802660B1
Authority
FR
France
Prior art keywords
arithmetics
variable
performing operations
operations
variable arithmetics
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9916177A
Other languages
English (en)
Other versions
FR2802660A1 (fr
Inventor
David Jacquet
Pascal Fouilleul
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Priority to FR9916177A priority Critical patent/FR2802660B1/fr
Priority to US09/738,132 priority patent/US6681236B2/en
Publication of FR2802660A1 publication Critical patent/FR2802660A1/fr
Application granted granted Critical
Publication of FR2802660B1 publication Critical patent/FR2802660B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/57—Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 – G06F7/556 or for performing logical operations
    • G06F7/575—Basic arithmetic logic units, i.e. devices selectable to perform either addition, subtraction or one of several logical operations, using, at least partially, the same circuitry
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804—Details
    • G06F2207/3808—Details concerning the type of numbers or the way they are handled
    • G06F2207/3812—Devices capable of handling different types of numbers

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Complex Calculations (AREA)
  • Executing Machine-Instructions (AREA)
FR9916177A 1999-12-21 1999-12-21 Procede pour effectuer des operations avec une arithmetique variable Expired - Fee Related FR2802660B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR9916177A FR2802660B1 (fr) 1999-12-21 1999-12-21 Procede pour effectuer des operations avec une arithmetique variable
US09/738,132 US6681236B2 (en) 1999-12-21 2000-12-15 Method of performing operations with a variable arithmetic

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9916177A FR2802660B1 (fr) 1999-12-21 1999-12-21 Procede pour effectuer des operations avec une arithmetique variable

Publications (2)

Publication Number Publication Date
FR2802660A1 FR2802660A1 (fr) 2001-06-22
FR2802660B1 true FR2802660B1 (fr) 2002-11-29

Family

ID=9553570

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9916177A Expired - Fee Related FR2802660B1 (fr) 1999-12-21 1999-12-21 Procede pour effectuer des operations avec une arithmetique variable

Country Status (2)

Country Link
US (1) US6681236B2 (fr)
FR (1) FR2802660B1 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11164162B2 (en) 2019-01-30 2021-11-02 Bank Of America Corporation Closed-loop real-time resource event processing
US10977080B2 (en) 2019-01-30 2021-04-13 Bank Of America Corporation Resource instrument for processing a real-time resource event

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1245441A (en) * 1968-08-27 1971-09-08 Int Computers Ltd Improvements in or relating to adders operating on variable fields within words
US4161784A (en) * 1978-01-05 1979-07-17 Honeywell Information Systems, Inc. Microprogrammable floating point arithmetic unit capable of performing arithmetic operations on long and short operands
US5189636A (en) * 1987-11-16 1993-02-23 Intel Corporation Dual mode combining circuitry
US6219688B1 (en) * 1993-11-30 2001-04-17 Texas Instruments Incorporated Method, apparatus and system for sum of plural absolute differences
US6016538A (en) * 1993-11-30 2000-01-18 Texas Instruments Incorporated Method, apparatus and system forming the sum of data in plural equal sections of a single data word
US5640578A (en) * 1993-11-30 1997-06-17 Texas Instruments Incorporated Arithmetic logic unit having plural independent sections and register storing resultant indicator bit from every section

Also Published As

Publication number Publication date
US20010004740A1 (en) 2001-06-21
FR2802660A1 (fr) 2001-06-22
US6681236B2 (en) 2004-01-20

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20090831