FR2407523A1 - COMMON LINE FOR DATA PROCESSING SYSTEM WITH OVERLAPPED SEQUENCES - Google Patents

COMMON LINE FOR DATA PROCESSING SYSTEM WITH OVERLAPPED SEQUENCES

Info

Publication number
FR2407523A1
FR2407523A1 FR7830346A FR7830346A FR2407523A1 FR 2407523 A1 FR2407523 A1 FR 2407523A1 FR 7830346 A FR7830346 A FR 7830346A FR 7830346 A FR7830346 A FR 7830346A FR 2407523 A1 FR2407523 A1 FR 2407523A1
Authority
FR
France
Prior art keywords
data
interconnection
command
processing system
item
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7830346A
Other languages
French (fr)
Other versions
FR2407523B1 (en
Inventor
John V Levy
Robert F Stewart
David P Rodgers
Richard J Casabona
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Digital Equipment Corp
Original Assignee
Digital Equipment Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Digital Equipment Corp filed Critical Digital Equipment Corp
Publication of FR2407523A1 publication Critical patent/FR2407523A1/en
Application granted granted Critical
Publication of FR2407523B1 publication Critical patent/FR2407523B1/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4208—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus
    • G06F13/4217—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus with synchronous protocol
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/368—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control
    • G06F13/374—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control using a self-select method with individual priority code comparator

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Small-Scale Networks (AREA)
  • Communication Control (AREA)
  • Bus Control (AREA)

Abstract

A.SYSTEME DE TRAITEMENT DE DONNEES NUMERIQUES COMPRENANT UNE INTERCONNEXION DES DIVERS ELEMENTS QUI CONSTITUENT LE SYSTEME. B.CHAQUE ELEMENT RELIE A L'INTERCONNEXION S'APPELLE UN "NEXUS". POUR QU'UN ELEMENT PUISSE COMMUNIQUER AVEC UN AUTRE ELEMENT, LE PREMIER ELEMENT, EN TANT QUE NEXUS DE COMMANDE, CHERCHE A OBTENIR LE CONTROLE DE L'INTERCONNEXION ET TRANSMET ENSUITE UNE COMMANDE ET UNE ADRESSE D'UNE POSITION DE MEMOIRE A L'AUTRE ELEMENT LORSQU'IL RECOIT LE CONTROLE DE L'INTERCONNEXION. LE CONTROLE EST ENSUITE ABANDONNE A MOINS QUE LE PREMIER ELEMENT DOIVE ENVOYER DES DONNEES A L'AUTRE ELEMENT, DANS QUEL CAS LES DONNEES SONT ENVOYEES IMMEDIATEMENT. SI LES DONNEES DOIVENT ETRE RECUPEREES, L'AUTRE ELEMENT RECUPERE LES DONNEES, DEMANDE LE CONTROLE DE L'INTERCONNEXION ET, LORSQU'IL L'OBTIENT, TRANSMET LES DONNEES SUR L'INTERCONNEXION AVEC UNE IDENTIFICATION DU PREMIER ELEMENT. CELUI-CI RECUPERE ENSUITE LES DONNEES DE L'INTERCONNEXION LORSQU'IL RECONNAIT SA PROPRE IDENTIFICATION. SI L'AUTRE ELEMENT EST UN ELEMENT DE MEMOIRE, IL CONTIENT EN OUTRE UN FICHIER DE STOCKAGE POUR LE STOCKAGE DE COMMANDES ET DE DONNEES S'IL EST DEJA EN TRAIN DE REPONDRE A LA COMMANDE D'UN AUTRE ELEMENT. C.APPLICATIONS DANS LE DOMAINE DE L'INFORMATIQUE.A.DIGITAL DATA PROCESSING SYSTEM INCLUDING INTERCONNECTION OF THE VARIOUS ELEMENTS WHICH MAKE UP THE SYSTEM. B. EACH ELEMENT CONNECTED TO THE INTERCONNECTION IS CALLED A "NEXUS". FOR AN ELEMENT TO COMMUNICATE WITH ANOTHER ELEMENT, THE FIRST ELEMENT, AS A COMMAND NEXUS, SEEKS TO OBTAIN INTERCONNECTION CONTROL AND THEN TRANSMITS A COMMAND AND ADDRESS FROM ONE MEMORY POSITION TO THE OTHER ELEMENT WHEN IT RECEIVES INTERCONNECTION CONTROL. THE CHECK IS THEN ABANDONED UNLESS THE FIRST ELEMENT MUST SEND DATA TO THE OTHER ELEMENT, IN WHICH CASE THE DATA IS SENT IMMEDIATELY. IF THE DATA IS TO BE RECOVERED, THE OTHER ELEMENT RECOVERES THE DATA, REQUESTS THE INTERCONNECTION CHECKOUT AND, WHEN GETTING IT, TRANSMITS THE DATA OVER THE INTERCONNECTION WITH IDENTIFICATION OF THE FIRST ELEMENT. IT THEN RECOVERES THE DATA FROM THE INTERCONNECTION WHEN IT RECOGNIZES ITS OWN IDENTIFICATION. IF THE OTHER ITEM IS A MEMORY ITEM, IT ALSO CONTAINS A STORAGE FILE FOR STORING COMMANDS AND DATA IF IT IS ALREADY RESPONDING TO ANOTHER ITEM'S COMMAND. C. APPLICATIONS IN THE FIELD OF COMPUTING.

FR7830346A 1977-10-25 1978-10-25 COMMON LINE FOR DATA PROCESSING SYSTEM WITH SEQUENCE OVERLAP Expired FR2407523B1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US84541577A 1977-10-25 1977-10-25

Publications (2)

Publication Number Publication Date
FR2407523A1 true FR2407523A1 (en) 1979-05-25
FR2407523B1 FR2407523B1 (en) 1988-05-13

Family

ID=25295188

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7830346A Expired FR2407523B1 (en) 1977-10-25 1978-10-25 COMMON LINE FOR DATA PROCESSING SYSTEM WITH SEQUENCE OVERLAP

Country Status (8)

Country Link
JP (1) JPS5484939A (en)
AU (1) AU520317B2 (en)
CA (1) CA1117664A (en)
DE (1) DE2846487A1 (en)
ES (1) ES474428A1 (en)
FR (1) FR2407523B1 (en)
GB (1) GB2007890B (en)
IT (1) IT1192335B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0062667A1 (en) * 1980-10-20 1982-10-20 Digital Equipment Corp Improved system for interrupt arbitration.
EP0159941A2 (en) * 1984-04-10 1985-10-30 Telemecanique Serial interconnecting bus for a data processing system, and method for information exchange

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5833770A (en) * 1981-08-24 1983-02-28 Sony Corp Program transfer method for digital data
US4827409A (en) * 1986-07-24 1989-05-02 Digital Equipment Corporation High speed interconnect unit for digital data processing system
GB2273376B (en) * 1992-12-11 1997-03-12 Sony Corp Data processing

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3710324A (en) * 1970-04-01 1973-01-09 Digital Equipment Corp Data processing system
US3815099A (en) * 1970-04-01 1974-06-04 Digital Equipment Corp Data processing system
DE2259223A1 (en) * 1972-12-04 1974-06-27 Licentia Gmbh CIRCUIT ARRANGEMENT TO CONNECT A MORE NUMBER OF BINARY INFORMATION SUBMITTING DEVICES THAN RECORDING DEVICES
US3916108A (en) * 1973-11-09 1975-10-28 Multiplex Communicat Inc Tdm communication system with centralized time slot address distribution
US3997896A (en) * 1975-06-30 1976-12-14 Honeywell Information Systems, Inc. Data processing system providing split bus cycle operation

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3614741A (en) * 1970-03-23 1971-10-19 Digital Equipment Corp Data processing system with instruction addresses identifying one of a plurality of registers including the program counter
US3614740A (en) * 1970-03-23 1971-10-19 Digital Equipment Corp Data processing system with circuits for transferring between operating routines, interruption routines and subroutines
US3999163A (en) * 1974-01-10 1976-12-21 Digital Equipment Corporation Secondary storage facility for data processing systems
SU1274634A3 (en) * 1975-06-30 1986-11-30 Ханивелл Информейшн Системз Инк (Фирма) Device for priority connection of information source to common main line
US3983540A (en) * 1975-09-08 1976-09-28 Honeywell Inc. Rapid bus priority resolution

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3710324A (en) * 1970-04-01 1973-01-09 Digital Equipment Corp Data processing system
US3815099A (en) * 1970-04-01 1974-06-04 Digital Equipment Corp Data processing system
DE2259223A1 (en) * 1972-12-04 1974-06-27 Licentia Gmbh CIRCUIT ARRANGEMENT TO CONNECT A MORE NUMBER OF BINARY INFORMATION SUBMITTING DEVICES THAN RECORDING DEVICES
US3916108A (en) * 1973-11-09 1975-10-28 Multiplex Communicat Inc Tdm communication system with centralized time slot address distribution
US3997896A (en) * 1975-06-30 1976-12-14 Honeywell Information Systems, Inc. Data processing system providing split bus cycle operation

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0062667A1 (en) * 1980-10-20 1982-10-20 Digital Equipment Corp Improved system for interrupt arbitration.
EP0062667A4 (en) * 1980-10-20 1984-11-22 Digital Equipment Corp Improved system for interrupt arbitration.
EP0159941A2 (en) * 1984-04-10 1985-10-30 Telemecanique Serial interconnecting bus for a data processing system, and method for information exchange
EP0159941A3 (en) * 1984-04-10 1987-12-02 La Telemecanique Electrique Serial interconnecting bus for a data processing system, and method for information exchange

Also Published As

Publication number Publication date
AU4103778A (en) 1980-05-08
FR2407523B1 (en) 1988-05-13
CA1117664A (en) 1982-02-02
JPS5484939A (en) 1979-07-06
IT1192335B (en) 1988-03-31
ES474428A1 (en) 1979-04-16
GB2007890A (en) 1979-05-23
DE2846487A1 (en) 1979-04-26
IT7869443A0 (en) 1978-10-24
GB2007890B (en) 1982-07-14
AU520317B2 (en) 1982-01-28
JPS616424B2 (en) 1986-02-26

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Legal Events

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ST Notification of lapse