FR2397677A1 - Dispositif d'execution d'operations de calcul en virgule flottante, par memorisation multiple - Google Patents

Dispositif d'execution d'operations de calcul en virgule flottante, par memorisation multiple

Info

Publication number
FR2397677A1
FR2397677A1 FR7820915A FR7820915A FR2397677A1 FR 2397677 A1 FR2397677 A1 FR 2397677A1 FR 7820915 A FR7820915 A FR 7820915A FR 7820915 A FR7820915 A FR 7820915A FR 2397677 A1 FR2397677 A1 FR 2397677A1
Authority
FR
France
Prior art keywords
digits
multiplier
partial product
multiplicand
submultiple
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7820915A
Other languages
English (en)
Other versions
FR2397677B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull HN Information Systems Italia SpA
Bull HN Information Systems Inc
Original Assignee
Honeywell Information Systems Italia SpA
Honeywell Information Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Information Systems Italia SpA, Honeywell Information Systems Inc filed Critical Honeywell Information Systems Italia SpA
Publication of FR2397677A1 publication Critical patent/FR2397677A1/fr
Application granted granted Critical
Publication of FR2397677B1 publication Critical patent/FR2397677B1/fr
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52Multiplying; Dividing
    • G06F7/523Multiplying only
    • G06F7/533Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even
    • G06F7/5334Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even by using multiple bit scanning, i.e. by decoding groups of successive multiplier bits in order to select an appropriate precalculated multiple of the multiplicand as a partial product
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/483Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
    • G06F7/487Multiplying; Dividing
    • G06F7/4876Multiplying
    • FMECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F02COMBUSTION ENGINES; HOT-GAS OR COMBUSTION-PRODUCT ENGINE PLANTS
    • F02BINTERNAL-COMBUSTION PISTON ENGINES; COMBUSTION ENGINES IN GENERAL
    • F02B75/00Other engines
    • F02B75/02Engines characterised by their cycles, e.g. six-stroke
    • F02B2075/022Engines characterised by their cycles, e.g. six-stroke having less than six strokes per cycle
    • F02B2075/027Engines characterised by their cycles, e.g. six-stroke having less than six strokes per cycle four
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804Details
    • G06F2207/3808Details concerning the type of numbers or the way they are handled
    • G06F2207/3832Less usual number representations
    • G06F2207/384Octal
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804Details
    • G06F2207/3808Details concerning the type of numbers or the way they are handled
    • G06F2207/3832Less usual number representations
    • G06F2207/3844Hexadecimal
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804Details
    • G06F2207/386Special constructional features
    • G06F2207/3896Bit slicing

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Nonlinear Science (AREA)
  • Complex Calculations (AREA)

Abstract

Dispositif d'exécution d'opérations de calcul en virgule flottante pour effectuer des multiplications sur des nombres codés en binaire. Ce dispositif permet de multiplier un multiplicande par sélection de sous-multiples de ce multiplicande conformément aux bits d'un multiplicateur par des moyens comprenant des emplacements de mémoire à accés sélectif pour mémoriser un nombre prédéterminé de chiffres de sous-multiple différents pour avoir une relation prédéterminée avec les valeurs des bits dudit multiplicateur et un emplacement de mémoire pour mémoriser une valeur de produit partiel. La lecture de chiffres de sous-multiple différents pour avoir une relation prédéterminée avec les valeurs des bits dudit multiplicateur et un emplacement de mémoire pour mémoriser une valeur de produit partiel. La lecture de chiffres d'un sous-multiple en mémoire est réalisée par un circuit de sélection relié à des moyens de décalage de chiffres du multiplicateur. Un nouveau produit partiel à mémoriser est déterminé par une unité arithmétique et logique qui additionne le produit partiel dudit emplacement de mémoire aux chiffres d'un sous-multiple suivant dudit multiplicande. Application à l'utilisation de puces de microprocesseur en circuits intégrés.
FR7820915A 1977-07-15 1978-07-12 Dispositif d'execution d'operations de calcul en virgule flottante, par memorisation multiple Granted FR2397677A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/815,891 US4130879A (en) 1977-07-15 1977-07-15 Apparatus for performing floating point arithmetic operations using submultiple storage

Publications (2)

Publication Number Publication Date
FR2397677A1 true FR2397677A1 (fr) 1979-02-09
FR2397677B1 FR2397677B1 (fr) 1984-07-20

Family

ID=25219114

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7820915A Granted FR2397677A1 (fr) 1977-07-15 1978-07-12 Dispositif d'execution d'operations de calcul en virgule flottante, par memorisation multiple

Country Status (7)

Country Link
US (1) US4130879A (fr)
JP (1) JPS5829538B2 (fr)
AU (1) AU515091B2 (fr)
CA (1) CA1097818A (fr)
DE (1) DE2830334A1 (fr)
FR (1) FR2397677A1 (fr)
GB (1) GB2001189B (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3144015A1 (de) * 1981-11-05 1983-05-26 Ulrich Prof. Dr. 7500 Karlsruhe Kulisch "schaltungsanordnung und verfahren zur bildung von skalarprodukten und summen von gleitkommazahlen mit maximaler genauigkeit"

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4413326A (en) * 1978-10-18 1983-11-01 Honeywell Inc. Floating point division control
US4229801A (en) * 1978-12-11 1980-10-21 Data General Corporation Floating point processor having concurrent exponent/mantissa operation
US4276607A (en) * 1979-04-09 1981-06-30 Sperry Rand Corporation Multiplier circuit which detects and skips over trailing zeros
US4295202A (en) * 1979-11-09 1981-10-13 Honeywell Information Systems Inc. Hexadecimal digit shifter output control by a programmable read only memory
JPS5776634A (en) * 1980-10-31 1982-05-13 Hitachi Ltd Digital signal processor
US4594679A (en) * 1983-07-21 1986-06-10 International Business Machines Corporation High speed hardware multiplier for fixed floating point operands
DE3335424A1 (de) * 1983-09-29 1985-04-18 Siemens AG, 1000 Berlin und 8000 München Multiplikationswerk und verfahren zu dessen betrieb
FR2552903A1 (fr) * 1983-10-03 1985-04-05 Moulin Andre Multiplieur
NL8304186A (nl) * 1983-12-06 1985-07-01 Philips Nv Geintegreerde processor voor het verwerken van woordsgewijze ontvangbare informatie.
WO1986002181A1 (fr) * 1984-09-28 1986-04-10 Motorola, Inc. Processeur de signaux numeriques pour miltiplication/accumulation en un seul cycle
JPS61213927A (ja) * 1985-03-18 1986-09-22 Hitachi Ltd 浮動小数点演算処理装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3372269A (en) * 1961-06-30 1968-03-05 Ibm Multiplier for simultaneously generating partial products of various bits of the multiplier
FR2135570A1 (fr) * 1971-05-03 1972-12-22 Honeywell Inf Systems
US3871578A (en) * 1972-10-10 1975-03-18 Digital Equipment Corp Data processing system for multiplying and intergerizing floating point numbers
FR2336734A1 (fr) * 1975-12-22 1977-07-22 Hitachi Ltd Systeme de multiplication binaire a grande vitesse utilisant plusieurs circuits generateurs de multiples

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL225593A (fr) * 1957-03-07

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3372269A (en) * 1961-06-30 1968-03-05 Ibm Multiplier for simultaneously generating partial products of various bits of the multiplier
FR2135570A1 (fr) * 1971-05-03 1972-12-22 Honeywell Inf Systems
US3871578A (en) * 1972-10-10 1975-03-18 Digital Equipment Corp Data processing system for multiplying and intergerizing floating point numbers
FR2336734A1 (fr) * 1975-12-22 1977-07-22 Hitachi Ltd Systeme de multiplication binaire a grande vitesse utilisant plusieurs circuits generateurs de multiples

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3144015A1 (de) * 1981-11-05 1983-05-26 Ulrich Prof. Dr. 7500 Karlsruhe Kulisch "schaltungsanordnung und verfahren zur bildung von skalarprodukten und summen von gleitkommazahlen mit maximaler genauigkeit"

Also Published As

Publication number Publication date
GB2001189A (en) 1979-01-24
JPS5829538B2 (ja) 1983-06-23
DE2830334C2 (fr) 1988-02-25
CA1097818A (fr) 1981-03-17
AU3756278A (en) 1980-01-03
GB2001189B (en) 1982-07-07
AU515091B2 (en) 1981-03-12
US4130879A (en) 1978-12-19
FR2397677B1 (fr) 1984-07-20
JPS5421141A (en) 1979-02-17
DE2830334A1 (de) 1979-01-25

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