FR2354002A1 - Tableau logique programmable - Google Patents

Tableau logique programmable

Info

Publication number
FR2354002A1
FR2354002A1 FR7713446A FR7713446A FR2354002A1 FR 2354002 A1 FR2354002 A1 FR 2354002A1 FR 7713446 A FR7713446 A FR 7713446A FR 7713446 A FR7713446 A FR 7713446A FR 2354002 A1 FR2354002 A1 FR 2354002A1
Authority
FR
France
Prior art keywords
programmable logic
logic board
board
programmable
logic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7713446A
Other languages
English (en)
Other versions
FR2354002B1 (fr
Inventor
Robert R Williams
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of FR2354002A1 publication Critical patent/FR2354002A1/fr
Application granted granted Critical
Publication of FR2354002B1 publication Critical patent/FR2354002B1/fr
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H03K19/17708Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays
    • H03K19/17716Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays with synchronous operation, i.e. using clock signals, e.g. of I/O or coupling register

Landscapes

  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Logic Circuits (AREA)
FR7713446A 1976-06-01 1977-04-26 Tableau logique programmable Granted FR2354002A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/691,807 US4032894A (en) 1976-06-01 1976-06-01 Logic array with enhanced flexibility

Publications (2)

Publication Number Publication Date
FR2354002A1 true FR2354002A1 (fr) 1977-12-30
FR2354002B1 FR2354002B1 (fr) 1979-03-09

Family

ID=24778061

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7713446A Granted FR2354002A1 (fr) 1976-06-01 1977-04-26 Tableau logique programmable

Country Status (5)

Country Link
US (1) US4032894A (fr)
JP (1) JPS52147038A (fr)
DE (1) DE2723821C2 (fr)
FR (1) FR2354002A1 (fr)
GB (1) GB1516817A (fr)

Families Citing this family (41)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4311926A (en) * 1977-08-11 1982-01-19 Gte Laboratories Incorporated Emitter coupled logic programmable logic arrays
US4123669A (en) * 1977-09-08 1978-10-31 International Business Machines Corporation Logical OR circuit for programmed logic arrays
US4240094A (en) * 1978-03-20 1980-12-16 Harris Corporation Laser-configured logic array
DE2812241C2 (de) * 1978-03-21 1984-06-28 Robert Bosch Gmbh, 7000 Stuttgart Einrichtung zur Dateneingabe und Datenausgabe in bzw. aus einem Mikroprozessor
JPS54153563A (en) * 1978-05-24 1979-12-03 Nec Corp Logical array circuit
US4295064A (en) * 1978-06-30 1981-10-13 International Business Machines Corporation Logic and array logic driving circuits
US4415818A (en) * 1979-01-16 1983-11-15 Nippon Telegraph & Telephone Corp. Programmable sequential logic circuit devices
JPS562738A (en) * 1979-06-20 1981-01-13 Nec Corp Pla logical operation circuit
JPS57211832A (en) * 1981-06-24 1982-12-25 Hitachi Ltd Programmable logic array
US4429238A (en) * 1981-08-14 1984-01-31 Bell Telephone Laboratories, Incorporated Structured logic array
DE3215671C2 (de) * 1982-04-27 1984-05-03 Siemens AG, 1000 Berlin und 8000 München Programmierbare Logikanordnung
US4506341A (en) * 1982-06-10 1985-03-19 International Business Machines Corporation Interlaced programmable logic array having shared elements
US4717912A (en) * 1982-10-07 1988-01-05 Advanced Micro Devices, Inc. Apparatus for producing any one of a plurality of signals at a single output
US4661922A (en) * 1982-12-08 1987-04-28 American Telephone And Telegraph Company Programmed logic array with two-level control timing
US4488230A (en) * 1982-12-08 1984-12-11 At&T Bell Laboratories Programmed logic array with external signals introduced between its AND plane and its OR plane
US4488229A (en) * 1982-12-08 1984-12-11 At&T Bell Laboratories PLA-Based finite state machine with two-level control timing and same-cycle decision-making capability
US4547959A (en) * 1983-02-22 1985-10-22 General Motors Corporation Uses for buried contacts in integrated circuits
US4633572A (en) * 1983-02-22 1987-01-06 General Motors Corporation Programming power paths in an IC by combined depletion and enhancement implants
WO1985003161A1 (fr) * 1983-12-29 1985-07-18 Semi Processes, Inc. Circuit de reseau logique programmable
US4554640A (en) * 1984-01-30 1985-11-19 Monolithic Memories, Inc. Programmable array logic circuit with shared product terms
USRE34363E (en) * 1984-03-12 1993-08-31 Xilinx, Inc. Configurable electrical circuit having configurable logic elements and configurable interconnects
US4870302A (en) * 1984-03-12 1989-09-26 Xilinx, Inc. Configurable electrical circuit having configurable logic elements and configurable interconnects
US4727493A (en) * 1984-05-04 1988-02-23 Integrated Logic Systems, Inc. Integrated circuit architecture and fabrication method therefor
US4642487A (en) * 1984-09-26 1987-02-10 Xilinx, Inc. Special interconnect for configurable logic array
GB2202356B (en) * 1985-02-27 1989-10-11 Xilinx Inc Configurable combinational logic circuit
US4675556A (en) * 1986-06-09 1987-06-23 Intel Corporation Binomially-encoded finite state machine
JP2554475B2 (ja) * 1986-09-11 1996-11-13 株式会社リコー プログラマブル・ロジツク・デバイス
US5367208A (en) * 1986-09-19 1994-11-22 Actel Corporation Reconfigurable programmable interconnect architecture
US4983959A (en) * 1986-10-01 1991-01-08 Texas Instruments Incorporated Logic output macrocell
US4761570A (en) * 1987-02-12 1988-08-02 Harris Corporation Programmable logic device with programmable signal inhibition and inversion means
JPH0194722A (ja) * 1987-10-07 1989-04-13 Sharp Corp イオン注入によるプログラム可能論理素子
NL8902820A (nl) * 1989-11-15 1991-06-03 Philips Nv Geintegreerde halfgeleiderschakeling van het master slice type.
US5028821A (en) * 1990-03-01 1991-07-02 Plus Logic, Inc. Programmable logic device with programmable inverters at input/output pads
US5198705A (en) * 1990-05-11 1993-03-30 Actel Corporation Logic module with configurable combinational and sequential blocks
US5198809A (en) * 1991-02-22 1993-03-30 James L. Day Co. Inc. Hard wired programmable controller especially for heating ventilating and air conditioning (HVAC systems)
US5189320A (en) * 1991-09-23 1993-02-23 Atmel Corporation Programmable logic device with multiple shared logic arrays
US5250859A (en) * 1991-09-27 1993-10-05 Kaplinsky Cecil H Low power multifunction logic array
US5841295A (en) 1996-02-09 1998-11-24 Hewlett-Packard Company Hybrid programmable logic device
US5936426A (en) * 1997-02-03 1999-08-10 Actel Corporation Logic function module for field programmable array
US8438522B1 (en) 2008-09-24 2013-05-07 Iowa State University Research Foundation, Inc. Logic element architecture for generic logic chains in programmable devices
US8661394B1 (en) 2008-09-24 2014-02-25 Iowa State University Research Foundation, Inc. Depth-optimal mapping of logic chains in reconfigurable fabrics

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3566153A (en) * 1969-04-30 1971-02-23 Texas Instruments Inc Programmable sequential logic
US3818252A (en) * 1971-12-20 1974-06-18 Hitachi Ltd Universal logical integrated circuit
JPS4888837A (fr) * 1972-02-23 1973-11-21
US3936812A (en) * 1974-12-30 1976-02-03 Ibm Corporation Segmented parallel rail paths for input/output signals

Non-Patent Citations (8)

* Cited by examiner, † Cited by third party
Title
BRICKMAN ET AUTRES: "PROGRAMMABLE LOGIC ARRAY LOGIC ENHANCEMENT" PAGE 583 *
CAVALIERE ET AUTRES "CURRENT SWITCHER READ-ONLY PROGRAMMABLE LOGIC ARRAY", PAGES 3245 A 3248 *
GREENSPAN: "MULTIPLE PARTITIONED PROGRAMMABLE LOGIC ARRAY", PAGES 1780 ET 1781) *
HOWLEY & JONES: "PROGRAMMABLE LOGIC ARRAY DECODING TECHNIQUE" PAGE 2988 *
IBM TECHNICAL DISCLOSURE BULLETIN, VOLUME 17, NO. 10, MARS 1975, IBM CORP. NEW-YORK *
IBM TECHNICAL DISCLOSURE BULLETIN, VOLUME 18, NO. 10, MARS 1976, IBM CORP. NEW-YORK *
IBM TECHNICAL DISCLOSURE BULLETIN, VOLUME 19, NO. 2, JUILLET 1976, IBM CORP., NEW-YORK *
IBM TECHNICAL DISCLOSURE BULLETIN, VOLUME 19, NO. 5, OCTOBRE 1976, IBM CORP. NEW-YORK *

Also Published As

Publication number Publication date
FR2354002B1 (fr) 1979-03-09
DE2723821C2 (de) 1983-12-08
DE2723821A1 (de) 1977-12-15
US4032894A (en) 1977-06-28
GB1516817A (en) 1978-07-05
JPS52147038A (en) 1977-12-07

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