FR2328332A1 - Systeme de maitrise des erreurs et de mise en phases sur des circuits arq interconnectes - Google Patents

Systeme de maitrise des erreurs et de mise en phases sur des circuits arq interconnectes

Info

Publication number
FR2328332A1
FR2328332A1 FR7631162A FR7631162A FR2328332A1 FR 2328332 A1 FR2328332 A1 FR 2328332A1 FR 7631162 A FR7631162 A FR 7631162A FR 7631162 A FR7631162 A FR 7631162A FR 2328332 A1 FR2328332 A1 FR 2328332A1
Authority
FR
France
Prior art keywords
arq
interconnected
circuits
error control
phasing system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7631162A
Other languages
English (en)
French (fr)
Other versions
FR2328332B1 (enExample
Inventor
Hendrik Cornelis Anthon Duuren
Herman Da Silva
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nederlanden Staat
Original Assignee
Nederlanden Staat
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nederlanden Staat filed Critical Nederlanden Staat
Publication of FR2328332A1 publication Critical patent/FR2328332A1/fr
Application granted granted Critical
Publication of FR2328332B1 publication Critical patent/FR2328332B1/fr
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G—PHYSICS
    • G08—SIGNALLING
    • G08C—TRANSMISSION SYSTEMS FOR MEASURED VALUES, CONTROL OR SIMILAR SIGNALS
    • G08C25/00—Arrangements for preventing or correcting errors; Monitoring arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
    • H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
    • H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
    • H04L1/18—Automatic repetition systems, e.g. Van Duuren systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • General Engineering & Computer Science (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
FR7631162A 1975-10-17 1976-10-15 Systeme de maitrise des erreurs et de mise en phases sur des circuits arq interconnectes Granted FR2328332A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NLAANVRAGE7512209,A NL179777C (nl) 1975-10-17 1975-10-17 Transmissiestelsel met een transmissieweg die uit een aantal opeenvolgende arq-ketens is opgebouwd.

Publications (2)

Publication Number Publication Date
FR2328332A1 true FR2328332A1 (fr) 1977-05-13
FR2328332B1 FR2328332B1 (enExample) 1981-06-19

Family

ID=19824689

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7631162A Granted FR2328332A1 (fr) 1975-10-17 1976-10-15 Systeme de maitrise des erreurs et de mise en phases sur des circuits arq interconnectes

Country Status (9)

Country Link
US (1) US4092630A (enExample)
JP (1) JPS5249709A (enExample)
AU (1) AU499448B2 (enExample)
BE (1) BE847297A (enExample)
CH (1) CH612051A5 (enExample)
DE (1) DE2645929C3 (enExample)
FR (1) FR2328332A1 (enExample)
GB (1) GB1539589A (enExample)
NL (1) NL179777C (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5840943A (ja) * 1981-09-03 1983-03-10 Fujitsu Ltd 紛失デ−タの誤り回復方式
US4661980A (en) * 1982-06-25 1987-04-28 The United States Of America As Represented By The Secretary Of The Navy Intercept resistant data transmission system
GB2180127B (en) * 1985-09-04 1989-08-23 Philips Electronic Associated Method of data communication
US4862461A (en) * 1987-01-12 1989-08-29 International Business Machines Corp. Packet switch network protocol
JP2576780B2 (ja) * 1993-12-17 1997-01-29 日本電気株式会社 プロトコル終端方式
EP1910824A4 (en) 2005-05-31 2012-11-21 Labnow Inc METHOD AND COMPOSITIONS RELATED TO THE PREPARATION AND USE OF A WHITE BLOOD IMAGE
EP1899450A4 (en) * 2005-06-24 2010-03-24 Univ Texas SYSTEMS AND METHODS INCLUDING INCLUDED CASSETTES WITH DEFINITION SYSTEMS AND LIQUIDITY SUPPLY SYSTEMS

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2031960A5 (enExample) * 1969-02-14 1970-11-20 Labo Cent Telecommunicat
DE2246826B2 (de) * 1972-09-23 1974-08-08 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt System zur gesicherten blockweisen Übertragung von binär codierten Daten
US3956589A (en) * 1973-11-26 1976-05-11 Paradyne Corporation Data telecommunication system

Also Published As

Publication number Publication date
JPS5249709A (en) 1977-04-21
US4092630A (en) 1978-05-30
AU1874476A (en) 1978-04-20
NL179777C (nl) 1986-11-03
GB1539589A (en) 1979-01-31
BE847297A (nl) 1977-01-31
AU499448B2 (en) 1979-04-12
JPS5543659B2 (enExample) 1980-11-07
DE2645929C3 (de) 1978-10-26
NL179777B (nl) 1986-06-02
DE2645929A1 (de) 1977-04-21
CH612051A5 (enExample) 1979-06-29
FR2328332B1 (enExample) 1981-06-19
NL7512209A (nl) 1977-04-19
DE2645929B2 (de) 1978-02-16

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Legal Events

Date Code Title Description
ST Notification of lapse