FR2308983A1 - Systeme de traitement des donnees constitue de plusieurs systemes partiels - Google Patents

Systeme de traitement des donnees constitue de plusieurs systemes partiels

Info

Publication number
FR2308983A1
FR2308983A1 FR7611397A FR7611397A FR2308983A1 FR 2308983 A1 FR2308983 A1 FR 2308983A1 FR 7611397 A FR7611397 A FR 7611397A FR 7611397 A FR7611397 A FR 7611397A FR 2308983 A1 FR2308983 A1 FR 2308983A1
Authority
FR
France
Prior art keywords
data processing
processing system
system consists
several partial
partial systems
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7611397A
Other languages
English (en)
Other versions
FR2308983B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE19752517553 external-priority patent/DE2517553C3/de
Application filed by Siemens AG filed Critical Siemens AG
Publication of FR2308983A1 publication Critical patent/FR2308983A1/fr
Application granted granted Critical
Publication of FR2308983B1 publication Critical patent/FR2308983B1/fr
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/167Interprocessor communication using a common memory, e.g. mailbox
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • Dram (AREA)
  • Multi Processors (AREA)
  • Logic Circuits (AREA)
  • Information Transfer Systems (AREA)
  • Computer And Data Communications (AREA)
FR7611397A 1975-04-21 1976-04-16 Systeme de traitement des donnees constitue de plusieurs systemes partiels Granted FR2308983A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19752517553 DE2517553C3 (de) 1975-04-21 Datenverarbeitungssystem aus mehreren Teilsystemen

Publications (2)

Publication Number Publication Date
FR2308983A1 true FR2308983A1 (fr) 1976-11-19
FR2308983B1 FR2308983B1 (fr) 1978-05-12

Family

ID=5944546

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7611397A Granted FR2308983A1 (fr) 1975-04-21 1976-04-16 Systeme de traitement des donnees constitue de plusieurs systemes partiels

Country Status (12)

Country Link
US (1) US4133029A (fr)
JP (1) JPS51130133A (fr)
AT (1) AT346915B (fr)
AU (1) AU500780B2 (fr)
BE (1) BE840957A (fr)
CH (1) CH608902A5 (fr)
FR (1) FR2308983A1 (fr)
GB (1) GB1542136A (fr)
IT (1) IT1059164B (fr)
NL (1) NL7603797A (fr)
SE (1) SE405517B (fr)
ZA (1) ZA761804B (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4491907A (en) * 1980-12-15 1985-01-01 Texas Instruments Incorporated Plurality of processors sharing the memory, the arithmetic logic unit and control circuitry all on a single semiconductor chip
US5768623A (en) * 1995-09-19 1998-06-16 International Business Machines Corporation System and method for sharing multiple storage arrays by dedicating adapters as primary controller and secondary controller for arrays reside in different host computers
US10684797B2 (en) * 2018-08-31 2020-06-16 Micron Technology, Inc. Command-in-pipeline counter for a memory device

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3253262A (en) * 1960-12-30 1966-05-24 Bunker Ramo Data processing system
US3287705A (en) * 1963-03-07 1966-11-22 Rca Corp Computer system
US3302185A (en) * 1964-01-20 1967-01-31 Jr Andrew P Cox Flexible logic circuits for buffer memory
FR2094029A1 (fr) * 1970-06-04 1972-02-04 Siemens Ag
GB1268283A (en) * 1970-04-02 1972-03-29 Ibm Connect module

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3517174A (en) * 1965-11-16 1970-06-23 Ericsson Telefon Ab L M Method of localizing a fault in a system including at least two parallelly working computers
SE313849B (fr) * 1966-03-25 1969-08-25 Ericsson Telefon Ab L M
CH515557A (it) * 1969-06-21 1971-11-15 Olivetti & Co Spa Calcolatore elettronico
NL7007615A (fr) * 1970-05-27 1971-11-30
US3678467A (en) * 1970-10-20 1972-07-18 Bell Telephone Labor Inc Multiprocessor with cooperative program execution
US3676861A (en) * 1970-12-30 1972-07-11 Honeywell Inf Systems Multiple mask registers for servicing interrupts in a multiprocessor system
NL7202501A (fr) * 1972-02-25 1973-08-28
GB1422952A (en) * 1972-06-03 1976-01-28 Plessey Co Ltd Data processing system fault diagnostic arrangements
US3964056A (en) * 1974-04-08 1976-06-15 International Standard Electric Corporation System for transferring data between central units and controlled units

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3253262A (en) * 1960-12-30 1966-05-24 Bunker Ramo Data processing system
US3287705A (en) * 1963-03-07 1966-11-22 Rca Corp Computer system
US3302185A (en) * 1964-01-20 1967-01-31 Jr Andrew P Cox Flexible logic circuits for buffer memory
GB1268283A (en) * 1970-04-02 1972-03-29 Ibm Connect module
FR2094029A1 (fr) * 1970-06-04 1972-02-04 Siemens Ag

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
ARTICLE DE ERWIN ET MCKEVITT: "CHARACTERS-UNIVERSAL ARCHITECTURE FOR LSI") *
PUBLICATION US "PROCEEDINGS OF THE FALL JOINT COMPUTER CONFERENCE", A.F.I.P.S. CONFERENCES PROCEEDINGS, VOL. 35, 18-20 NOVEMBRE 1969, PAGES 69-79 *

Also Published As

Publication number Publication date
ATA150876A (de) 1978-04-15
DE2517553B2 (de) 1977-02-24
AU1241076A (en) 1977-09-29
SE405517B (sv) 1978-12-11
IT1059164B (it) 1982-05-31
JPS51130133A (en) 1976-11-12
SE7602904L (sv) 1976-10-22
AU500780B2 (en) 1979-05-31
CH608902A5 (fr) 1979-01-31
BE840957A (fr) 1976-10-21
NL7603797A (nl) 1976-10-25
GB1542136A (en) 1979-03-14
DE2517553A1 (de) 1976-11-04
ZA761804B (en) 1977-03-30
FR2308983B1 (fr) 1978-05-12
AT346915B (de) 1978-12-11
US4133029A (en) 1979-01-02

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Legal Events

Date Code Title Description
ST Notification of lapse