FR2294544B1 - - Google Patents

Info

Publication number
FR2294544B1
FR2294544B1 FR7441129A FR7441129A FR2294544B1 FR 2294544 B1 FR2294544 B1 FR 2294544B1 FR 7441129 A FR7441129 A FR 7441129A FR 7441129 A FR7441129 A FR 7441129A FR 2294544 B1 FR2294544 B1 FR 2294544B1
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR7441129A
Other versions
FR2294544A1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales SA
Original Assignee
Thomson CSF SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson CSF SA filed Critical Thomson CSF SA
Priority to FR7441129A priority Critical patent/FR2294544A1/fr
Priority to US05/638,037 priority patent/US4004341A/en
Priority to GB50716/75A priority patent/GB1530145A/en
Priority to DE2556038A priority patent/DE2556038C2/de
Priority to JP14904075A priority patent/JPS5718717B2/ja
Publication of FR2294544A1 publication Critical patent/FR2294544A1/fr
Application granted granted Critical
Publication of FR2294544B1 publication Critical patent/FR2294544B1/fr
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Drying Of Semiconductors (AREA)
  • Weting (AREA)
  • Electrodes Of Semiconductors (AREA)
FR7441129A 1974-12-13 1974-12-13 Procede de fabrication, en circuit integre, de transistors a effet de champ destines a fonctionner en tres haute frequence, et structure ou dispositifs obtenus Granted FR2294544A1 (fr)

Priority Applications (5)

Application Number Priority Date Filing Date Title
FR7441129A FR2294544A1 (fr) 1974-12-13 1974-12-13 Procede de fabrication, en circuit integre, de transistors a effet de champ destines a fonctionner en tres haute frequence, et structure ou dispositifs obtenus
US05/638,037 US4004341A (en) 1974-12-13 1975-12-05 Method of manufacturing field-effect transistors designed for operation at very high frequencies, using integrated techniques
GB50716/75A GB1530145A (en) 1974-12-13 1975-12-10 Method of manufacturing field-effect transistors designed for operation at very high frequencies using integrated techniques
DE2556038A DE2556038C2 (de) 1974-12-13 1975-12-12 Verfahren zur Herstellung von Feldeffekttransistoren mit Schottky-Gate für sehr hohe Frequenzen
JP14904075A JPS5718717B2 (fr) 1974-12-13 1975-12-13

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7441129A FR2294544A1 (fr) 1974-12-13 1974-12-13 Procede de fabrication, en circuit integre, de transistors a effet de champ destines a fonctionner en tres haute frequence, et structure ou dispositifs obtenus

Publications (2)

Publication Number Publication Date
FR2294544A1 FR2294544A1 (fr) 1976-07-09
FR2294544B1 true FR2294544B1 (fr) 1978-06-23

Family

ID=9146137

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7441129A Granted FR2294544A1 (fr) 1974-12-13 1974-12-13 Procede de fabrication, en circuit integre, de transistors a effet de champ destines a fonctionner en tres haute frequence, et structure ou dispositifs obtenus

Country Status (5)

Country Link
US (1) US4004341A (fr)
JP (1) JPS5718717B2 (fr)
DE (1) DE2556038C2 (fr)
FR (1) FR2294544A1 (fr)
GB (1) GB1530145A (fr)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4214966A (en) * 1979-03-20 1980-07-29 Bell Telephone Laboratories, Incorporated Process useful in the fabrication of articles with metallized surfaces
FR2461358A1 (fr) * 1979-07-06 1981-01-30 Thomson Csf Procede de realisation d'un transistor a effet de champ a grille auto-alignee, et transistor obtenu par ce procede
JPS5718324A (en) * 1980-07-07 1982-01-30 Mitsubishi Electric Corp Method of working
US4325181A (en) * 1980-12-17 1982-04-20 The United States Of America As Represented By The Secretary Of The Navy Simplified fabrication method for high-performance FET
US4453305A (en) * 1981-07-31 1984-06-12 The Secretary Of State For Defence In Her Britannic Majesty's Government Of The United Kingdom Of Great Britain And Northern Ireland Method for producing a MISFET
GB2133621B (en) * 1983-01-11 1987-02-04 Emi Ltd Junction field effect transistor
US4692998A (en) * 1985-01-12 1987-09-15 M/A-Com, Inc. Process for fabricating semiconductor components
US5006914A (en) * 1988-12-02 1991-04-09 Advanced Technology Materials, Inc. Single crystal semiconductor substrate articles and semiconductor devices comprising same
DE59010851D1 (de) * 1989-04-27 1998-11-12 Max Planck Gesellschaft Halbleiterstruktur mit einer 2D-Ladungsträgerschicht und Herstellungsverfahren
US5385865A (en) * 1990-04-26 1995-01-31 Max-Planck-Gesellschaft Zur Forderung Der Wissenschaften Method of generating active semiconductor structures by means of starting structures which have a 2D charge carrier layer parallel to the surface
US5185293A (en) * 1992-04-10 1993-02-09 Eastman Kodak Company Method of forming and aligning patterns in deposted overlaying on GaAs
US5585655A (en) * 1994-08-22 1996-12-17 Matsushita Electric Industrial Co., Ltd. Field-effect transistor and method of manufacturing the same
US6811853B1 (en) 2000-03-06 2004-11-02 Shipley Company, L.L.C. Single mask lithographic process for patterning multiple types of surface features
US6627096B2 (en) 2000-05-02 2003-09-30 Shipley Company, L.L.C. Single mask technique for making positive and negative micromachined features on a substrate

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3330696A (en) * 1967-07-11 Method of fabricating thin film capacitors
US3498833A (en) * 1966-07-08 1970-03-03 Fairchild Camera Instr Co Double masking technique for integrated circuit
US3574010A (en) * 1968-12-30 1971-04-06 Texas Instruments Inc Fabrication of metal insulator semiconductor field effect transistors
FR2104704B1 (fr) * 1970-08-07 1973-11-23 Thomson Csf
JPS4839178A (fr) * 1971-09-22 1973-06-08
FR2157740B1 (fr) * 1971-10-29 1976-10-29 Thomson Csf
JPS48100078A (fr) * 1972-03-29 1973-12-18
US3875656A (en) * 1973-07-25 1975-04-08 Motorola Inc Fabrication technique for high density integrated circuits

Also Published As

Publication number Publication date
US4004341A (en) 1977-01-25
JPS5185680A (fr) 1976-07-27
DE2556038A1 (de) 1976-06-16
DE2556038C2 (de) 1983-07-28
FR2294544A1 (fr) 1976-07-09
GB1530145A (en) 1978-10-25
JPS5718717B2 (fr) 1982-04-17

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Legal Events

Date Code Title Description
ST Notification of lapse