FR2272487A1 - - Google Patents
Info
- Publication number
- FR2272487A1 FR2272487A1 FR7431440A FR7431440A FR2272487A1 FR 2272487 A1 FR2272487 A1 FR 2272487A1 FR 7431440 A FR7431440 A FR 7431440A FR 7431440 A FR7431440 A FR 7431440A FR 2272487 A1 FR2272487 A1 FR 2272487A1
- Authority
- FR
- France
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0144—Manufacturing their gate insulating layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/043—Dual dielectric
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/085—Isolated-integrated
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US411857A US3900352A (en) | 1973-11-01 | 1973-11-01 | Isolated fixed and variable threshold field effect transistor fabrication technique |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| FR2272487A1 true FR2272487A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1975-12-19 |
Family
ID=23630595
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FR7431440A Withdrawn FR2272487A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1973-11-01 | 1974-09-11 |
Country Status (5)
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4131497A (en) * | 1977-07-12 | 1978-12-26 | International Business Machines Corporation | Method of manufacturing self-aligned semiconductor devices |
| US4135954A (en) * | 1977-07-12 | 1979-01-23 | International Business Machines Corporation | Method for fabricating self-aligned semiconductor devices utilizing selectively etchable masking layers |
| DE2832388C2 (de) * | 1978-07-24 | 1986-08-14 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Verfahren zum Herstellen von MNOS- und MOS-Transistoren in Silizium-Gate-Technologie auf einem Halbleitersubstrat |
| DE2921993A1 (de) * | 1979-05-30 | 1980-12-04 | Siemens Ag | Halbleiterspeicher |
| DE3137813A1 (de) * | 1981-09-23 | 1983-03-31 | Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt | Verfahren zum herstellen einer halbleiteranordnung |
| US5445994A (en) * | 1994-04-11 | 1995-08-29 | Micron Technology, Inc. | Method for forming custom planar metal bonding pad connectors for semiconductor dice |
| KR100208024B1 (ko) * | 1996-10-04 | 1999-07-15 | 윤종용 | 힐락 억제를 위한 tft의 알루미늄 게이트 구조 및 그 제조방법 |
| TW399322B (en) * | 1997-08-22 | 2000-07-21 | Tsmc Acer Semiconductor Mfg Co | The process and the structure of DRAM of mushroom shaped capacitor |
| US6110766A (en) * | 1997-09-29 | 2000-08-29 | Samsung Electronics Co., Ltd. | Methods of fabricating aluminum gates by implanting ions to form composite layers |
| KR100320796B1 (ko) * | 1999-12-29 | 2002-01-17 | 박종섭 | 게이트 유전체막이 적용되는 반도체 소자의 제조 방법 |
| DE102005048000B4 (de) * | 2005-10-06 | 2015-03-05 | Austriamicrosystems Ag | Verfahren zur Herstellung eines Transistors mit zuverlässiger Source-Dotierung |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3479237A (en) * | 1966-04-08 | 1969-11-18 | Bell Telephone Labor Inc | Etch masks on semiconductor surfaces |
| US3682724A (en) * | 1967-06-30 | 1972-08-08 | Texas Instruments Inc | Process for fabricating integrated circuit having matched complementary transistors |
| US3673679A (en) * | 1970-12-01 | 1972-07-04 | Texas Instruments Inc | Complementary insulated gate field effect devices |
-
1973
- 1973-11-01 US US411857A patent/US3900352A/en not_active Expired - Lifetime
-
1974
- 1974-09-11 FR FR7431440A patent/FR2272487A1/fr not_active Withdrawn
- 1974-10-04 JP JP49113969A patent/JPS5080779A/ja active Pending
- 1974-10-15 GB GB44716/74A patent/GB1481049A/en not_active Expired
- 1974-10-23 DE DE19742450230 patent/DE2450230A1/de active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| DE2450230A1 (de) | 1975-05-28 |
| JPS5080779A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1975-07-01 |
| US3900352A (en) | 1975-08-19 |
| GB1481049A (en) | 1977-07-27 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| ST | Notification of lapse |