FR2238297B1 - - Google Patents
Info
- Publication number
- FR2238297B1 FR2238297B1 FR7424849A FR7424849A FR2238297B1 FR 2238297 B1 FR2238297 B1 FR 2238297B1 FR 7424849 A FR7424849 A FR 7424849A FR 7424849 A FR7424849 A FR 7424849A FR 2238297 B1 FR2238297 B1 FR 2238297B1
- Authority
- FR
- France
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
- G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
- G11C16/0433—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and one or more separate select transistors
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
- G11C16/0441—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing multiple floating gate devices, e.g. separate read-and-write FAMOS transistors with connected floating gates
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
- H03K19/17708—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
- H03K19/17708—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays
- H03K19/17712—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays one of the matrices at least being reprogrammable
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K21/00—Details of pulse counters or frequency dividers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US00380388A US3849638A (en) | 1973-07-18 | 1973-07-18 | Segmented associative logic circuits |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2238297A1 FR2238297A1 (fr) | 1975-02-14 |
FR2238297B1 true FR2238297B1 (fr) | 1978-07-07 |
Family
ID=23500988
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7424849A Expired FR2238297B1 (fr) | 1973-07-18 | 1974-07-17 |
Country Status (6)
Country | Link |
---|---|
US (1) | US3849638A (fr) |
JP (1) | JPS583422B2 (fr) |
DE (1) | DE2434704C2 (fr) |
FR (1) | FR2238297B1 (fr) |
GB (1) | GB1477517A (fr) |
IT (1) | IT1017192B (fr) |
Families Citing this family (47)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3996560A (en) * | 1974-05-16 | 1976-12-07 | Case Western Reserve University | Sequencing unit |
US3990045A (en) * | 1974-06-24 | 1976-11-02 | International Business Machines Corporation | Array logic fabrication for use in pattern recognition equipments and the like |
US3975623A (en) * | 1974-12-30 | 1976-08-17 | Ibm Corporation | Logic array with multiple readout tables |
US3987287A (en) * | 1974-12-30 | 1976-10-19 | International Business Machines Corporation | High density logic array |
US3993919A (en) * | 1975-06-27 | 1976-11-23 | Ibm Corporation | Programmable latch and other circuits for logic arrays |
US4029970A (en) * | 1975-11-06 | 1977-06-14 | Ibm Corporation | Changeable decoder structure for a folded logic array |
US4025799A (en) * | 1975-11-06 | 1977-05-24 | Ibm Corporation | Decoder structure for a folded logic array |
GB1549642A (en) * | 1976-08-03 | 1979-08-08 | Nat Res Dev | Inverters and logic gates employing inverters |
JPS5327752U (fr) * | 1976-08-17 | 1978-03-09 | ||
JPS53130941A (en) * | 1977-04-20 | 1978-11-15 | Hitachi Ltd | Programmable logic circuit |
US4139907A (en) * | 1977-08-31 | 1979-02-13 | Bell Telephone Laboratories, Incorporated | Integrated read only memory |
US4293783A (en) * | 1978-11-01 | 1981-10-06 | Massachusetts Institute Of Technology | Storage/logic array |
BR8007774A (pt) * | 1979-11-28 | 1981-06-16 | Medtronic Inc | Aperfeicoamento em aparelho eletronico que proporciona estimula eletrico para um tecido vivo,processo de fabricar um marcapasso e aparelho eletronico digital |
USRE34363E (en) * | 1984-03-12 | 1993-08-31 | Xilinx, Inc. | Configurable electrical circuit having configurable logic elements and configurable interconnects |
US4870302A (en) * | 1984-03-12 | 1989-09-26 | Xilinx, Inc. | Configurable electrical circuit having configurable logic elements and configurable interconnects |
US4727493A (en) * | 1984-05-04 | 1988-02-23 | Integrated Logic Systems, Inc. | Integrated circuit architecture and fabrication method therefor |
US4761768A (en) * | 1985-03-04 | 1988-08-02 | Lattice Semiconductor Corporation | Programmable logic device |
US5451887A (en) * | 1986-09-19 | 1995-09-19 | Actel Corporation | Programmable logic module and architecture for field programmable gate array device |
US5187393A (en) * | 1986-09-19 | 1993-02-16 | Actel Corporation | Reconfigurable programmable interconnect architecture |
US5367208A (en) * | 1986-09-19 | 1994-11-22 | Actel Corporation | Reconfigurable programmable interconnect architecture |
US5172014A (en) * | 1986-09-19 | 1992-12-15 | Actel Corporation | Programmable interconnect architecture |
US5477165A (en) * | 1986-09-19 | 1995-12-19 | Actel Corporation | Programmable logic module and architecture for field programmable gate array device |
US4906870A (en) * | 1988-10-31 | 1990-03-06 | Atmel Corporation | Low power logic array device |
US4942319A (en) * | 1989-01-19 | 1990-07-17 | National Semiconductor Corp. | Multiple page programmable logic architecture |
US5021689A (en) * | 1989-01-19 | 1991-06-04 | National Semiconductor Corp. | Multiple page programmable logic architecture |
US5081375A (en) * | 1989-01-19 | 1992-01-14 | National Semiconductor Corp. | Method for operating a multiple page programmable logic device |
US5055712A (en) * | 1990-04-05 | 1991-10-08 | National Semiconductor Corp. | Register file with programmable control, decode and/or data manipulation |
US5198705A (en) * | 1990-05-11 | 1993-03-30 | Actel Corporation | Logic module with configurable combinational and sequential blocks |
US5235221A (en) * | 1992-04-08 | 1993-08-10 | Micron Technology, Inc. | Field programmable logic array with speed optimized architecture |
US5220215A (en) * | 1992-05-15 | 1993-06-15 | Micron Technology, Inc. | Field programmable logic array with two or planes |
US5384500A (en) * | 1992-05-15 | 1995-01-24 | Micron Semiconductor, Inc. | Programmable logic device macrocell with an exclusive feedback and an exclusive external input line for a combinatorial mode and accommodating two separate programmable or planes |
US5300830A (en) * | 1992-05-15 | 1994-04-05 | Micron Semiconductor, Inc. | Programmable logic device macrocell with an exclusive feedback and exclusive external input lines for registered and combinatorial modes using a dedicated product term for control |
US5287017A (en) * | 1992-05-15 | 1994-02-15 | Micron Technology, Inc. | Programmable logic device macrocell with two OR array inputs |
US5331227A (en) * | 1992-05-15 | 1994-07-19 | Micron Semiconductor, Inc. | Programmable logic device macrocell with an exclusive feedback line and an exclusive external input line |
US5298803A (en) * | 1992-07-15 | 1994-03-29 | Micron Semiconductor, Inc. | Programmable logic device having low power microcells with selectable registered and combinatorial output signals |
EP0780017A1 (fr) * | 1995-07-10 | 1997-06-25 | Xilinx, Inc. | Systeme comprenant un reseau de portes programmable par l'utilisateur et une memoire intelligente |
US5744980A (en) * | 1996-02-16 | 1998-04-28 | Actel Corporation | Flexible, high-performance static RAM architecture for field-programmable gate arrays |
US5936426A (en) * | 1997-02-03 | 1999-08-10 | Actel Corporation | Logic function module for field programmable array |
US6160419A (en) | 1997-11-03 | 2000-12-12 | Altera Corporation | Programmable logic architecture incorporating a content addressable embedded array block |
US6020759A (en) * | 1997-03-21 | 2000-02-01 | Altera Corporation | Programmable logic array device with random access memory configurable as product terms |
US6144573A (en) | 1998-06-26 | 2000-11-07 | Altera Corporation | Programmable logic devices with improved content addressable memory capabilities |
US6453382B1 (en) | 1998-11-05 | 2002-09-17 | Altera Corporation | Content addressable memory encoded outputs |
US6407576B1 (en) | 1999-03-04 | 2002-06-18 | Altera Corporation | Interconnection and input/output resources for programmable logic integrated circuit devices |
US7111110B1 (en) | 2002-12-10 | 2006-09-19 | Altera Corporation | Versatile RAM for programmable logic device |
US8320191B2 (en) | 2007-08-30 | 2012-11-27 | Infineon Technologies Ag | Memory cell arrangement, method for controlling a memory cell, memory array and electronic device |
US8438522B1 (en) | 2008-09-24 | 2013-05-07 | Iowa State University Research Foundation, Inc. | Logic element architecture for generic logic chains in programmable devices |
US8661394B1 (en) | 2008-09-24 | 2014-02-25 | Iowa State University Research Foundation, Inc. | Depth-optimal mapping of logic chains in reconfigurable fabrics |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3028088A (en) * | 1956-09-25 | 1962-04-03 | Ibm | Multipurpose logical operations |
GB1101851A (en) * | 1965-01-20 | 1968-01-31 | Ncr Co | Generalized logic circuitry |
US3584205A (en) * | 1968-10-14 | 1971-06-08 | Ibm | Binary arithmetic and logic manipulator |
US3566153A (en) * | 1969-04-30 | 1971-02-23 | Texas Instruments Inc | Programmable sequential logic |
DE2063119C3 (de) * | 1970-12-14 | 1979-02-15 | Elf Mineraloel Gmbh, 4000 Duesseldorf | Kontinuierliches Verfahren zur Herstellung von Blöcken aus flüssigem Bitumen und Vorrichtung zur Durchführung des Verfahrens |
US3805037A (en) * | 1972-02-22 | 1974-04-16 | J Ellison | N{40 th power galois linear gate |
US3731073A (en) * | 1972-04-05 | 1973-05-01 | Bell Telephone Labor Inc | Programmable switching array |
-
1973
- 1973-07-18 US US00380388A patent/US3849638A/en not_active Expired - Lifetime
-
1974
- 1974-07-16 IT IT25220/74A patent/IT1017192B/it active
- 1974-07-17 FR FR7424849A patent/FR2238297B1/fr not_active Expired
- 1974-07-18 GB GB3185974A patent/GB1477517A/en not_active Expired
- 1974-07-18 DE DE2434704A patent/DE2434704C2/de not_active Expired
- 1974-07-18 JP JP49082711A patent/JPS583422B2/ja not_active Expired
Also Published As
Publication number | Publication date |
---|---|
US3849638A (en) | 1974-11-19 |
FR2238297A1 (fr) | 1975-02-14 |
DE2434704A1 (de) | 1975-02-27 |
IT1017192B (it) | 1977-07-20 |
JPS583422B2 (ja) | 1983-01-21 |
DE2434704C2 (de) | 1985-08-14 |
JPS5043852A (fr) | 1975-04-19 |
GB1477517A (en) | 1977-06-22 |
Similar Documents
Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |