FR2151977A5 - - Google Patents

Info

Publication number
FR2151977A5
FR2151977A5 FR7230586A FR7230586A FR2151977A5 FR 2151977 A5 FR2151977 A5 FR 2151977A5 FR 7230586 A FR7230586 A FR 7230586A FR 7230586 A FR7230586 A FR 7230586A FR 2151977 A5 FR2151977 A5 FR 2151977A5
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR7230586A
Other languages
French (fr)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of FR2151977A5 publication Critical patent/FR2151977A5/fr
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50Adding; Subtracting
    • G06F7/505Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination
    • G06F7/5057Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination using table look-up; using programmable logic arrays
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C15/00Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
    • G11C15/04Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using semiconductor elements
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/48Indexing scheme relating to groups G06F7/48 - G06F7/575
    • G06F2207/4802Special implementations
    • G06F2207/4804Associative memory or processor

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Mathematical Optimization (AREA)
  • General Engineering & Computer Science (AREA)
  • Executing Machine-Instructions (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
FR7230586A 1971-09-10 1972-08-23 Expired FR2151977A5 (enExample)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB4223871 1971-09-10

Publications (1)

Publication Number Publication Date
FR2151977A5 true FR2151977A5 (enExample) 1973-04-20

Family

ID=10423492

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7230586A Expired FR2151977A5 (enExample) 1971-09-10 1972-08-23

Country Status (4)

Country Link
JP (1) JPS5526749B2 (enExample)
DE (1) DE2238687A1 (enExample)
FR (1) FR2151977A5 (enExample)
GB (1) GB1322657A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2413714A1 (fr) * 1978-01-03 1979-07-27 Ibm Additionneur a prevision des retenues en tableaux logiques programmables
FR2413713A1 (fr) * 1978-01-03 1979-07-27 Ibm Additionneur a prevision de report forme de tableaux logiques programmables

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4241414A (en) * 1979-01-03 1980-12-23 Burroughs Corporation Binary adder employing a plurality of levels of individually programmed PROMS
JPS5960617A (ja) * 1982-09-30 1984-04-06 Fujitsu Denso Ltd 共振形定電流回路

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2413714A1 (fr) * 1978-01-03 1979-07-27 Ibm Additionneur a prevision des retenues en tableaux logiques programmables
FR2413713A1 (fr) * 1978-01-03 1979-07-27 Ibm Additionneur a prevision de report forme de tableaux logiques programmables

Also Published As

Publication number Publication date
DE2238687A1 (de) 1973-03-22
JPS5526749B2 (enExample) 1980-07-15
GB1322657A (en) 1973-07-11
JPS4838038A (enExample) 1973-06-05

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Legal Events

Date Code Title Description
ST Notification of lapse