FR2098324B1 - - Google Patents
Info
- Publication number
- FR2098324B1 FR2098324B1 FR7125298A FR7125298A FR2098324B1 FR 2098324 B1 FR2098324 B1 FR 2098324B1 FR 7125298 A FR7125298 A FR 7125298A FR 7125298 A FR7125298 A FR 7125298A FR 2098324 B1 FR2098324 B1 FR 2098324B1
- Authority
- FR
- France
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/112—Constructional design considerations for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layers, e.g. by using channel stoppers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/32—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
- H01L21/76205—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
- H01L21/76213—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose
- H01L21/76216—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose introducing electrical active impurities in the local oxidation region for the sole purpose of creating channel stoppers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/40—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
- H10D84/401—Combinations of FETs or IGBTs with BJTs
- H10D84/403—Combinations of FETs or IGBTs with BJTs and with one or more of diodes, resistors or capacitors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/611—Combinations of BJTs and one or more of diodes, resistors or capacitors
- H10D84/613—Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
- H10D84/615—Combinations of vertical BJTs and one or more of resistors or capacitors
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
- Bipolar Transistors (AREA)
- Local Oxidation Of Silicon (AREA)
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NLAANVRAGE7010205,A NL169936C (nl) | 1970-07-10 | 1970-07-10 | Halfgeleiderinrichting omvattende een halfgeleiderlichaam met een althans ten dele in het halfgeleiderlichaam verzonken oxydepatroon. |
NL7010208A NL7010208A (enrdf_load_stackoverflow) | 1966-10-05 | 1970-07-10 | |
NLAANVRAGE7010204,A NL170902C (nl) | 1970-07-10 | 1970-07-10 | Halfgeleiderinrichting, in het bijzonder monolithische geintegreerde halfgeleiderschakeling. |
NL7013365.A NL159819B (nl) | 1970-09-10 | 1970-09-10 | Halfgeleiderinrichting met een halfgeleiderlichaam, bevat- tende een transistor, waarbij een in het halfgeleiderli- chaam verzonken patroon van isolerend materiaal, dat door plaatselijke oxydatie van het halfgeleiderlichaam gevormd is, aanwezig is. |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2098324A1 FR2098324A1 (enrdf_load_stackoverflow) | 1972-03-10 |
FR2098324B1 true FR2098324B1 (enrdf_load_stackoverflow) | 1976-05-28 |
Family
ID=27483782
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7125298A Expired FR2098324B1 (enrdf_load_stackoverflow) | 1970-07-10 | 1971-07-09 |
Country Status (6)
Country | Link |
---|---|
JP (1) | JPS5010101B1 (enrdf_load_stackoverflow) |
BE (1) | BE769734A (enrdf_load_stackoverflow) |
CA (1) | CA926029A (enrdf_load_stackoverflow) |
CH (1) | CH542517A (enrdf_load_stackoverflow) |
FR (1) | FR2098324B1 (enrdf_load_stackoverflow) |
SE (1) | SE368479B (enrdf_load_stackoverflow) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3648125A (en) * | 1971-02-02 | 1972-03-07 | Fairchild Camera Instr Co | Method of fabricating integrated circuits with oxidized isolation and the resulting structure |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3173101A (en) * | 1961-02-15 | 1965-03-09 | Westinghouse Electric Corp | Monolithic two stage unipolar-bipolar semiconductor amplifier device |
US3254277A (en) * | 1963-02-27 | 1966-05-31 | United Aircraft Corp | Integrated circuit with component defining groove |
FR1458860A (fr) * | 1964-12-24 | 1966-03-04 | Ibm | Dispositif à circuit intégré, utilisant une lamelle semi-conductrice pré-formée |
US3386865A (en) * | 1965-05-10 | 1968-06-04 | Ibm | Process of making planar semiconductor devices isolated by encapsulating oxide filled channels |
US3440498A (en) * | 1966-03-14 | 1969-04-22 | Nat Semiconductor Corp | Contacts for insulation isolated semiconductor integrated circuitry |
USRE34420E (en) * | 1986-06-19 | 1993-10-26 | Darling James P | Sports racquet |
-
1971
- 1971-07-07 CA CA117580A patent/CA926029A/en not_active Expired
- 1971-07-07 CH CH1001371A patent/CH542517A/de not_active IP Right Cessation
- 1971-07-07 SE SE08804/71A patent/SE368479B/xx unknown
- 1971-07-08 BE BE769734A patent/BE769734A/xx unknown
- 1971-07-09 FR FR7125298A patent/FR2098324B1/fr not_active Expired
- 1971-07-10 JP JP46050732A patent/JPS5010101B1/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
FR2098324A1 (enrdf_load_stackoverflow) | 1972-03-10 |
DE2133981A1 (de) | 1972-01-13 |
BE769734A (fr) | 1972-01-10 |
CA926029A (en) | 1973-05-08 |
SE368479B (enrdf_load_stackoverflow) | 1974-07-01 |
JPS5010101B1 (enrdf_load_stackoverflow) | 1975-04-18 |
CH542517A (de) | 1973-09-30 |
DE2133981B2 (de) | 1975-07-10 |