FR2081021B1 - - Google Patents
Info
- Publication number
- FR2081021B1 FR2081021B1 FR717103659A FR7103659A FR2081021B1 FR 2081021 B1 FR2081021 B1 FR 2081021B1 FR 717103659 A FR717103659 A FR 717103659A FR 7103659 A FR7103659 A FR 7103659A FR 2081021 B1 FR2081021 B1 FR 2081021B1
- Authority
- FR
- France
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
- H01L21/2251—Diffusion into or out of group IV semiconductors
- H01L21/2252—Diffusion into or out of group IV semiconductors using predeposition of impurities into the semiconductor surface, e.g. from a gaseous phase
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Bipolar Transistors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US1297770A | 1970-02-20 | 1970-02-20 |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2081021A1 FR2081021A1 (en) | 1971-11-26 |
FR2081021B1 true FR2081021B1 (en) | 1974-03-01 |
Family
ID=21757664
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR717103659A Expired FR2081021B1 (en) | 1970-02-20 | 1971-01-27 |
Country Status (4)
Country | Link |
---|---|
US (1) | US3676231A (en) |
JP (1) | JPS4840805B1 (en) |
DE (1) | DE2107991A1 (en) |
FR (1) | FR2081021B1 (en) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3959040A (en) * | 1971-09-01 | 1976-05-25 | Motorola, Inc. | Compound diffused regions for emitter-coupled logic circuits |
US4129090A (en) * | 1973-02-28 | 1978-12-12 | Hitachi, Ltd. | Apparatus for diffusion into semiconductor wafers |
US3966515A (en) * | 1974-05-17 | 1976-06-29 | Teledyne, Inc. | Method for manufacturing high voltage field-effect transistors |
DE2838928A1 (en) * | 1978-09-07 | 1980-03-20 | Ibm Deutschland | METHOD FOR DOPING SILICON BODIES WITH BOR |
US4234361A (en) * | 1979-07-05 | 1980-11-18 | Wisconsin Alumni Research Foundation | Process for producing an electrostatically deformable thin silicon membranes utilizing a two-stage diffusion step to form an etchant resistant layer |
US5494852A (en) * | 1993-07-28 | 1996-02-27 | Sony Electronics Inc. | High capacity semiconductor dopant deposition/oxidization process using a single furnace cycle |
DE19840866B4 (en) * | 1998-08-31 | 2005-02-03 | IHP GmbH - Innovations for High Performance Microelectronics/Institut für innovative Mikroelektronik | A method of doping the external base pads of Si-based single-polysilicon npn bipolar transistors |
DE102012025429A1 (en) * | 2012-12-21 | 2014-06-26 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Method for doping semiconductor substrates and doped semiconductor substrate |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1115140A (en) * | 1966-12-30 | 1968-05-29 | Standard Telephones Cables Ltd | Semiconductors |
US3542609A (en) * | 1967-11-22 | 1970-11-24 | Itt | Double depositions of bbr3 in silicon |
-
1970
- 1970-02-20 US US12977A patent/US3676231A/en not_active Expired - Lifetime
- 1970-12-24 JP JP45116919A patent/JPS4840805B1/ja active Pending
-
1971
- 1971-01-27 FR FR717103659A patent/FR2081021B1/fr not_active Expired
- 1971-02-19 DE DE19712107991 patent/DE2107991A1/en active Pending
Also Published As
Publication number | Publication date |
---|---|
DE2107991A1 (en) | 1971-08-26 |
JPS4840805B1 (en) | 1973-12-03 |
FR2081021A1 (en) | 1971-11-26 |
US3676231A (en) | 1972-07-11 |
Similar Documents
Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |