FR2016792A1 - - Google Patents
Info
- Publication number
- FR2016792A1 FR2016792A1 FR6923503A FR6923503A FR2016792A1 FR 2016792 A1 FR2016792 A1 FR 2016792A1 FR 6923503 A FR6923503 A FR 6923503A FR 6923503 A FR6923503 A FR 6923503A FR 2016792 A1 FR2016792 A1 FR 2016792A1
- Authority
- FR
- France
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/035—Diffusion through a layer
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/049—Equivalence and options
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/051—Etching
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/085—Isolated-integrated
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/135—Removal of substrate
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/162—Testing steps
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/977—Thinning or removal of substrate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Recrystallisation Techniques (AREA)
- Photovoltaic Devices (AREA)
- Led Devices (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB33042/68A GB1186340A (en) | 1968-07-11 | 1968-07-11 | Manufacture of Semiconductor Devices |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2016792A1 true FR2016792A1 (fr) | 1970-05-15 |
FR2016792B1 FR2016792B1 (fr) | 1974-06-14 |
Family
ID=10347742
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR696923503A Expired FR2016792B1 (fr) | 1968-07-11 | 1969-07-10 |
Country Status (4)
Country | Link |
---|---|
US (1) | US3647581A (fr) |
DE (1) | DE1931949A1 (fr) |
FR (1) | FR2016792B1 (fr) |
GB (1) | GB1186340A (fr) |
Families Citing this family (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3713922A (en) * | 1970-12-28 | 1973-01-30 | Bell Telephone Labor Inc | High resolution shadow masks and their preparation |
FR2217068B1 (fr) * | 1973-02-13 | 1978-10-20 | Labo Electronique Physique | |
NL7605234A (nl) * | 1976-05-17 | 1977-11-21 | Philips Nv | Werkwijze voor het vervaardigen van een halfge- leiderinrichting en halfgeleiderinrichting ver- vaardigd met behulp van de werkwijze. |
DE2752107A1 (de) * | 1976-11-22 | 1978-06-01 | Mitsubishi Monsanto Chem | Elektrolumineszenzelement und verfahren zu seiner herstellung |
US4118857A (en) * | 1977-01-12 | 1978-10-10 | The United States Of America As Represented By The Secretary Of The Army | Flipped method for characterization of epitaxial layers |
NL7710164A (nl) * | 1977-09-16 | 1979-03-20 | Philips Nv | Werkwijze ter behandeling van een eenkristal- lijn lichaam. |
US4649627A (en) * | 1984-06-28 | 1987-03-17 | International Business Machines Corporation | Method of fabricating silicon-on-insulator transistors with a shared element |
EP0213488A2 (fr) * | 1985-08-26 | 1987-03-11 | Itt Industries, Inc. | Procédé pour la fabrication de circuits intégrés monolithiques à micro-ondes en arséniure de gallium |
US4952446A (en) * | 1986-02-10 | 1990-08-28 | Cornell Research Foundation, Inc. | Ultra-thin semiconductor membranes |
US4946735A (en) * | 1986-02-10 | 1990-08-07 | Cornell Research Foundation, Inc. | Ultra-thin semiconductor membranes |
US5334281A (en) * | 1992-04-30 | 1994-08-02 | International Business Machines Corporation | Method of forming thin silicon mesas having uniform thickness |
US5234846A (en) * | 1992-04-30 | 1993-08-10 | International Business Machines Corporation | Method of making bipolar transistor with reduced topography |
US5258318A (en) * | 1992-05-15 | 1993-11-02 | International Business Machines Corporation | Method of forming a BiCMOS SOI wafer having thin and thick SOI regions of silicon |
US5399231A (en) * | 1993-10-18 | 1995-03-21 | Regents Of The University Of California | Method of forming crystalline silicon devices on glass |
US5674758A (en) * | 1995-06-06 | 1997-10-07 | Regents Of The University Of California | Silicon on insulator achieved using electrochemical etching |
US6649977B1 (en) | 1995-09-11 | 2003-11-18 | The Regents Of The University Of California | Silicon on insulator self-aligned transistors |
US6391744B1 (en) * | 1997-03-19 | 2002-05-21 | The United States Of America As Represented By The National Security Agency | Method of fabricating a non-SOI device on an SOI starting wafer and thinning the same |
US6500694B1 (en) * | 2000-03-22 | 2002-12-31 | Ziptronix, Inc. | Three dimensional device integration method and integrated device |
US6984571B1 (en) | 1999-10-01 | 2006-01-10 | Ziptronix, Inc. | Three dimensional device integration method and integrated device |
US6902987B1 (en) * | 2000-02-16 | 2005-06-07 | Ziptronix, Inc. | Method for low temperature bonding and bonded structure |
US6563133B1 (en) * | 2000-08-09 | 2003-05-13 | Ziptronix, Inc. | Method of epitaxial-like wafer bonding at low temperature and bonded structure |
AUPR174800A0 (en) | 2000-11-29 | 2000-12-21 | Australian National University, The | Semiconductor processing |
KR20040068928A (ko) * | 2001-11-29 | 2004-08-02 | 오리진 에너지 솔라 피티와이 리미티드 | 반도체 가공 방법 |
US7109092B2 (en) | 2003-05-19 | 2006-09-19 | Ziptronix, Inc. | Method of room temperature covalent bonding |
US20160109503A1 (en) * | 2014-10-15 | 2016-04-21 | Kabushiki Kaisha Toshiba | Jig, manufacturing method thereof and test method |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR1380350A (fr) * | 1963-01-31 | 1964-11-27 | Rca Corp | Dispositif semiconducteur épitaxial |
-
1968
- 1968-07-11 GB GB33042/68A patent/GB1186340A/en not_active Expired
-
1969
- 1969-06-11 US US832360A patent/US3647581A/en not_active Expired - Lifetime
- 1969-06-24 DE DE19691931949 patent/DE1931949A1/de active Pending
- 1969-07-10 FR FR696923503A patent/FR2016792B1/fr not_active Expired
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR1380350A (fr) * | 1963-01-31 | 1964-11-27 | Rca Corp | Dispositif semiconducteur épitaxial |
Non-Patent Citations (1)
Title |
---|
REVUE AMERICAINE : "ELECTRONICS", VOLUME 41, 2 SEPTEMBRE 1968, "GREAT BRITAIN THIN SLICES, PAGES 170-171.) * |
Also Published As
Publication number | Publication date |
---|---|
FR2016792B1 (fr) | 1974-06-14 |
GB1186340A (en) | 1970-04-02 |
US3647581A (en) | 1972-03-07 |
DE1931949A1 (de) | 1970-02-19 |
Similar Documents
Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |