FR1587572A - - Google Patents
Info
- Publication number
- FR1587572A FR1587572A FR171330A FR1587572DA FR1587572A FR 1587572 A FR1587572 A FR 1587572A FR 171330 A FR171330 A FR 171330A FR 1587572D A FR1587572D A FR 1587572DA FR 1587572 A FR1587572 A FR 1587572A
- Authority
- FR
- France
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
- G06F11/1679—Temporal synchronisation or re-synchronisation of redundant processing components at clock signal level
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/14—Time supervision arrangements, e.g. real time clock
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
- G06F13/423—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus with synchronous protocol
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
- G06F11/2097—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements maintaining the standby controller/processing unit updated
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Quality & Reliability (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Hardware Redundancy (AREA)
- Multi Processors (AREA)
- Manipulation Of Pulses (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR171330 | 1968-10-25 |
Publications (1)
Publication Number | Publication Date |
---|---|
FR1587572A true FR1587572A (fr) | 1970-03-20 |
Family
ID=8656110
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR171330A Expired FR1587572A (fr) | 1968-10-25 | 1968-10-25 |
Country Status (9)
Country | Link |
---|---|
US (1) | US3602900A (fr) |
JP (1) | JPS5028146B1 (fr) |
BE (1) | BE740663A (fr) |
CH (1) | CH520982A (fr) |
DE (1) | DE1952926B2 (fr) |
ES (1) | ES372849A1 (fr) |
FR (1) | FR1587572A (fr) |
GB (1) | GB1227711A (fr) |
NL (1) | NL6916119A (fr) |
Families Citing this family (33)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3810119A (en) * | 1971-05-04 | 1974-05-07 | Us Navy | Processor synchronization scheme |
US3962683A (en) * | 1971-08-31 | 1976-06-08 | Max Brown | CPU programmable control system |
CH556576A (de) * | 1973-03-28 | 1974-11-29 | Hasler Ag | Einrichtung zur synchronisierung dreier rechner. |
US3943494A (en) * | 1974-06-26 | 1976-03-09 | International Business Machines Corporation | Distributed execution processor |
US4041471A (en) * | 1975-04-14 | 1977-08-09 | Scientific Micro Systems, Inc. | Data processing system including a plurality of programmed machines and particularly including a supervisor machine and an object machine |
US4208724A (en) * | 1977-10-17 | 1980-06-17 | Sperry Corporation | System and method for clocking data between a remote unit and a local unit |
US4209840A (en) * | 1978-06-28 | 1980-06-24 | Honeywell Inc. | Data processing protocol system |
US4270168A (en) * | 1978-08-31 | 1981-05-26 | United Technologies Corporation | Selective disablement in fail-operational, fail-safe multi-computer control system |
DE2853546C2 (de) * | 1978-12-12 | 1982-02-25 | Ibm Deutschland Gmbh, 7000 Stuttgart | Prüfschaltung für mindestens zwei synchron arbeitende Taktgeber |
US4428044A (en) * | 1979-09-20 | 1984-01-24 | Bell Telephone Laboratories, Incorporated | Peripheral unit controller |
DE2938228C2 (de) * | 1979-09-21 | 1982-02-25 | Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt | Verfahren und Schaltung zur Synchronisation |
US4342083A (en) * | 1980-02-05 | 1982-07-27 | The Bendix Corporation | Communication system for a multiple-computer system |
US4392196A (en) * | 1980-08-11 | 1983-07-05 | Harris Corporation | Multi-processor time alignment control system |
US4403286A (en) * | 1981-03-06 | 1983-09-06 | International Business Machines Corporation | Balancing data-processing work loads |
US4531185A (en) * | 1983-08-31 | 1985-07-23 | International Business Machines Corporation | Centralized synchronization of clocks |
US4584643A (en) * | 1983-08-31 | 1986-04-22 | International Business Machines Corporation | Decentralized synchronization of clocks |
US4569017A (en) * | 1983-12-22 | 1986-02-04 | Gte Automatic Electric Incorporated | Duplex central processing unit synchronization circuit |
US4589066A (en) * | 1984-05-31 | 1986-05-13 | General Electric Company | Fault tolerant, frame synchronization for multiple processor systems |
US4757442A (en) * | 1985-06-17 | 1988-07-12 | Nec Corporation | Re-synchronization system using common memory bus to transfer restart data from non-faulty processor to failed processor |
JPS6227813A (ja) * | 1985-07-29 | 1987-02-05 | Hitachi Ltd | 位相同期方式 |
DE3537477A1 (de) * | 1985-10-22 | 1987-04-23 | Porsche Ag | Anordnung zur individuellen anpassung einer seriellen schnittstelle eines datenverarbeitenden systems an eine datenuebertragungsgeschwindigkeit eines kommunikationspartners |
US4703421A (en) * | 1986-01-03 | 1987-10-27 | Gte Communication Systems Corporation | Ready line synchronization circuit for use in a duplicated computer system |
CA2003338A1 (fr) * | 1987-11-09 | 1990-06-09 | Richard W. Cutts, Jr. | Synchronisation d'un ordinateur insensible aux defaillances a processeurs multiples |
AU616213B2 (en) * | 1987-11-09 | 1991-10-24 | Tandem Computers Incorporated | Method and apparatus for synchronizing a plurality of processors |
US5204952A (en) * | 1988-07-18 | 1993-04-20 | Northern Telecom Limited | Duplex processor arrangement for a switching system |
AU625293B2 (en) * | 1988-12-09 | 1992-07-09 | Tandem Computers Incorporated | Synchronization of fault-tolerant computer system having multiple processors |
US4965717A (en) * | 1988-12-09 | 1990-10-23 | Tandem Computers Incorporated | Multiple processor system having shared memory with private-write capability |
US4979191A (en) * | 1989-05-17 | 1990-12-18 | The Boeing Company | Autonomous N-modular redundant fault tolerant clock system |
US5295258A (en) * | 1989-12-22 | 1994-03-15 | Tandem Computers Incorporated | Fault-tolerant computer system with online recovery and reintegration of redundant components |
US5203004A (en) * | 1990-01-08 | 1993-04-13 | Tandem Computers Incorporated | Multi-board system having electronic keying and preventing power to improperly connected plug-in board with improperly configured diode connections |
WO1992003785A1 (fr) * | 1990-08-14 | 1992-03-05 | Siemens Aktiengesellschaft | Installation pour le controle des fonctions de modules de synchronisation externes dans un systeme a plusieurs ordinateurs |
US5835953A (en) * | 1994-10-13 | 1998-11-10 | Vinca Corporation | Backup system that takes a snapshot of the locations in a mass storage device that has been identified for updating prior to updating |
US5649152A (en) * | 1994-10-13 | 1997-07-15 | Vinca Corporation | Method and system for providing a static snapshot of data stored on a mass storage system |
-
1968
- 1968-10-25 FR FR171330A patent/FR1587572A/fr not_active Expired
-
1969
- 1969-10-03 US US863604A patent/US3602900A/en not_active Expired - Lifetime
- 1969-10-20 CH CH1561769A patent/CH520982A/fr not_active IP Right Cessation
- 1969-10-21 GB GB1227711D patent/GB1227711A/en not_active Expired
- 1969-10-21 DE DE1952926A patent/DE1952926B2/de active Pending
- 1969-10-23 BE BE740663D patent/BE740663A/xx unknown
- 1969-10-24 ES ES372849A patent/ES372849A1/es not_active Expired
- 1969-10-24 JP JP44085195A patent/JPS5028146B1/ja active Pending
- 1969-10-24 NL NL6916119A patent/NL6916119A/xx not_active Application Discontinuation
Also Published As
Publication number | Publication date |
---|---|
DE1952926A1 (de) | 1970-05-06 |
GB1227711A (fr) | 1971-04-07 |
BE740663A (fr) | 1970-04-23 |
JPS5028146B1 (fr) | 1975-09-12 |
DE1952926B2 (de) | 1975-12-04 |
CH520982A (fr) | 1972-03-31 |
ES372849A1 (es) | 1971-11-01 |
US3602900A (en) | 1971-08-31 |
NL6916119A (fr) | 1970-04-28 |
Similar Documents
Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |