FR1507796A - Procédé de fabrication et d'assemblage d'éléments de circuits plans - Google Patents

Procédé de fabrication et d'assemblage d'éléments de circuits plans

Info

Publication number
FR1507796A
FR1507796A FR8263A FR06008263A FR1507796A FR 1507796 A FR1507796 A FR 1507796A FR 8263 A FR8263 A FR 8263A FR 06008263 A FR06008263 A FR 06008263A FR 1507796 A FR1507796 A FR 1507796A
Authority
FR
France
Prior art keywords
assembly
manufacturing process
circuit elements
planar circuit
planar
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR8263A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of FR1507796A publication Critical patent/FR1507796A/fr
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76297—Dielectric isolation using EPIC techniques, i.e. epitaxial passivated integrated circuit
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/026—Deposition thru hole in mask
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/029—Differential crystal growth rates
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/043—Dual dielectric
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/049—Equivalence and options
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/05—Etch and refill
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/15—Silicon on sapphire SOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Led Devices (AREA)
FR8263A 1966-01-06 1967-01-05 Procédé de fabrication et d'assemblage d'éléments de circuits plans Expired FR1507796A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US51907566A 1966-01-06 1966-01-06

Publications (1)

Publication Number Publication Date
FR1507796A true FR1507796A (fr) 1967-12-29

Family

ID=24066704

Family Applications (1)

Application Number Title Priority Date Filing Date
FR8263A Expired FR1507796A (fr) 1966-01-06 1967-01-05 Procédé de fabrication et d'assemblage d'éléments de circuits plans

Country Status (4)

Country Link
US (1) US3433686A (fr)
DE (1) DE1640500A1 (fr)
FR (1) FR1507796A (fr)
GB (1) GB1154868A (fr)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3492174A (en) * 1966-03-19 1970-01-27 Sony Corp Method of making a semiconductor device
US3905037A (en) * 1966-12-30 1975-09-09 Texas Instruments Inc Integrated circuit components in insulated islands of integrated semiconductor materials in a single substrate
NL6705847A (fr) * 1967-04-26 1968-10-28
US3789276A (en) * 1968-07-15 1974-01-29 Texas Instruments Inc Multilayer microelectronic circuitry techniques
US3950479A (en) * 1969-04-02 1976-04-13 Siemens Aktiengesellschaft Method of producing hollow semiconductor bodies
US4368098A (en) * 1969-10-01 1983-01-11 Rockwell International Corporation Epitaxial composite and method of making
US4404265A (en) * 1969-10-01 1983-09-13 Rockwell International Corporation Epitaxial composite and method of making
US3664866A (en) * 1970-04-08 1972-05-23 North American Rockwell Composite, method for growth of ii{11 {14 vi{11 {0 compounds on substrates, and process for making composition for the compounds
US3658582A (en) * 1970-04-13 1972-04-25 North American Rockwell Composites, of iib-via binary film compounds on iia-viia binary compound substrate crystals and process therefor
US3737739A (en) * 1971-02-22 1973-06-05 Ibm Single crystal regions in dielectric substrate
US3935040A (en) * 1971-10-20 1976-01-27 Harris Corporation Process for forming monolithic semiconductor display
US4012243A (en) * 1971-11-12 1977-03-15 Motorola, Inc. Method of fabricating multicolor light displays utilizing etch and refill techniques
US3979237A (en) * 1972-04-24 1976-09-07 Harris Corporation Device isolation in integrated circuits
US3985590A (en) * 1973-06-13 1976-10-12 Harris Corporation Process for forming heteroepitaxial structure
US3984857A (en) * 1973-06-13 1976-10-05 Harris Corporation Heteroepitaxial displays
US4052251A (en) * 1976-03-02 1977-10-04 Rca Corporation Method of etching sapphire utilizing sulfur hexafluoride
EP0193830A3 (fr) * 1980-04-10 1986-10-01 Massachusetts Institute Of Technology Dispositif à cellules solaires comportant plusieurs cellules solaires constitutives
KR900001267B1 (ko) * 1983-11-30 1990-03-05 후지쓰 가부시끼가이샤 Soi형 반도체 장치의 제조방법
US4889832A (en) * 1987-12-23 1989-12-26 Texas Instruments Incorporated Method of fabricating an integrated circuit with metal interconnecting layers above and below active circuitry
US5064771A (en) * 1990-04-13 1991-11-12 Grumman Aerospace Corporation Method of forming crystal array
US5143862A (en) * 1990-11-29 1992-09-01 Texas Instruments Incorporated SOI wafer fabrication by selective epitaxial growth
US5625209A (en) * 1992-08-26 1997-04-29 Texas Instruments Incorporated Silicon based sensor apparatus
US8963285B2 (en) 2013-03-08 2015-02-24 Infineon Technologies Ag Semiconductor device and method of manufacturing thereof

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3150299A (en) * 1959-09-11 1964-09-22 Fairchild Camera Instr Co Semiconductor circuit complex having isolation means
US3316128A (en) * 1962-10-15 1967-04-25 Nippon Electric Co Semiconductor device
US3300832A (en) * 1963-06-28 1967-01-31 Rca Corp Method of making composite insulatorsemiconductor wafer
US3320485A (en) * 1964-03-30 1967-05-16 Trw Inc Dielectric isolation for monolithic circuit
US3312879A (en) * 1964-07-29 1967-04-04 North American Aviation Inc Semiconductor structure including opposite conductivity segments
US3383760A (en) * 1965-08-09 1968-05-21 Rca Corp Method of making semiconductor devices
US3332137A (en) * 1964-09-28 1967-07-25 Rca Corp Method of isolating chips of a wafer of semiconductor material
US3381182A (en) * 1964-10-19 1968-04-30 Philco Ford Corp Microcircuits having buried conductive layers
FR1483570A (fr) * 1965-06-23 1967-09-06
US3372070A (en) * 1965-07-30 1968-03-05 Bell Telephone Labor Inc Fabrication of semiconductor integrated devices with a pn junction running through the wafer
US3322581A (en) * 1965-10-24 1967-05-30 Texas Instruments Inc Fabrication of a metal base transistor

Also Published As

Publication number Publication date
GB1154868A (en) 1969-06-11
US3433686A (en) 1969-03-18
DE1640500A1 (de) 1970-08-27

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