FR1483563A - Method of making electrical connections by means of perforations - Google Patents

Method of making electrical connections by means of perforations

Info

Publication number
FR1483563A
FR1483563A FR7857A FR06007857A FR1483563A FR 1483563 A FR1483563 A FR 1483563A FR 7857 A FR7857 A FR 7857A FR 06007857 A FR06007857 A FR 06007857A FR 1483563 A FR1483563 A FR 1483563A
Authority
FR
France
Prior art keywords
perforations
electrical connections
making electrical
making
connections
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR7857A
Other languages
French (fr)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of FR1483563A publication Critical patent/FR1483563A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5384—Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4084—Through-connections; Vertical interconnect access [VIA] connections by deforming at least one of the conductive layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0286—Programmable, customizable or modifiable circuits
    • H05K1/0287—Programmable, customizable or modifiable circuits having an universal lay-out, e.g. pad or land grid patterns or mesh patterns
    • H05K1/0289—Programmable, customizable or modifiable circuits having an universal lay-out, e.g. pad or land grid patterns or mesh patterns having a matrix lay-out, i.e. having selectively interconnectable sets of X-conductors and Y-conductors in different planes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0393—Flexible materials
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0388—Other aspects of conductors
    • H05K2201/0394—Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/091—Locally and permanently deformed areas including dielectric material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09509—Blind vias, i.e. vias having one side closed
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09827—Tapered, e.g. tapered hole, via or groove
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01—Tools for processing; Objects used during processing
    • H05K2203/0195—Tool for a process not provided for in H05K3/00, e.g. tool for handling objects using suction, for deforming objects, for applying local pressure
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/0221—Perforating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1189—Pressing leads, bumps or a die through an insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/423—Plated through-holes or plated via connections characterised by electroplating method
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
    • Y10T29/49167—Manufacturing circuit on or in base by forming conductive walled aperture in base with deforming of conductive path

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
FR7857A 1965-06-16 1966-06-13 Method of making electrical connections by means of perforations Expired FR1483563A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US464467A US3346950A (en) 1965-06-16 1965-06-16 Method of making through-connections by controlled punctures

Publications (1)

Publication Number Publication Date
FR1483563A true FR1483563A (en) 1967-06-02

Family

ID=23844048

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7857A Expired FR1483563A (en) 1965-06-16 1966-06-13 Method of making electrical connections by means of perforations

Country Status (4)

Country Link
US (1) US3346950A (en)
DE (1) DE1640468B2 (en)
FR (1) FR1483563A (en)
GB (1) GB1077867A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2516311A1 (en) * 1981-11-06 1983-05-13 Thomson Csf BASE FOR MOUNTING A SEMICONDUCTOR PASTILLE ON THE EMBASE OF AN ENCAPSULATION CASE, AND METHOD OF MAKING SAME
EP0445759A1 (en) * 1990-03-07 1991-09-11 Fujitsu Limited Multilayer structures with layer interconnection
EP1335452A2 (en) * 2002-02-08 2003-08-13 W.C. Heraeus GmbH & Co. KG Device for bonding two metal structures
WO2004027866A2 (en) * 2002-09-23 2004-04-01 Johnson Controls Technology Company Method for creating a link in an integrated metal substrate

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3576407A (en) * 1966-03-14 1971-04-27 Morris Lavine Time control system and method for producing television, radio and video tape programs and for other uses
US3519959A (en) * 1966-03-24 1970-07-07 Burroughs Corp Integral electrical power distribution network and component mounting plane
BE757462A (en) * 1969-10-13 1971-03-16 Avery Products Corp IMPROVEMENTS IN THE PREPARATION OF MODEL CLICHES
US3628243A (en) * 1969-11-14 1971-12-21 Bell Telephone Labor Inc Fabrication of printed circuit
DE2347217A1 (en) * 1973-09-19 1975-03-27 Siemens Ag PROCESS FOR THROUGH CONTACTING A METAL-LAMINATED BASE MATERIAL FOR PRINTED CIRCUITS
FR2380686A1 (en) * 1977-02-15 1978-09-08 Lomerson Robert PROCESS FOR ESTABLISHING AN ELECTRICAL CONNECTION THROUGH A PLATE OF INSULATING MATERIAL
EP0109084B1 (en) * 1982-11-15 1987-06-10 Storno A/S A method of making a double-sided thick-film integrated circuit
NL8403755A (en) * 1984-12-11 1986-07-01 Philips Nv METHOD FOR MANUFACTURING A MULTI-LAYER PRINTED WIRING WITH SEW-THROUGH TRACKS IN DIFFERENT LAYERS AND MULTI-LAYER PRINTED WIRES MADE BY THE METHOD
US4635358A (en) * 1985-01-03 1987-01-13 E. I. Du Pont De Nemours And Company Method for forming electrically conductive paths through a dielectric layer
JPH0666549B2 (en) * 1988-08-31 1994-08-24 信越ポリマー株式会社 Method of manufacturing flexible substrate with through hole
US5189261A (en) * 1990-10-09 1993-02-23 Ibm Corporation Electrical and/or thermal interconnections and methods for obtaining such
US5205738A (en) * 1992-04-03 1993-04-27 International Business Machines Corporation High density connector system
CA2114792A1 (en) * 1992-06-15 1993-12-16 Walter Schmidt Process for producing subsequently conditionable contact points on circuit substrates and circuit substrates with such contact points
DE19522338B4 (en) * 1995-06-20 2006-12-07 Pac Tech-Packaging Technologies Gmbh Chip carrier assembly with a via
DE19531970A1 (en) * 1995-08-30 1997-03-06 Siemens Ag Method for producing a connection between at least two electrical conductors, one of which is arranged on a carrier substrate
EP0805614B1 (en) * 1995-11-17 2005-04-13 Kabushiki Kaisha Toshiba Multilayered wiring board, prefabricated material for multilayered wiring board, process of manufacturing multilayered wiring board, electronic parts package, and method for forming conductive pillar
JPH10313008A (en) * 1997-05-13 1998-11-24 Canon Inc Forming method of fine pattern and electric element having the same
GB2336161B (en) * 1998-04-06 2003-03-26 John Michael Lowe Method of providing conductive tracks on a printed circuit and apparatus for use in carrying out the method
US6939447B2 (en) 1998-04-06 2005-09-06 Tdao Limited Method of providing conductive tracks on a printed circuit and apparatus for use in carrying out the method
GB9828490D0 (en) * 1998-12-23 1999-02-17 Lucas Ind Plc Printed circuit device
US6954986B2 (en) * 2000-03-31 2005-10-18 Dyconex Ag Method for fabricating electrical connecting element
DE60130108T2 (en) * 2000-03-31 2008-08-07 Dyconex Ag METHOD FOR PRODUCING ELECTRICAL CONNECTING ELEMENTS AND CONNECTING ELEMENT
AU2001242204A1 (en) * 2000-03-31 2001-10-23 Dyconex Patente Ag Method and device for fabricating electrical connecting elements, and connectingelement
TWI400025B (en) * 2009-12-29 2013-06-21 Subtron Technology Co Ltd Circuit substrate and manufacturing method thereof

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2977672A (en) * 1958-12-12 1961-04-04 Gen Electric Method of making bonded wire circuit
US3264402A (en) * 1962-09-24 1966-08-02 North American Aviation Inc Multilayer printed-wiring boards
US3155809A (en) * 1964-04-21 1964-11-03 Digital Sensors Inc Means and techniques for making electrical connections

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2516311A1 (en) * 1981-11-06 1983-05-13 Thomson Csf BASE FOR MOUNTING A SEMICONDUCTOR PASTILLE ON THE EMBASE OF AN ENCAPSULATION CASE, AND METHOD OF MAKING SAME
EP0079265A1 (en) * 1981-11-06 1983-05-18 Thomson-Csf Method of producing a pedestal for mounting a semiconductor chip on the base of an encapsulating housing
EP0445759A1 (en) * 1990-03-07 1991-09-11 Fujitsu Limited Multilayer structures with layer interconnection
US5219639A (en) * 1990-03-07 1993-06-15 Fujitsu Limited Multilayer structure and its fabrication method
EP1335452A2 (en) * 2002-02-08 2003-08-13 W.C. Heraeus GmbH & Co. KG Device for bonding two metal structures
EP1335452A3 (en) * 2002-02-08 2007-05-02 W.C. Heraeus GmbH Device for bonding two metal structures
WO2004027866A2 (en) * 2002-09-23 2004-04-01 Johnson Controls Technology Company Method for creating a link in an integrated metal substrate
WO2004027866A3 (en) * 2002-09-23 2004-08-19 Johnson Controls Tech Co Method for creating a link in an integrated metal substrate

Also Published As

Publication number Publication date
GB1077867A (en) 1967-08-02
DE1640468A1 (en) 1970-08-20
DE1640468B2 (en) 1971-06-03
US3346950A (en) 1967-10-17

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