FR1482050A - Mémoire matricielle en circuits intégrés - Google Patents

Mémoire matricielle en circuits intégrés

Info

Publication number
FR1482050A
FR1482050A FR52421A FR52421A FR1482050A FR 1482050 A FR1482050 A FR 1482050A FR 52421 A FR52421 A FR 52421A FR 52421 A FR52421 A FR 52421A FR 1482050 A FR1482050 A FR 1482050A
Authority
FR
France
Prior art keywords
integrated circuits
matrix memory
matrix
memory
circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR52421A
Other languages
English (en)
Inventor
Therese Marie Leonie Cagnac
Alain Pierre Le Gall
Raphael Guy Yelloz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Laboratoire Central de Telecommunications SA
Original Assignee
Laboratoire Central de Telecommunications SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Laboratoire Central de Telecommunications SA filed Critical Laboratoire Central de Telecommunications SA
Priority to FR52421A priority Critical patent/FR1482050A/fr
Priority to US619452A priority patent/US3546682A/en
Priority to CH316267A priority patent/CH465013A/fr
Priority to GB00178/67A priority patent/GB1182296A/en
Priority to NL6703613A priority patent/NL6703613A/xx
Application granted granted Critical
Publication of FR1482050A publication Critical patent/FR1482050A/fr
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/411—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
    • G11C11/4113—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access to base or collector of at least one of said transistors, e.g. via access diodes, access transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
    • G11C11/415—Address circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
    • G11C11/416—Read-write [R-W] circuits 

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
  • Read Only Memory (AREA)
FR52421A 1966-03-08 1966-03-08 Mémoire matricielle en circuits intégrés Expired FR1482050A (fr)

Priority Applications (5)

Application Number Priority Date Filing Date Title
FR52421A FR1482050A (fr) 1966-03-08 1966-03-08 Mémoire matricielle en circuits intégrés
US619452A US3546682A (en) 1966-03-08 1967-02-28 Memory using integrated circuits as unitary crosspoints
CH316267A CH465013A (fr) 1966-03-08 1967-03-03 Mémoire matricielle en circuits intégrés
GB00178/67A GB1182296A (en) 1966-03-08 1967-03-03 Electronic Memory.
NL6703613A NL6703613A (fr) 1966-03-08 1967-03-08

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR52421A FR1482050A (fr) 1966-03-08 1966-03-08 Mémoire matricielle en circuits intégrés

Publications (1)

Publication Number Publication Date
FR1482050A true FR1482050A (fr) 1967-05-26

Family

ID=8603141

Family Applications (1)

Application Number Title Priority Date Filing Date
FR52421A Expired FR1482050A (fr) 1966-03-08 1966-03-08 Mémoire matricielle en circuits intégrés

Country Status (5)

Country Link
US (1) US3546682A (fr)
CH (1) CH465013A (fr)
FR (1) FR1482050A (fr)
GB (1) GB1182296A (fr)
NL (1) NL6703613A (fr)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3818462A (en) * 1973-06-04 1974-06-18 Sprague Electric Co Noise immune i.c. memory cell
DE2430784B2 (de) * 1974-06-26 1977-02-10 Siemens AG, 1000 Berlin und 8000 München Bipolarer halbleiterspeicher
US4622475A (en) * 1984-03-05 1986-11-11 Tektronix, Inc. Data storage element having input and output ports isolated from regenerative circuit
EP0166043B1 (fr) * 1984-06-25 1990-09-19 International Business Machines Corporation Cellule de mémoire du type MTL avec capacité de multiplex inhérente

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3177373A (en) * 1960-10-28 1965-04-06 Richard H Graham Transistorized loading circuit
US3177374A (en) * 1961-03-10 1965-04-06 Philco Corp Binary data transfer circuit
US3417265A (en) * 1962-11-08 1968-12-17 Burroughs Corp Memory system
US3364362A (en) * 1963-10-07 1968-01-16 Bunker Ramo Memory selection system

Also Published As

Publication number Publication date
NL6703613A (fr) 1967-09-11
CH465013A (fr) 1968-11-15
GB1182296A (en) 1970-02-25
US3546682A (en) 1970-12-08

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