FR1246226A - Calculateur électronique - Google Patents
Calculateur électroniqueInfo
- Publication number
- FR1246226A FR1246226A FR800914A FR800914A FR1246226A FR 1246226 A FR1246226 A FR 1246226A FR 800914 A FR800914 A FR 800914A FR 800914 A FR800914 A FR 800914A FR 1246226 A FR1246226 A FR 1246226A
- Authority
- FR
- France
- Prior art keywords
- electronic calculator
- calculator
- electronic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/50—Adding; Subtracting
- G06F7/501—Half or full adders, i.e. basic adder cells for one denomination
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/52—Multiplying; Dividing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/52—Multiplying; Dividing
- G06F7/535—Dividing only
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/57—Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 – G06F7/556 or for performing logical operations
- G06F7/575—Basic arithmetic logic units, i.e. devices selectable to perform either addition, subtraction or one of several logical operations, using, at least partially, the same circuitry
Landscapes
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Analysis (AREA)
- Pure & Applied Mathematics (AREA)
- Computational Mathematics (AREA)
- Mathematical Optimization (AREA)
- General Engineering & Computer Science (AREA)
- Computing Systems (AREA)
- Quality & Reliability (AREA)
- Detection And Correction Of Errors (AREA)
- Complex Calculations (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US753342A US3036770A (en) | 1958-08-05 | 1958-08-05 | Error detecting system for a digital computer |
US156288A US3185822A (en) | 1958-08-05 | 1961-12-01 | Binary adder |
Publications (1)
Publication Number | Publication Date |
---|---|
FR1246226A true FR1246226A (fr) | 1960-11-18 |
Family
ID=26853035
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR800914A Expired FR1246226A (fr) | 1958-08-05 | 1959-07-23 | Calculateur électronique |
Country Status (4)
Country | Link |
---|---|
US (2) | US3036770A (fr) |
DE (1) | DE1099228B (fr) |
FR (1) | FR1246226A (fr) |
GB (2) | GB882751A (fr) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3249920A (en) * | 1960-06-30 | 1966-05-03 | Ibm | Program control element |
US3222652A (en) * | 1961-08-07 | 1965-12-07 | Ibm | Special-function data processing |
DE1240928B (de) * | 1962-01-09 | 1967-05-24 | Licentia Gmbh | Gleichstromgekoppelter elektronischer Binaerzaehler |
US3287546A (en) * | 1963-02-27 | 1966-11-22 | Ibm | Parity prediction apparatus for use with a binary adder |
US3424898A (en) * | 1965-11-08 | 1969-01-28 | Gen Electric | Binary subtracter for numerical control |
DE1524158B1 (de) * | 1966-06-03 | 1970-08-06 | Ibm | Addier-Subtrahier-Schaltung für kodierte Dezimalzahlen insbesondere solche in Byte-Darstellung |
DE1524268B1 (de) * | 1966-06-04 | 1970-07-02 | Zuse Kg | Anordnung zur Fehlerermittlung in Rechenwerken |
US3638003A (en) * | 1968-09-12 | 1972-01-25 | Heller & Co Walter E | Credit-accumulating arrangement |
GB1564799A (en) * | 1975-10-15 | 1980-04-16 | Dresser Ind | Liquid dispenser |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB705478A (en) * | 1949-01-17 | 1954-03-17 | Nat Res Dev | Electronic computing circuits |
USRE24447E (en) * | 1949-04-27 | 1958-03-25 | Diagnostic information monitoring | |
US2758787A (en) * | 1951-11-27 | 1956-08-14 | Bell Telephone Labor Inc | Serial binary digital multiplier |
BE542992A (fr) * | 1954-11-23 | |||
US2954164A (en) * | 1955-10-14 | 1960-09-27 | Ibm | Check digit monitoring and correcting circuits |
US2841740A (en) * | 1955-11-21 | 1958-07-01 | Ibm | Convertible storage systems |
US2957626A (en) * | 1955-11-21 | 1960-10-25 | Ibm | High-speed electronic calculator |
-
1958
- 1958-08-05 US US753342A patent/US3036770A/en not_active Expired - Lifetime
-
1959
- 1959-07-23 FR FR800914A patent/FR1246226A/fr not_active Expired
- 1959-08-03 DE DEI16813A patent/DE1099228B/de active Pending
- 1959-08-05 GB GB26810/59A patent/GB882751A/en not_active Expired
-
1961
- 1961-12-01 US US156288A patent/US3185822A/en not_active Expired - Lifetime
-
1962
- 1962-11-27 GB GB44813/62A patent/GB988895A/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
GB988895A (en) | 1965-04-14 |
GB882751A (en) | 1961-11-22 |
US3036770A (en) | 1962-05-29 |
US3185822A (en) | 1965-05-25 |
DE1099228B (de) | 1961-02-09 |
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