FR1233224A - Perfectionnement aux circuits additionneurs ou soustracteurs de machines à calculer électroniques - Google Patents

Perfectionnement aux circuits additionneurs ou soustracteurs de machines à calculer électroniques

Info

Publication number
FR1233224A
FR1233224A FR800463A FR800463A FR1233224A FR 1233224 A FR1233224 A FR 1233224A FR 800463 A FR800463 A FR 800463A FR 800463 A FR800463 A FR 800463A FR 1233224 A FR1233224 A FR 1233224A
Authority
FR
France
Prior art keywords
improvement
calculating machines
electronic calculating
subtracting circuits
subtracting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR800463A
Other languages
English (en)
French (fr)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NAT RES DEV
National Research Development Corp UK
Original Assignee
NAT RES DEV
National Research Development Corp UK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NAT RES DEV, National Research Development Corp UK filed Critical NAT RES DEV
Application granted granted Critical
Publication of FR1233224A publication Critical patent/FR1233224A/fr
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50—Adding; Subtracting
    • G06F7/501—Half or full adders, i.e. basic adder cells for one denomination
    • G06F7/503—Half or full adders, i.e. basic adder cells for one denomination using carry switching, i.e. the incoming carry being connected directly, or only via an inverter, to the carry output under control of a carry propagate signal

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Mathematical Optimization (AREA)
  • General Engineering & Computer Science (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
FR800463A 1958-07-18 1959-07-18 Perfectionnement aux circuits additionneurs ou soustracteurs de machines à calculer électroniques Expired FR1233224A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB23107/58A GB897425A (en) 1958-07-18 1958-07-18 Improvements in or relating to adding/subtracting circuits for digital electronic computers

Publications (1)

Publication Number Publication Date
FR1233224A true FR1233224A (fr) 1960-10-12

Family

ID=10190219

Family Applications (1)

Application Number Title Priority Date Filing Date
FR800463A Expired FR1233224A (fr) 1958-07-18 1959-07-18 Perfectionnement aux circuits additionneurs ou soustracteurs de machines à calculer électroniques

Country Status (6)

Country Link
US (1) US3053452A (enExample)
DE (1) DE1147782B (enExample)
FR (1) FR1233224A (enExample)
GB (1) GB897425A (enExample)
NL (1) NL241126A (enExample)
SE (1) SE219466C1 (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3278735A (en) * 1963-06-20 1966-10-11 Westinghouse Electric Corp Carry restoring circuitry
US3906211A (en) * 1974-05-23 1975-09-16 Bell Telephone Labor Inc Three-word adder carry propagation
DE3035631A1 (de) * 1980-09-20 1982-05-06 Deutsche Itt Industries Gmbh, 7800 Freiburg Binaerer mos-paralleladdierer

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE846319C (de) * 1950-05-17 1952-08-11 Nat Res Dev Elektronische Zaehlschaltung

Also Published As

Publication number Publication date
SE219466C1 (enExample) 1968-03-12
NL241126A (enExample)
US3053452A (en) 1962-09-11
DE1147782B (de) 1963-04-25
GB897425A (en) 1962-05-30

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