FI934543A - Method and circuit arrangement for generating a higher hierarchical level signal in a synchronous digital communication system - Google Patents

Method and circuit arrangement for generating a higher hierarchical level signal in a synchronous digital communication system Download PDF

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Publication number
FI934543A
FI934543A FI934543A FI934543A FI934543A FI 934543 A FI934543 A FI 934543A FI 934543 A FI934543 A FI 934543A FI 934543 A FI934543 A FI 934543A FI 934543 A FI934543 A FI 934543A
Authority
FI
Finland
Prior art keywords
generating
communication system
level signal
circuit arrangement
digital communication
Prior art date
Application number
FI934543A
Other languages
Finnish (fi)
Swedish (sv)
Other versions
FI94699C (en
FI94699B (en
FI934543A0 (en
Inventor
Esa Viitanen
Vesa Kemppainen
Kari Sahlman
Toni Oksanen
Jari Patana
Original Assignee
Nokia Telecommunications Oy
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nokia Telecommunications Oy filed Critical Nokia Telecommunications Oy
Priority to FI934543A priority Critical patent/FI94699C/en
Publication of FI934543A0 publication Critical patent/FI934543A0/en
Priority to PCT/FI1994/000461 priority patent/WO1995010899A1/en
Priority to AU78152/94A priority patent/AU7815294A/en
Priority to DE4497673T priority patent/DE4497673T1/en
Priority to GB9607821A priority patent/GB2297228B/en
Publication of FI934543A publication Critical patent/FI934543A/en
Application granted granted Critical
Publication of FI94699B publication Critical patent/FI94699B/en
Publication of FI94699C publication Critical patent/FI94699C/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
    • H04J3/1605—Fixed allocated frame structures
    • H04J3/1611—Synchronous digital hierarchy [SDH] or SONET
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/04—Distributors combined with modulators or demodulators
    • H04J3/047—Distributors with transistors or integrated circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J2203/00—Aspects of optical multiplex systems other than those covered by H04J14/05 and H04J14/07
    • H04J2203/0001—Provisions for broadband connections in integrated services digital network using frames of the Optical Transport Network [OTN] or using synchronous transfer mode [STM], e.g. SONET, SDH
    • H04J2203/0089—Multiplexing, e.g. coding, scrambling, SONET

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Time-Division Multiplex Systems (AREA)
FI934543A 1993-10-14 1993-10-14 Method and circuit arrangement for generating a higher hierarchical level signal in a synchronous digital communication system FI94699C (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
FI934543A FI94699C (en) 1993-10-14 1993-10-14 Method and circuit arrangement for generating a higher hierarchical level signal in a synchronous digital communication system
PCT/FI1994/000461 WO1995010899A1 (en) 1993-10-14 1994-10-13 Forming a higher hierarchy level signal in a synchronous digital communication system
AU78152/94A AU7815294A (en) 1993-10-14 1994-10-13 Forming a higher hierarchy level signal in a synchronous digital communication system
DE4497673T DE4497673T1 (en) 1993-10-14 1994-10-13 Formation of a signal of a higher hierarchical level in a synchronous digital communication system
GB9607821A GB2297228B (en) 1993-10-14 1994-10-13 Forming a higher hierarchy level signal in a synchronous digital communication system

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FI934543 1993-10-14
FI934543A FI94699C (en) 1993-10-14 1993-10-14 Method and circuit arrangement for generating a higher hierarchical level signal in a synchronous digital communication system

Publications (4)

Publication Number Publication Date
FI934543A0 FI934543A0 (en) 1993-10-14
FI934543A true FI934543A (en) 1995-04-15
FI94699B FI94699B (en) 1995-06-30
FI94699C FI94699C (en) 1995-10-10

Family

ID=8538781

Family Applications (1)

Application Number Title Priority Date Filing Date
FI934543A FI94699C (en) 1993-10-14 1993-10-14 Method and circuit arrangement for generating a higher hierarchical level signal in a synchronous digital communication system

Country Status (5)

Country Link
AU (1) AU7815294A (en)
DE (1) DE4497673T1 (en)
FI (1) FI94699C (en)
GB (1) GB2297228B (en)
WO (1) WO1995010899A1 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5991308A (en) * 1995-08-25 1999-11-23 Terayon Communication Systems, Inc. Lower overhead method for data transmission using ATM and SCDMA over hybrid fiber coax cable plant
US5768269A (en) * 1995-08-25 1998-06-16 Terayon Corporation Apparatus and method for establishing frame synchronization in distributed digital data communication systems
US5793759A (en) * 1995-08-25 1998-08-11 Terayon Corporation Apparatus and method for digital data transmission over video cable using orthogonal cyclic codes
US5745837A (en) * 1995-08-25 1998-04-28 Terayon Corporation Apparatus and method for digital data transmission over a CATV system using an ATM transport protocol and SCDMA
US5805583A (en) * 1995-08-25 1998-09-08 Terayon Communication Systems Process for communicating multiple channels of digital data in distributed systems using synchronous code division multiple access

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4719624A (en) * 1986-05-16 1988-01-12 Bell Communications Research, Inc. Multilevel multiplexing
DE3819259A1 (en) * 1988-06-06 1989-12-07 Siemens Ag METHOD FOR INPUTING AND OUTPUTING SIGNALS IN OR FROM SUB AREAS OF THE ADDITIONAL SIGNALS OF TRANSPORT MODULES OF A SYNCHRONOUS DIGITAL SIGNAL HIERARCHY
DE3934248A1 (en) * 1989-10-13 1991-04-18 Standard Elektrik Lorenz Ag MULTIPLEXER AND DEMULTIPLEXER, ESPECIALLY FOR MESSAGE TRANSMISSION NETWORKS WITH A SYNCHRONOUS HIERARCHY OF DIGITAL SIGNALS
DE4238899A1 (en) * 1992-11-19 1994-05-26 Philips Patentverwaltung Transmission system of the synchronous digital hierarchy

Also Published As

Publication number Publication date
FI94699C (en) 1995-10-10
GB9607821D0 (en) 1996-06-19
WO1995010899A1 (en) 1995-04-20
AU7815294A (en) 1995-05-04
FI94699B (en) 1995-06-30
GB2297228A (en) 1996-07-24
GB2297228B (en) 1998-06-24
DE4497673T1 (en) 1996-11-14
FI934543A0 (en) 1993-10-14

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