GB2309841B - Circuit and method for generating a clock signal - Google Patents

Circuit and method for generating a clock signal

Info

Publication number
GB2309841B
GB2309841B GB9602043A GB9602043A GB2309841B GB 2309841 B GB2309841 B GB 2309841B GB 9602043 A GB9602043 A GB 9602043A GB 9602043 A GB9602043 A GB 9602043A GB 2309841 B GB2309841 B GB 2309841B
Authority
GB
United Kingdom
Prior art keywords
generating
circuit
clock signal
clock
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB9602043A
Other versions
GB2309841A (en
GB9602043D0 (en
Inventor
Heinz Bernhard Maeder
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Priority to GB9602043A priority Critical patent/GB2309841B/en
Publication of GB9602043D0 publication Critical patent/GB9602043D0/en
Publication of GB2309841A publication Critical patent/GB2309841A/en
Application granted granted Critical
Publication of GB2309841B publication Critical patent/GB2309841B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/099Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0991Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
    • H03L7/0992Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider comprising a counter or a frequency divider
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/04Synchronising
    • H04N5/12Devices in which the synchronising signals are only operative if a phase difference occurs between synchronising and synchronised scanning devices, e.g. flywheel synchronising
    • H04N5/126Devices in which the synchronising signals are only operative if a phase difference occurs between synchronising and synchronised scanning devices, e.g. flywheel synchronising whereby the synchronisation signal indirectly commands a frequency generator

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Synchronizing For Television (AREA)
GB9602043A 1996-02-01 1996-02-01 Circuit and method for generating a clock signal Expired - Fee Related GB2309841B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB9602043A GB2309841B (en) 1996-02-01 1996-02-01 Circuit and method for generating a clock signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB9602043A GB2309841B (en) 1996-02-01 1996-02-01 Circuit and method for generating a clock signal

Publications (3)

Publication Number Publication Date
GB9602043D0 GB9602043D0 (en) 1996-04-03
GB2309841A GB2309841A (en) 1997-08-06
GB2309841B true GB2309841B (en) 2000-05-10

Family

ID=10787951

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9602043A Expired - Fee Related GB2309841B (en) 1996-02-01 1996-02-01 Circuit and method for generating a clock signal

Country Status (1)

Country Link
GB (1) GB2309841B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1833239A1 (en) * 2006-03-08 2007-09-12 Micronas GmbH Method and switch to create a cell coupled beat
DE102006011126B4 (en) 2006-03-08 2008-01-03 Micronas Gmbh Method and circuit for the line-coupled generation of a clock

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4578705A (en) * 1983-03-26 1986-03-25 Itt Industries, Inc. Digital circuit for synchronizing a pulse train
US4684897A (en) * 1984-01-03 1987-08-04 Raytheon Company Frequency correction apparatus
US4757264A (en) * 1987-10-08 1988-07-12 American Telephone And Telegraph Company, At&T Bell Laboratories Sample clock signal generator circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4578705A (en) * 1983-03-26 1986-03-25 Itt Industries, Inc. Digital circuit for synchronizing a pulse train
US4684897A (en) * 1984-01-03 1987-08-04 Raytheon Company Frequency correction apparatus
US4757264A (en) * 1987-10-08 1988-07-12 American Telephone And Telegraph Company, At&T Bell Laboratories Sample clock signal generator circuit

Also Published As

Publication number Publication date
GB2309841A (en) 1997-08-06
GB9602043D0 (en) 1996-04-03

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20020201