FI91692B - Method for receiving a signal for a synchronous digital data transmission system - Google Patents

Description

5,91692

A method for receiving a signal used in a synchronous digital communication system

The invention relates to a method according to the preamble of appended claim 1 for receiving a signal used in a synchronous digital communication system.

10 The current digital transmission network is plesiochronous, which means that each 2 Mbit / s basic channelization system has its own clock, independent of other systems. As a result, it is not possible to locate 15 single 2 Mbit / s signals from the bitstream of the higher order system, but to separate the 2 Mbit / s signal, the higher level signal must be demultiplexed through each intermediate stage to the 2 Mbit / s level. Due to this, in particular, the construction of branched connections requiring multiple multiplexers and demultiplexers has been expensive. Another disadvantage of a plesiochronous transmission network is that devices from two different device manufacturers are often not compatible with each other.

Among other things, the above-mentioned shortcomings have led to the definition of a new synchronous digital hierarchy, SDH (Synchronous 2.5 Digital Hierarchy). The definition is made in * CCITT Recommendations G.707 ... G.709 and G.781 ... G.784.

The synchronous digital hierarchy is based on STM-N (Synchronous Transport Module) transport frames, which exist at several hierarchical levels N (N = 1, 4.16 ...). Existing PCM systems, such as 2, 8, and 32 Mbit / s systems, are multiplexed into a synchronous 155.520 Mbit / s frame at the lowest level (N = 1) of the SDH hierarchy, referred to above as STM-1. -frame. At higher levels of the hierarchy, bit rates are multiples of the lowest level. In principle, all nodes in a synchronous transmission network are synchronized 2,91692 to one clock. However, if some nodes lost connection to a common clock, it would lead to difficulties in connections between nodes. At reception, the phase of the frame must also be able to be easily determined. For the above-mentioned reasons, a pointer has been introduced in SDH communication, which is a number indicating the phase of the payload within a frame, i.e., the pointer points to the byte in the STM frame from which the payload begins.

Figure 1 illustrates the structure of the STM-N frame 10, and Figure 2 illustrates one STM-1 frame. The STM-N frame consists of a matrix of 9 rows and N times 270 columns so that there is one byte at the intersection of the column in each row. The first columns 1-3 and 5-9 of N x 9 comprise the section header SOH (Section 15 Overhead), and row 4 the AU pointer. The remainder of the frame structure is N times the 261 column length portion that includes the payload portion of the STM-N frame.

Figure 2 illustrates one STM-1 frame, the row of which is thus 270 bytes long as shown above. The payload part comprises one or more administration units AU (Administration Unit). In the example case of the figure, the payload part consists of an AU-4 unit, in which a virtual container VC-4 (Virtual Container) is placed, respectively. (Alternatively, the transmission frame STM-1 may contain three AU-3 units, each of which is housed in a corresponding virtual container VC-3). The VC-4, in turn, consists of a one-byte (9 bytes in total) path header (PathOverhead) at the beginning of each line and a payload section, the lower level frames 30 of which also contain bytes that allow interface equalization when mapping the speed of the mapped information signal. . (The mapping of an information signal to a transmission frame STM-1 is described, for example, in patent applications A-B-34689/89 and FI-914746.) I! 91692 3

Each byte in the AU-4 unit has its own slot number. The above-mentioned AU pointer contains the location of the first byte of the VC-4 container in the AU-4 unit. Pointers can be used to perform 5 positive or negative pointer alignments at different points in the SDH network. If a virtual container with a higher clock frequency than the recent one is imported from outside the network node operating at a certain clock frequency, the data buffer will be filled. In this case, a negative equalization must be performed: one byte from the received VC container is transferred to the header state side of the frame to be transmitted and the value of the pointer is correspondingly reduced by one. On the other hand, if the received VC container has a lower speed than the node clock speed, the data buffer tends to empty. In this case, 15 positive alignments must be performed: a fill byte is added to the VC container to be sent and the value of the pointer is increased by one.

Figure 3 shows how it is possible to form an STM-N frame from existing bitstreams. These bitstreams (1.5, 2, 6, 8, 34, 45 or 140 Mbit / s, shown on the right in the figure) are first packed in containers C (Container) defined by the CCITT. In the second step, header bytes containing control information are added to the containers to obtain the virtual container VC-11, VC-12, VC-2, VC-3 or £ 5 VC-4 described above (the first of the indices after the abbreviations refers to the hierarchy level and the second to the bit rate).

This virtual container remains intact on its journey through the synchronous network all the way to the destination of the container. Virtual containers are further formed (depending on the hierarchy-30 level) either the so-called subunits TU (Tributary Unit) or the above AU units (AU-3 and AU-4) by adding pointers. The AU can be mapped directly to the STM-1 frame, but the TUs must be assembled through the Tributary Unit Group (TUG) and VC-3 and 35 VC-4 units to form AUs, 4,91692 which can then be mapped to the STM -1- to the frame. In Figure 3, mapping is indicated by a solid thin line, aligning by a dashed line, and multiplexing by a solid thicker line.

As can be seen from Figure 3, there are several alternative ways to form the STM-1 frame, as well as, for example, the contents of the top-level virtual container VC-4 may vary depending on the level and how it has been built. The STM-1 signal may thus include, for example, 3 TU-3 units or 21 TU-2 units or 63 TU-12 units, or some combination of these. When a higher-level unit contains several lower-level units, e.g., a VC-4 unit containing resin-15 kappa TU-12 units (thus there are a total of 63 units in one VC-4 unit, cf. Figure 3), there is a lower-level unit. the units are mapped to a higher level frame using interleaving, with the first bytes first taken from each lower level unit, then the second bytes, etc. The example in Figure 2 shows how the VC-4 unit first has all 63 TUs in succession. The first bytes of the -12 unit, followed by the second bytes of all 63 TU-12 units, etc.

The SDH frame structures described above and their formation are described, for example, in references [1] and [2], which are referred to for a more detailed description (a list of references is at the end of the explanatory section).

The above-mentioned pointer mechanism allows flexible phase shift of different units within the STM frame and also reduces the size of the buffer memories required in the network. The SDH system basically has pointers at two levels: AU pointers and TU pointers, which thus indicate the first byte of the corresponding virtual container VC within the AU or TU unit, respectively. The definitions of the 35 CCITTs for the indicator are given in reference [1], to which

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91692 5 is referred to for a more detailed description.

For example, the AU-4 pointer consists of nine consecutive bytes H1, Y, Y ... H3, as shown in Fig. 4a, of which the bytes H1 and H2 are shown separately in Fig. 5b. The actual pointer value PTR is formed by the last ten bits of the word formed by bytes H1 and H2 (bits 7-16). The values of the pointer TU-11, TU-12 and TU-2 are similarly formed by the last ten bits of the word formed by bytes VI and V2. The coding of the AU and TU pointers is quite similar anyway, but they do have some differences, which are described below.

The value of the pointer must first be in a certain range in order to be accepted. The accepted decimal value of the AU-4 pointer 15 is between 0-782, and e.g. the accepted decimal value of the TU-12 pointer is between 0-139. Said values are called offset values because they indicate (within the frame structure) the offset between the pointer and the first byte of the corresponding virtual container. Toi-20 sex, in order for the New Data Flag (NDF) value defined by the N-bits (bits 1-4) to be accepted, the AU and TU-3 pointers must be at least three bits the same, the TU- 11, with TU-12 and TU-2 pointers

all bits must be the same. New data flag NDF

2.5 allows arbitrary changes in the value of the pointer if they are the result of a change in the payload. Normal operation (NDF_disabled) is indicated by N-bit values "0110", and a new pointer value (NDF_enable) by N-bit values "1001" (i.e., by inverting 30 bits of normal mode). In this way, the new data flag, together with the new value of the pointer, indicates a change in the alignment of the virtual container within the frame if the change occurs for any reason other than positive or negative alignment (the transmitter can force the virtual container to align within the frame structure 6 91692). .

If the flag of the new data indicates a new pointer value (NDF_enable), and the pointer value consists of one bits (i.e., if bits 1-16 are "1001SS1111111111", 5 where the S bits can be ones or zeros independently), it indicates concatenation. . Concatenation means that, for example, AU-4 units have been concatenated into one larger unit (so-called AU-4-Xc), which can carry payloads that require more capacity than C-4-10 containers. (Similarly, TU-2 units can be chained into a larger unit capable of carrying payloads greater than the capacity of a C-2 container.)

If all bits 1-16 are ones, it indicates 15 alarms (AIS, Alarm Indication Signal).

The S-bits (bits 5 and 6) indicate which level of the hierarchy (shown in Figure 3) (e.g. TU-12) is currently operating.

The I and D bits of the 10-bit pointer word are used to indicate the positive and negative equations described above. If at least three of the five increment or I-bits (bits 7, 9, 11, 13 and 15) are inverted, it means (if certain additional conditions are met) a positive equalization (I = Increment).

25 If, on the other hand, at least three of the five subtraction or D-bits (bits 8, 10, 12, 14, 16) are inverted, it means (if certain additional conditions are met) a negative equalization (D = Decrement).

Annex B1 of CCITT Recommendation G.783 (Reference [3]) 30 defines the equalization operations as follows: - positive equalization increment inc_ind = norm_NDF + SS + majority of I-bits inverted + majority of D-bits non-inverted + no new received in previous three frames data flag value 35 "new" (NDF_enable), incremental information (inc_ind) and no subtraction

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91 692 7 data (dec_ind), and - negative alignment subtraction data to dec_ind = norm_NDF + SS + majority of D-bits inverted + majority of I-bits non-inverted + no new data flag value "new" received in previous 3 frames (NDF_enable), increment information (inc_ind) and no subtraction information (dec_ind).

In the above definition, each "+" sign means a logical AND function. In addition, the normal NDF, i.e., 10 norm_NDF, is defined so that all other bit combinations except the accepted value of the new data flag "new" (i.e., NDF_enable) are considered normal.

The condition for approving equalization functions is therefore proposed to be e.g. that at least three frames must have elapsed since the previous equalization operation or also three frames from the previous new pointer obtained by the NDF.

The problem with the current situation is, firstly, that if an incorrect decision is made in the interpretation of the pointer with respect to alignment (misinterpretation of the situation as alignment), 20 the situation can only be corrected after three frames if all three consecutive pointers are received correctly. This is because, according to the recommendations, the pointer value can be updated to a new one after three completely identical pointer-23 pointer values have been received in succession. However, not all three new consecutive pointers may be received correctly, and it may take more than three frames to correct the situation. For example, in a TU-1 frame structure, the time of three consecutive frames corresponds to an erroneous frame synchronization of 1500 με, but the time during which the correct frame rate is actually recovered can be much longer.

On the other hand, the pointer can also be misinterpreted as a new pointer 35 sent by the new data flag if the bits of the new data flag are received incorrectly 8 91692 (the value "new" is misinterpreted for the new data flag). but the actual pointer value was received incorrectly, in both cases the frame-5 rate is lost for at least three frames, but probably for a much longer time.

The CCITT recommendations (G.709 clause 3.2.6, clause 5) state that a new pointer should be accepted at the location indicated by the new offset value if a new 10 data flag (NDF_enable) is received. However, the rules of interpretation do not allow any corrective action in the event that the correct pointer has been replaced with a new one on the wrong grounds, which may have been due to, for example, transmission errors.

In practice, the only known solution is to build 15 receivers according to the recommendations so that a new synchronization point is found at the earliest after three frames, but probably only after a longer time.

It is an object of the present invention to remedy the shortcomings described above and to provide a method which speeds up the discovery of synchronization after an erroneous new pointer. This is achieved by the method according to the invention, which is characterized by what is described in the characterizing part of the appended claim 1.

The idea according to the invention is to check a certain number of pointers after a change of the pointer value of 2.5, and to restore the old pointer value again if its share is still large enough in the pointers even after the change.

The invention will now be described in more detail with reference to Figures 5 and 6 in the examples according to the accompanying drawings, in which Figure 1 shows the basic structure of one STM-N frame, Figure 2 shows the structure of one STM-1 frame, Figure 3 shows the formation of an STM-N frame. -

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9 91 692 of the mass PCM systems, Fig. 4a shows in more detail the AU-4 pointer, Fig. 4b shows in more detail the bytes H1 and H2 of the AU-4 pointer shown in Fig. 4a, 5 Fig. 5 shows a block diagram of an SDH cross-connect device with synchronization units the method according to the invention can be used, Fig. 6 is a state diagram showing the main states of the receiver as well as the transitions occurring in different states.

Figure 5 shows a part of an SDH network in which the method according to the invention can be used. This part is the synchronization unit 52 of the SDH cross-connect device 51, where the payload of the signal coming to the cross-connect device 51 is stored in step with the clock signal 15 extracted from the incoming signal in an elastic buffer and read from it in step with the cross-switch device clock signal. For example, a signal with 63 TU-12 signals and an STM-1 frame structure is first introduced in the synchronization unit 52 to a common AU interpretation unit, which interprets the AU pointer information and 20 H4 bytes in the vc-4 container route header (PÖH) to find the TU -12-frames. The interpretation unit then distributes the bytes of each TU-12 channel to its own TU interpretation unit, which in this conventional case is typically a total of 63. The TU-25 interpretation unit further interprets the pointer of each TU-12 channel to find the phase of the VC-12 signal. The above-mentioned synchronization unit is described in more detail in Finnish patent applications 922567-922569, which also present a solution that avoids 63 parallel interpretation units. However, since the structure of the synchronization unit is not within the scope of the present invention, reference will be made to said applications for a more detailed description. It should be noted, however, that the method according to the invention can be used in both the known and the new solution, both of which are presented in the above-mentioned applications.

10 91692

In addition to the synchronization unit described above, the method according to the invention can also be used in SDH network line connections, e.g. 2 Mbit / s line connection unit, where 2 Mbit / s channels are separated from the frame-5 structure, or e.g. STM-1 interface unit .

The pointer interpretation performed at the receiver can be presented as a state diagram as in Fig. 6, in which the receiver interpreting machine has three possible main states: the normal state NORM, the alarm state AIS (Alarm Indicati-10 on Signal) and the pointer loss state LOP (Loss of Pointer). In addition, the figure shows the smoothing mode JUST, which is entered when the old pointer value is changed to a new pointer value based on the received increment or decrement information (inc_ind or dec_ind) received, and the NDF mode, which is entered when the old pointer value is changed to a new pointer value. based on the received new data flag (NDF_enable). Although the equalization and NDF modes are plotted separately from the NORM mode in the figure, they are actually sub-modes of the NORM mode. These 20 sub-modes will be exited after a certain observation period. The present invention relates to the recovery mechanism R by which these sub-states are exited. The return mechanism according to the invention can be used regardless of the solutions used in other parts of the state diagram, as long as a certain predetermined number of preceding pointers is checked before changing the pointer value on the basis of the addition or subtraction information. In other parts of the status diagram, it is thus possible to use, for example, solutions that are fully compliant with the CCITT recommendations, 30 or, for example, the solutions below that differ in some respects from the CCITT recommendations, or eg solutions described in the applicant's previous FI- in patent applications 923061 and 923062, which are largely the same as the 35 solutions set forth below.

Il 91692 11

In the above-mentioned main states, the possible events that result from the interpretation of the received pointer are shown for each state in the following three tables. For the sake of clarity, the titles of the events have been retained in English in order to have a clear correspondence with the SDH recommendations as well as with the other state of the art. However, a corresponding Finnish name has been added to the brackets.

NORM mode event Definition 10 active_point (new data flag (NDF) receives a pointer in the arena) von “normal” (NDF_disabled), the SS bits are correct, and the offset value is within the allowed range and equal to the valid offset value. value.

new_point (new Data flag gets a value pointer) "normal" (NDF_disabled), the SS bits are correct, and the offset value is within the allowed range and different from the valid offset value.

15 NDF_enable (new New data flag gets the value "new data flag) si" (NDF_enable), the SS bits are correct and the offset value is within the allowed range.

AIS_ind (AIS alarm- 16-bit pointer word receives ar-) von "1111 1111 1111 1111" 12 91692 inc_ind (insert- New data flag gets value to) "normal" (NDF_disabled), SS bits are correct, majority I bits are inverted and the majority of the D bits are not inverted, and the new data flag value "new" (NDF_enable), increment information (inc_ind), and decrement information (dec_ind) have not been received in the previous three frames.

dec_ind (subtraction- New data flag gets value information) "normal" (NDF_disabled), SS bits are correct, most of the D-bits are inverted and most of the I-bits are not inverted, and no new data flag value has been received in the previous three frames " new "(NDFenable), increment (inc_ind) and not decrement (dec_ind).

5 NORM_inv_point If no AlS alarm is received: (NORM status error, new data flag value "new pointer) si" (ie NDF_enable) or valid pointer (acti-ve_point).

AIS mode event Definition 10 active_point (not a pointer of a defined mass)

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91692 13 new_point (new data flag (NDF) gets value indicator) "normal" (NDF_disabled), SS bits are correct, and offset value is within allowable range.

NDF_enable (new New data flag gets the value "uu-data flag) si" (NDF_enable), the SS bits are correct, and the offset value is within the allowed range.

5 AIS_ind (AIS alarm 16-bit cursor word gets value tys) "1111 1111 1111 1111" inc_ind (increment- not specified to) dec_ind (subtraction- not specified 10 data) AIS_inv_point (AIS- (I) If no AlS- alarm status invalid and no new data flag ar pointer) can be "new" (NDF_enable), or (II) if no AlS alarm is received.

15 LOP state event Definition active_point (pointer with mass not specified) 20 new_point (new New data flag gets a value pointer) "normal" (NDF_disabled), SS bits are correct, and the offset value is within the allowed range.

14 91692 NDF_enable (new New data flag gets the value "new data flag) si" (NDF_enabled), the SS bits are correct and the offset value is within the allowed range.

AIS_ind (AIS alarm 16-bit pointer word gets value tys) "1111 1111 1111 1111" 5 inc_ind (increment path not specified to) dec ^ ind (subtraction- not specified data) LOP_inv_point (LOP- (I) Incorrect pointer count 10 status invalid discipline not updated at all, or pointer) (II) all pointer values other than AIS alarm, or (III) all pointer values other than AIS alarm and new data flag value "new".

As can be seen from the above tables, the above bytes H1 and H2 (bits 15 1-16) of the pointer can indicate up to seven different events. I.

In practice, the transition of the receiver between different main states and within the main state to another internal state is controlled by counters similar to those shown in Table 20 below. In order to make the comparison with the prior art easier, the designations in this respect have been retained in English, and the corresponding Finnish term has been added in brackets. The reference character (N or 3) at the beginning of the English name of the counter indicates the maximum value of that counter. Counters are modulo counters,

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91692 15 which means that when the value reaches its upper limit, the calculator starts again from the beginning.

COUNTER FUNCTION

5 N x NDF_enable (NDF flag- Counts consecutive NDF_enable), where (N = 8 ... 10) events and controls the transition from NORM to LOP.

3 x new_point (Counts successive new_point counter) events and controls transitions from LOP and AIS modes to NORM mode and from NORM mode to NORM mode (change in offset value).

N x inv_point (invalid Counts consecutive inv_point- 10 pointer counter) events and controls transitions from NORM and AIS modes to LOP mode.

3 x AISind (alarm counter) Counts consecutive AIS_ind events and controls transitions from NORM and LOP modes to AIS mode.

. When the maximum value of the counter is reached, the operations performed in the different modes are as follows: 15 1. NORM mode - N x NDF_enable: transition to LOP mode, - 3 x new__point: transition to NORM mode (offset value change), - N x inv_point: transition In LOP mode, 20 - 3 x AIS_ind: transition to AIS mode.

2. LOP mode 16 91692 - N x NDF_enable: not relevant - 3 x new_point: transition to NORM mode, - N x inv_point: not relevant, - 3 x AIS_ind: transition to AIS mode.

5 3. AIS mode - N x NDF_enable: not relevant - 3 x new_point: transition to NORM mode, - N x inv_point: transition to LOP mode, 10 - 3 x AIS_ind: not relevant.

The counter of the new pointer controls the finding of the correct frame synchronization in case the pointer value has been changed incorrectly. As already stated above, the offset value 15 of three consecutive new pointers must be equal to each other, otherwise the counter of the new pointer will be reset in between. As a result, finding the correct frame rate in known methods is likely to take longer than three frames. The value of N is in practice between 8 ... 10.

20 If an incorrect pointer is received, the value of the counter of the invalid pointer is increased by one, otherwise the error counter is reset. If the counter of the erroneous pointer reaches its maximum value, it switches from normal and alarm mode to pointer loss mode. The handling of an erroneous pointer is described in more detail in FI patent application 923061, to which reference is made for a more detailed description.

The transitions between states described above are illustrated in Figure 6 by dashed lines. In addition, Fig. 6 shows the reception of a single new data flag (together with the allowed pointer value) in the alarm state, which causes the transition to the normal state NORM. This is the only single event that causes a transition from one main state to another.

35 Figure 6 also shows other normal

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91692 17 changes. These are (1) the reception of increment or decrement data inc_ind / dec_ind and (2) the reception of a single new data flag, both of which cause a change in the offset value in the normal mode in a manner known per se, as well as the reception of a valid pointer (active_point). After the approved increase or decrease information, the smoothing mode is entered into the JUST mode and after the new data flag, the NDF mode is entered. Both of these modes are sub-modes of normal mode. These sub-modes are exited after a certain observation period described below. In the return event described by the arrows R, the pointer can be returned to its previous value. In addition, the figure shows the internal changes in the AIS and LOP modes.

Since the interpretation of the pointer does not per se fall within the scope of the present invention, reference is made in this connection to FI patent applications 923061 and 923062, in which the interpretation process is shown by means of a flow chart. Otherwise, a similar interpretation may be used in the present invention, but each addition or subtraction information is accepted only if the new data flag value "new" (NDF_enable), increment information (incind) and subtraction information (dec_ind) have not been received in the three preceding frames.

In this respect, the invention thus follows the recommendations of the CCITT.

25 When equalization information (subtraction or * addition information) is received, the previous three indicators are checked in a manner known per se before the new value can be accepted. If no new data flag value "new" (NDF_enable), 30 increment data (inc_ind) or decrement data (dec_ind) have been received during the previous three frames (and if any other accepted acceptance criteria are met), an equalization decision is made, increasing the pointer value by one or subtracting one. , depending on whether addition or subtraction information was received. As a result of the change in the value of Osoi-35, the equalization mode is entered

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91 692 18 JUST. Once the equalization decision has been made, the old pointer value is returned according to the invention in the following cases: 1. If two of the three pointers following the alignment information have exactly the same value as the pointer value 5 before receiving the alignment information, the old pointer value is returned to the active pointer, 2. If the two pointer values are exactly the same as the pointer value before receiving the alignment information, the old pointer value is returned to the active pointer 10. 3. If there are no new pointer values among the three pointers following the received alignment information, but there are two old pointer values, the old pointer value is returned to the active pointer. This is otherwise the same as point 1, but point 1 allows one pointer to have a new pointer value.

4. If the two pointers following the received alignment information do not have any new pointer values but have one old pointer, the old pointer value is returned to the active 20 pointer.

The same return rules are applied according to the invention also in the case that the pointer value has been obtained by means of the NDF of the new data flag and has entered the NDF mode. In the case of a new data flag, the old value of the pointer can only be restored if it was in the normal state before the pointer value was changed. (All return rules of the invention apply to normal mode.)

In the case of pointer equalization, the old pointer value 30 is restored by the inverse equalization function, so that the old pointer value does not need to be stored in memory, as in the case that it is obtained by means of a new data flag.

The length of the observation period during which frames 35 are monitored after a change in the pointer value may not be • ·

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91692 19 need to be three frames long. However, periods longer than three frames may not be useful, as finding synchronization using such long observation periods could be slower than in the known 5 ways (three consecutive new pointers of equal size). In general, however, the following return rules can be constructed, assuming said period N to be the length of the frame: A. The old pointer is restored if at least 10 (N-K + 1) / 2 pointers are old pointers during the following (N-K) pointers. Here N is even and K is odd, and in addition (N-K)> 1.

B. The old pointer is returned if at least (N — K + 2) / 2 pointers are old pointers during the next (N — K) pointer. Here N is even and K is even, and in addition (N-K)> 1.

C. The old pointer is returned if at least (N — K + 2) / 2 pointers are old pointers during the next (N — K) pointer. Here N is odd and K

20 is odd, and in addition (N-K)> 1.

D. The old pointer is returned if at least (N — K + 1) / 2 pointers are old pointers during the next (N-K) pointer. Here N is odd and K is even, and in addition (N-K)> 1.

25 In the above rules, the parameter K describes

the number of indicators that can speed up the adoption of a new indicator. The value N-1 can be selected as the maximum value of K, however, it is preferable to use an integer value smaller than (N-30 1) / 2 as the value of K.

Rules A ... D are shown in the following table with different values of N and K. The cheapest options for the current CCITT recommendation are underlined.

20 91692 K = 0 K = 1 K — 2 K = 3 K = 4 Κ = 5 Κ = 6 Ν = 1 Ν = 2 2/2 Ν = 3 2/3 2/2 5 Ν = 4 3/4 2 / 3 2/2 Ν = 5 3/5 3/4 2/3 2/2 Ν = 6 4/6 3/5 3/4 2/3 2/2 Ν = 7 4/7 4/6 3/5 3 / 4 2/3 2/2 Ν = 8 5/8 4/7 4/6 3/5 3/4 2/3 2/2 10 Ν = 9 5/9 5/8 4/7 4/6 3 / 5 3/4 2/3

In the cell of the table, the number to the right of the slash represents the length of the observation period and the number to the left shows the number of old pointer values 15 required.

When N = 3 and K = 0, the old pointer can be restored according to rule D when 2 pointers are old pointers during the next three pointers. This is therefore in line with Rule 1 above.

20 When N = 3 and K = 1, the old pointer can be reset - according to rule C, when 2 pointers are old pointers during the next two pointers. This is therefore in line with Rule 2 above.

In solution 25 according to the table above, only the number of old indicator values during the observation period was used for decision making. However, the recovery mechanism can also take advantage of the proportion of new indicator values during the observation period. The proportion of the new pointer value in the monitoring period is checked according to the invention 30 at least when the proportion of the old pointer values li 91692 21 is exactly half of the number of pointers in the monitoring period. In these cases, a reset can still be performed if the number of new pointer values remains less than a certain predetermined number, e.g. less than 5 half of the number of indicators in the monitoring period. The rule may also be stricter than this, but it requires at least four frames for the length of the observation period, otherwise the number of new pointer values must be zero in order for a reset to be made.

10 For example, when N = 3 and K = 1, the old pointer pa can be returned if one old pointer value has been received during the next two pointers, but no new pointer. This is therefore in line with Rule 4 above.

Although the invention has been described above with reference to the examples according to the accompanying drawings, it is clear that the invention is not limited thereto, but can be modified within the scope of the inventive idea set forth above and in the appended claims. Although SDH-specific terms have been used as an example above, the invention is equally applicable to, e.g., a similar American SONET system or any other similar system in which a frame structure consists of a predetermined number of constant length bytes, 25 which frame structure indicates a payload indicator. within the phase frame structure. It is also irrelevant to the invention whether criteria other than the checking of the preceding frames, e.g. the checking of SS bits, are used in accepting the equalization information. Also, the number of frames to be checked before performing the 30 pointer alignment may vary if, for example, the recommendations change in this respect.

Reference list: 35 [1]. CCITT Blue Book, Recommendation G.709: "Syn- • f 91692 22 chronous Multiplexing Structure," May 1990.

[2]. SDH - New digital hierarchy, TELE 2/90.

[3]. CCITT Blue Book, Recommendation G.783: "Characteristics of Synchronous Digital Hierarchy (SDH) Mul- 5 Tiplexing Equipment Functional Blocks," August 1990, Annex B.

Claims (5)

91692 23 A method for receiving a signal for use in a synchronous digital communication system, such as an SDH or SONET system, which signal has a frame structure consisting of a predetermined number of constant length bytes and including a pointer indicating a payload phase within the frame structure, the method performing a pointer 10 interpretation, in which the receiver has three possible main states, between which it switches under the control of event counters, which are the normal state (NORM), the pointer loss state (LOP) and the alarm state (AIS), and which counters count predetermined events in each of said main states, said the events comprise the receipt of the decrement information (dec_ind) indicating the negative pointer equalization and the reception of the increment information indicating the positive pointer equalization (inc_ind), the smoothing operations of which are indicated by the k I and D bits, and receiving a new data flag (NDF_enable) indicating the new pointer value, in which case the increment and decrement information and the new data flag indicate that the old pointer value needs to be changed to a new pointer value and before the pointer value the change is checked by a predetermined first set of indicators, and the change is made only if these indicators meet the predetermined acceptance criteria, characterized in that after the old indicator value is converted to 30 new indicator values based on one of the above events, the second set of indicators is checked, and the old pointer value is reinstated if at least half of said second number of indicators following the change have an old pointer value, 35 and that at least in cases where exactly • · 24 91692 half of said second If the number of pointers following the change is an old pointer value, the reset is performed only if the number of new pointer values in said second number of pointers is also less than a certain predetermined third number. A method according to claim 1, characterized in that three pointers are used as said second amount and the old pointer value is restored whenever two of these three next pointers have an old pointer value. A method according to claim 1, characterized in that if the next two pointers have the same value as the value of the pointer before said change, the old pointer value is restored 15 immediately. A method according to claim 1, characterized in that three pointers are used as said second number and the old pointer value is restored if two of the next three pointers have an old pointer value and the third pointer value is not said new value. A method according to claim 2, characterized in that if one of the following two pointers has the same value as the pointer value 25 before said change, and the value of the second pointer is also different from said new value, the old pointer value is restored immediately. Il 91692 25