WO1994003000A1

WO1994003000A1 - Method for receiving a signal used in a synchronous digital telecommunication system

Info

Publication number: WO1994003000A1
Application number: PCT/FI1993/000299
Authority: WO
Inventors: Jari Patana
Original assignee: Nokia Telecommunications Oy
Priority date: 1992-07-24
Filing date: 1993-07-15
Publication date: 1994-02-03
Also published as: AU4504293A; FI91692B; FI91692C; DE4393406T1; FI923380A0; FI923380A

Abstract

The invention relates to a method for receiving a signal used in a synchronous digital telecommunication system, such as the SDH or SONET system. In order that frame synchronization could be found as quickly as possible after information about a change of the pointer value has been received e.g. as a result of transmission errors, a certain number of pointers following the change are checked, and the old pointer value is restored if at least half of said number of pointers following the change have the old pointer value. At least in the cases where exactly half of said number of pointers following the change have the old pointer value, the return is effected only if the number of new pointer values in said number of pointers is smaller than a certain predetermined number.

Description

Method for receiving a signal used in a synchronous digital telecommunication system

The invention relates to a method according to the preamble of the accompanying claim 1 for receiving a signal used in a synchronous digital telecommunication system.

The current digital transmission network is plesiochronous, that is each 2-Mbit/s basic multiplex system has a dedicated clock independent of any other system. It is therefore impossible to locate a single 2-Mbit/s signal in the bit stream of a higher-order system, but the higher-level signal has to be demulti¬ plexed through each intermediate level down to the 2 Mbit/s level to extract the 2-Mbit/s signal. For this reason, especially the construction of branch connec¬ tions requiring several multiplexers and demultiplexers has been expensive. Another disadvantage of the plesio¬ chronous transmission network is that equipments from two different manufacturers are not usually compatible.

The above drawbacks, among other things, have led to the introduction of the new synchronous digital hierarchy SDH specified in CCITT Recommendations G.707 to G.709 and G.781 to G.784. The synchronous digital hierarchy is based on STM-N transfer frames (Synchronous Transport Modules) located on several levels of hier¬ archy N (N=l,4,16... ). Existing PCM systems, such as 2, 8- and 32-Mbit/s systems, are multiplexed into a syn¬ chronous 155.520-Mbit/s frame of the lowest level of the SDH (N=l). Consistently with the above, this frame is called the STM-1 frame. On the higher levels of hierarchy the bit rates are multiples of the bit rate of the lowest level. In principle, all nodes of the synchronous transmission network are synchronized into one clock. If some of the nodes should, however, lose connection with the common clock, it would lead to problems in the connections between the nodes. The phase of the frame must also be easy to recognize in the reception. For the reasons stated above, a pointer has been introduced in the SDH telecommunications, said pointer being a number which indicates the phase of the payload within the frame, i.e. the pointer indicates that byte in the STM frame from which the payload begins. Figure 1 illustrates the structure of an STM-N frame, and Figure 2 illustrates a single STM-1 frame. The STM-N frame comprises a matrix with 9 rows and N x 270 columns so that there is one byte at the junction point between each row and the column. Rows 1-3 and rows 5-9 of the N x 9 first columns comprise a section overhead SOH, and row 4 comprises an AU pointer. The rest of the frame structure is formed of a section having the length of N x 261 columns and containing the payload section of the STM-N frame. Figure 2 illustrates a single STM-1 frame which is 270 bytes in length, as described above. The payload section comprises one or more administration units AU. In the example shown in the figure, the payload section consists of the administration unit AU-4, into which a virtual container VC-4 is inserted. (Alternatively, the STM-1 transfer frame may contain three AU-3 units, each containing a corresponding virtual container VC-3). The VC-4 in turn consists of a path overhead POH located at the beginning of each row and having the length of one byte (9 bytes altogether), and of the payload section in which there are lower-level frames also comprising bytes allowing interface justification to be performed in connection with mapping when the rate of the informa¬ tion signal to be mapped deviates from its nominal value to some extent. (Mapping of the information signal into the transmission frame STM-1 is described e.g. in patent applications AU-B-34689/89 and FI-914746.

Each byte in the AU-4 unit has its own location number. The above-mentioned AU pointer contains the location of the first byte of the VC-4 container in the AU-4 unit. The pointers allow positive or negative pointer justifications to be performed at different points in the SDH network. If a virtual container having a certain clock frequency is applied to a network node operating at a clock frequency lower than the above- mentioned clock frequency of the virtual container, the data buffer will be filled up. This requires negative justification: one byte is transferred from the received virtual container into the overhead section while the pointer value is decreased by one. If the rate of the received virtual container is lower than the clock rate of the node, the data buffer tends to be emptied, which calls for positive justification: a stuff byte is added to the received virtual container and the pointer value is incremented by one.

Figure 3 shows how the STM-N frame can be formed of existing bit streams. These bit streams (1.5, 2, 6, 8, 34, 45 or 140 Mbit/s, shown on the right in the figure) are packed at the first stage into containers C specified by CCITT. At the second stage, overhead bytes containing control data are inserted into the containers, thus obtaining the above-described virtual container VC-11, VC-12, VC-2, VC-3 or VC-4 (the first suffix in the abbreviations represents the level of hierarchy and the second suffix represents the bit rate). This virtual container remains intact while it passes through the synchronous network up to its point of delivery. Depending on the level of hierarchy, the virtual containers are further formed either into so- called tributary units TU or into AU units (AU-3 and AU- 4) already mentioned above by providing them with pointers. The AU unit can be mapped directly into the STM-1 frame, whereas the TU units have to be assembled through tributary unit groups TUG and VC-3 and VC-4 units to form AU units which then can be mapped into the STM-1 frame. In Figure 3, the mapping is indicated by a continuous thin line, the aligning with a broken line, and the multiplexing with a continuous thicker line.

As is to be seen from Figure 3, the STM-1 frame may be assembled in a number of alternative ways, and the content of the highest-level virtual container VC-4, for instance, may vary, depending on the level from which the assembly has been started and in which way the assembly has been performed. The STM-1 signal may thus contain e.g. 3 TU-3 units or 21 TU-2 units or 63 TU-12 units, or a combination of some of the above-mentioned units. As the higher-level unit contains several lower- level units, e.g. the VC-4 unit contains TU-12 units (there are 63 such units in a single VC-4 unit, cf. Figure 3), the lower-level units are mapped into the higher-level frame by interleaving so that the first bytes are first taken consecutively from each one of the lower-level units, then the second bytes, etc. The example of Figure 2 shows with circled numbers how the VC-4 unit contains at first consecutively the first bytes of all 63 TU-12 units, then the second bytes of all 63 TU-12 units, etc.

The above-described SDH frame structures and the assembly of such structures have been described e.g. in References [1] and [2], which are referred to for a more detailed description (the references are listed at the end of the specification).

The above-mentioned pointer mechanism allows flexible phase shift of different units within the STM frame and also reduces the size of buffer memories required in the network. In principle, the SDH system comprises pointers on two levels: AU pointers and TU pointers, which indicate the first byte of a virtual container VC within the AU or TU unit, respectively. The CCITT specifications relating to the pointer are set forth in Reference [1], which is referred to for a more detailed description.

As shown in Figure 4a, the AU-4 pointer, for example, consists of nine successive bytes HI, Y, Y...H3, of which the bytes HI and H2 are shown separate¬ ly in Figure 4b. The actual pointer value PTR consists of the ten last bits (bits 7 to 16) of the word formed by bytes HI and H2. Correspondingly, the value of the TU pointer consists of the ten last bits of the word formed by bytes VI and V2. The AU and TU pointers have quite similar coding even in other respects; there are, however, some differences, which will be described in the following.

First, the pointer value must be within a certain range in order to be acceptable. The acceptable decimal value of the AU-4 pointer is from 0 to 782, and the acceptable decimal value of the TU-12 pointer, for example, is from 0 to 139. These values are called off¬ set values, as they (within the frame structure) indicate the offset between the first byte of the pointer and that of the corresponding virtual container. Second, in order for the value "new" for the new data flag (NDF_enable) defined by the N-bits (bits 1 to 4) to be acceptable, at least three bits should be identical in the AU and TU-3 pointers, and all bits should be identical in the TU-11, TU-12 and TU-2 pointers. The new data flag NDF allows arbitrary changes in the pointer value if they are the result of a change taking place in the payload. Normal operation (NDF_disabled) is indicated by the N-bit values "0110", and the new pointer value (NDF_enable) by the N-bit values "1001" (i.e. by inverting the bits of the normal state). In this way the new data flag, together with the new pointer value, indicates a change in the alignment of the virtual container within the frame, if the change is caused by some other reason than positive or negative justification (the transmitter may force a new alignment on the virtual container within the frame strμcture). If the new data flag indicates a new pointer value (NDF_enable), and the pointer value consists of one bits (i.e. if bits 1 to 16 are "1001SS1111111111" wherein the S-bits may be independently of one another one or zero), it signifies concatenation. Concatenation means that e.g. AU-4 units are concatenated into one larger unit (so-called AU-4-Xc), which may transfer payloads which require a higher capacity than the C-4 container. (Correspondingly, TU-2 units can be con¬ catenated into a larger unit capable of transferring greater payloads than the capacity of the C-2 con- tainer).

If all of the bits 1 to 16 are ones, it signifies alarm (AIS, Alarm Indication Signal).

The S-bits (bits 5 and 6) indicate on which level of hierarchy (shown in Figure 3; e.g. TU-12) the operation is currently taking place.

The I- and D-bits of the 10-bit pointer word are used to indicate the positive and negative justi¬ fication described above. If at least three out of five increment bits, or I-bits (bits 7, 9, 11, 13 and 15), are inverted, it signifies positive justification (if certain additional conditions are met).

If at least three out of five decrement bits, or D-bits (bits 8, 10, 12, 14, 16), are inverted, it signifies negative justification (if certain additional conditions are met). In Annex B.l. of CCITT Recommendation G.783 (Reference [3]), justification functions are specified as follows:

- increment data indicating positive justifica- tion inc_ind = norm_NDF + SS + majority of I-bits inverted + no majority of D-bits inverted + the value "new" for the new data flag (NDF_enable), increment data (inc_ind) or decrement data (dec_ind) has not been received in the three preceding frames, and - decrement data indicating negative justifica¬ tion dec_ind = norm_NDF + SS + majority of D-bits inverted + no majority of I-bits inverted + the value "new" for the new data flag (NDF_enable), increment data (inc_ind) or decrement data (dec_ind) has not been received in the three preceding frames.

In the definition given above each "+" repres¬ ents a logical AND function. In addition, the normal NDF (norm_NDF) is defined so that all other bit combinations except the value "new" for the new data flag (NDF_enable) are considered normal.

A condition for the acceptance of justification functions is thus that at least three frames have passed since the previous justification function or since the previous new pointer obtained by means of the NDF. In the present situation it is problematic that if a wrong decision is made in pointer interpretation with respect to justification (the situation is errone¬ ously interpreted as justification), the situation cannot be corrected until after three frames if all the three following successive pointers are received correctly. This is because, according to the recommenda¬ tions, the pointer value can be updated only when three new completely identical pointer values have been received successively. All of the three new successive pointers are, however, not necessarily received correct- ly, but it may take longer than three frames to correct the situation. In the TU-1 frame structure, for example, three successive frames correspond to incorrect frame synchronization of 1500 μs, but the time during which the correct frame synchronization is regained may also be much longer.

On the other hand, the pointer may also be erroneously interpreted as a new pointer sent by means of a new data flag if the bits of the new data flag are incorrectly received (the value "new" is erroneously interpreted for the new data flag). It is also possible that the new data flag should have been valid, but the actual pointer value was incorrectly received. In both cases the frame synchronization is lost for at least three frames - most likely for a much longer time.

In CCITT Recommendations (G.709 item 3.2.6, item 5) it is stated that a new pointer should be accepted at the offset indicated by a new offset value if a new data flag (NDF_enable) is received. The inter- pretation rules do not, however, allow any correction functions if a correct pointer has been replaced by a new one on false grounds, e.g. on account of trans¬ mission errors.

In practice the only known solution is to construct a new receiver in compliance with the recom¬ mendations so that the new synchronization location is not found until after three frames, most likely after a much longer time.

The object of the present invention is to remedy the defects described above and to provide a method which expedites the finding of synchronization after an invalid new pointer. This is achieved with a method of the invention, which is characterized by what is disclosed in the characterizing part of the accom- panying claim 1. The idea of the invention is to check a certain number of pointers after the pointer value has been changed, and to restore the old pointer value if a sufficiently great number of pointers received after the change have this old value.

In the following the invention will be described in greater detail by way of example with reference to Figures 5 and 6 in the attached drawings, in which Figure 1 shows the basic structure of a single

STM-N frame,

Figure 2 shows the structure of a single STM-1 frame,

Figure 3 shows the assembly of the STM-N frame from existing PCM systems,

Figure 4a shows the AU-4 pointer in greater detail,

Figure 4b shows the bytes HI and H2 of the AU-4 pointer illustrated in Figure 4a, Figure 5 is a block diagram of an SDH cross- connect equipment in the synchronizing units of which the method of the invention can be employed,

Figure 6 is a state diagram illustrating the main states of the receiver and transitions taking place in the different states.

Figure 5 shows a part of the SDH network in which the method of the invention can be employed. This part is a synchronizing unit 52 of an SDH cross-connect equipment 51. In this synchronizing unit 52 the payload of the signal coming to the cross-connect equipment 51 is stored in an elastic buffer in synchronization with a clock signal extracted from the incoming signal and is read from the elastic buffer in synchronization with the clock signal of the cross-connect equipment. For example, a signal containing 63 TU-12 signals and having the STM-1 frame structure is first applied in the syn¬ chronizing unit 52 to a common AU interpretation unit, which interprets the AU pointer data and the H4 byte in the path overhead (POH) of the VC-4 container so as to locate the TU-12 frames included in the frame structure. Thereafter the interpretation unit forwards the bytes of each one of the TU-12 channels to the dedicated TU interpretation unit, of which there are thus typically 63 in this conventional example. The TU interpretation unit interprets the pointer of each TU-12 channel to determine the phase of the VC-12 signal. The above- mentioned synchronizing unit is described more closely in Finnish Patent Applications No. 922567-922569, which also disclose a solution by means of which 63 parallel interpretation units can be avoided. As the structure of the synchronizing unit does not fall within the scope of the present invention, reference is made to the above-mentioned patent applications for a more detailed description. It should be noted, however, that the method of the invention can be employed in both the known and the new solution which are both disclosed in the above-mentioned applications.

In addition to the synchronizing unit described above, the method of the invention can also be employed in line interfaces of the SDH network, e.g. in a 2 Mbit/s line interface unit, where 2 Mbit/s channels are extracted from the frame structure, or e.g. in an STM-1 interface unit.

The pointer interpretation effected in the receiver can be illustrated according to Figure 6 as a state diagram in which the interpretation equipment of the receiver has three possible main states: the normal state NORM, the alarm state AIS (Alarm Indication Signal), and the above-described LOP (Loss of Pointer) state. In addition, the figure shows a justification state JUST, which is proceeded to when the old pointer value has been replaced by a new pointer value on the basis of received increment or decrement data indicating pointer justification (inc_ind or dec_ind), and an NDF state, which is proceeded to when the old pointer value has been replaced by a new pointer value on the basis of a received new data flag (NDF_enable). Although the justification and NDF state are shown in the figure to be separate from the NORM state, they are in fact sub- states of the NORM state. These substates are left after a certain monitoring period. The present invention relates to the return mechanism R by means of which these substates are left. The return mechanism of the invention can be used irrespective of what kinds of solutions are employed in the other parts of the state diagram as long as a predetermined number of preceding pointers are checked before the pointer value is changed on the basis of increment or decrement data. The other parts of the state diagram can thus employ solutions which fully comply with CCITT Recommendations, or e.g. the solutions which are described below and which differ from CCITT Recommendations in some respects, or e.g. the solutions which are described in the Applicant's earlier Finnish Patent Applications No. 923061 and 923062 and which for the most part are identical with the solutions described below.

The events possible in the above-mentioned main states are thus the result of interpretation of the received pointer and are shown for each state in the following three tables.

As can be seen from the above tables, the above-mentioned bytes HI and H2 (bits 1 to 16) of the pointer can indicate up to seven different events.

The transition of the receiver between the different main states and to another internal state within a main state is controlled in practice by means of counters as defined in the following table. The index (N or 3) at the beginning of the name of the counter indicates the maximum value of the counter. The counters are modulo counters, i.e. when the value reaches its upper limit, the counter starts over again.

When the counter reaches its maximum value, the following operations are performed in the different states:

1. NORM state

- N x NDF_enable: transition to LOP state,

- 3 x new_point: transition to NORM state (change in the offset value),

- N x inv_point: transition to LOP state,

- 3 x AIS ind: transition to AIS state.

2. LOP state

- N x NDF_enable: irrelevant,

- 3 x new_point: transition to NORM state,

- N x inv_point: irrelevant, - 3 x AIS_ind: transition to AIS state.

3. AIS state

- N x NDF_enable: irrelevant,

- 3 x new_point: transition to NORM state, - N x inv_point: transition to LOP state,

- 3 x AIS_ind: irrelevant.

The counter of the new pointer controls the finding of the correct frame synchronization if the pointer value has been changed erroneously. As stated above, the offset values of three successive new pointers must be equal, otherwise the counter of the new pointer is reset. In known methods it most likely takes longer than three frames to find the correct frame syn- chronization. In practice, N has a value of 8 to 10.

If an invalid pointer is received, the counter of the invalid pointer is incremented by one, otherwise the error counter is reset. If the counter of the invalid pointer reaches its maximum value, the LOP state is proceeded to from the normal and alarm state. The treatment of an invalid pointer is disclosed more closely in Finnish Patent Application No. 923061, which is referred to for a more detailed description.

In Figure 6 the transitions described above are indicated by broken lines. Figure 6 also illustrates reception of a single new data flag (together with an acceptable pointer value) in the alarm state, which leads to transition to the normal state NORM. This is the only single event which causes transition from one main state to another.

In addition, Figure 6 illustrates other changes occurring within the normal state. Such changes are (1) reception of increment or decrement data (inc_ind/ dec_ind), and (2) reception of a single new data flag (both of these cause a change in a manner known per se in the offset value in the normal state), and (3) recep¬ tion of an active pointer (active_point). After accepted increment or decrement data the justification state JUST is proceeded to, and after a new data flag the NDF state is proceeded to. Both of these states are substates of the normal state. These substates are left after a certain monitoring period, which will be described below. In the return event, illustrated by arrows R, the previous value can be returned to the pointer. In addition, the figures show some internal changes in the AIS and LOP states.

As pointer interpretation as such does not fall within the scope of the present invention, reference is made in this respect to Finnish Patent Applications No. 923061 and 923062, in which the interpretation process is shown by a flow diagram. In the present invention it is possible to use similar interpretation except that each increment or decrement data is accepted only if the value "new" for the new data flag (NDF_enable), or increment (inc ind) or decrement data (dec ind) has not been received in the three preceding frames. In this respect the invention complies thus with CCITT Recom¬ mendations.

When justification data (decrement or increment data) has been received, the three preceding pointers are checked in a manner known per se before the new value can be accepted. If the value "new" for the new data flag (NDF_enable), or increment (inc_ind) or decrement data (dec_ind) has not been received during the three preceding frames (and if the other criteria are met), justification decision is made, whereby the pointer value is incremented or decremented by one, depending on whether increment or decrement data was received. As a result of the change of the pointer value, the justification state JUST is proceeded to. When the justification decision has been made, the old pointer value is restored according to the invention in the following cases:

1. If two out of the three pointer values following the justification data are exactly the same as the pointer value before the justification data was received, the old pointer value is returned to the active pointer.

2. If the two pointer values following the justification data are exactly the same as the pointer value before the justification data was received, the old pointer value is returned to the active pointer.

3. If none of the three pointers following the received justification data has a new pointer value but two of them have the old pointer value, the old pointer value is returned to the active pointer. This item is identical with item 1 except that according to item 1 one pointer may have a new pointer value.

4. If neither of the two pointers following the received justification data has a new pointer value but one of them has the old pointer value, the old pointer value is returned to the active pointer.

The same return rules are also applied accord¬ ing to the invention if the pointer value has been obtained by means of a new data flag NDF, and the NDF state has been proceeded to. In the case of the new data flag, the old pointer value can be restored only if the state preceding the change of the pointer value was the normal state (all return rules of the invention apply to the normal state).

In the case of pointer justification, the old pointer value is restored by means of an inverse justi¬ fication function, wherefore the old pointer value does not have to be stored as in the case that it has been obtained by means of a new data flag.

The length of the monitoring period during which the frames are monitored after the change of the pointer value is not necessarily three frames. However, periods longer than three frames are not necessarily useful, as it might be slower to find synchronization using such long monitoring periods than in the known manner (three successive new pointers of equal value). It is, however, possible to construct the following general return rules, in which the monitoring period is assumed to have the length of N frames:

A. The old pointer is restored if at least (N- K+l)/2 pointers during the following (N-K) pointers are old pointers. N is here an even number, and K is an odd number, and in addition (N-K)>1. B. The old pointer is restored if at least (N-

K+2)/2 pointers during the following (N-K) pointers are old pointers. N is here an even number, and K is an even number, and in addition (N-K)>1.

C. The old pointer is restored if at least (N- K+2)/2 pointers during the following (N-K) pointers are old pointers. N is here an odd number, and K is an odd number, and in addition (N-K)>1.

D. The old pointer is restored if at least (N- K+l)/2 pointers during the following (N-K) pointers are old pointers. N is here an odd number, and K is an even number, and in addition (N-K)>1.

In the rules set forth above, the parameter K represents the number of the pointers by means of which the acceptance of a new pointer can be expedited. The maximum value selected for K can be N-l; it is, however, advisable that the value for K is a smaller integer value than (N-l)/2.

The rules A to D are shown in the following table with different values for N and K. The most preferable values in view of the present CCITT Recom¬ mendation are underlined.

In the cells of the table, the number to the right of the slash indicates the length of the monitor- ing period, and the number to the left of it indicates the number of the required old pointer values.

When N=3 and K=0, the old pointer can be restored according to rule D when two pointers during the following three pointers are old ones. This is thus consistent with rule 1 given above.

When N=3 and K=l, the old pointer can be

• restored according to rule C when two pointers during the following two pointers are old ones. This is thus consistent with rule 2 given above.

In the solution according to the above table, the decision was based only on the number of old pointer values during the monitoring period. In the return mechanism it is, however, also possible to utilize the number of new pointer values during the monitoring period. According to the invention, the number of new pointer values during the monitoring period is checked at least when the number of old pointer values is exactly half of the number of pointers during the monitoring period. In these cases the return can still be effected if the number of new pointer values is smaller than a certain predetermined number, e.g. smaller than half of the number of pointers during the monitoring period. The rule can also be stricter than this, but the monitoring period must then have the length of at least four frames, as otherwise the number of new pointer values must be zero in order that the return could be effected.

For example, when N=3 and K=l, the old pointer can be restored if one old pointer value, but no new pointer, has been received during the following two pointers. This is thus consistent with rule 4 given above.

Even though the invention has been described above with reference to the examples shown in the attached drawings, it is obvious that the invention is not restricted to them but may be modified in various ways within the inventive idea disclosed above and in the accompanying claims. Even though SDH specific terms have been used above by way of example, the invention is equally applicable e.g. in the corresponding American SONET system or in any other similar system in which the frame structure comprises a predetermined number of bytes of fixed length, and in which the frame structure comprises a pointer indicating the phase of the payload within the frame structure. Nor is it essential for the invention whether other criteria than checking of the preceding frames, e.g. checking of the SS-bits, are used in the acceptance of justification data. Also, the number of frames to be checked before pointer justifica¬ tion may vary if, for example, the recommendations are amended in this respect.

References:

[1] CCITT Blue Book, Recommendation G.709: "Synchronous Multiplexing Structure", May 1990.

[2] SDH - Ny digital hierarki, TELE 2/90.

[3] CCITT Blue Book, Recommendation G.783: "Characteristics of Synchronous Digital Hierarchy (SDH) Multiplexing Equipment Functional Blocks, " August 1990, Annex B.

Claims

Claims :

1. A method for receiving a signal used in syn¬ chronous digital telecommunication system, such as the SDH or SONET system, said signal having a frame struc¬ ture comprising a predetermined number of bytes of fixed length and a pointer indicating the phase of payload within the frame structure, said method comprising pointer interpretation in which the receiver has three possible main states, between which it undergoes trans¬ itions under the control of event counters, the main states being a normal state (NORM), a loss of pointer state (LOP) and an alarm state (AIS), said counters counting predetermined events in each main state, said events comprising reception of decrement data (dec_ind) indicating negative pointer justification, and reception of increment data (inc_ind) indicating positive pointer justification, in the indication of which justification functions I- and D-bits included in the pointer are used, and reception of a new data flag (NDF_enable) indicating a new pointer value, whereby the increment and decrement data and the new data flag indicate that the old pointer value must be replaced by a new pointer value, and whereby a predetermined first number of pre- ceding pointers are checked before the change in the pointer value effected on the basis of increment or decrement data, and the change is effected only if these pointers meet predetermined criteria, c h a r a c ¬ t e r i z e d in that after the old pointer value has been replaced by a new pointer value on the basis of one of the above-mentioned events, a second number of pointers following the change are checked, and the old pointer value is restored if at least half of said second number of pointers following the change have the old pointer value, and that at least in the cases where exactly half of said second number of pointers following the change have the old pointer value, the return is effected only if the number of new pointer values in said second number of pointers is smaller than a certain predetermined third number.

2. A method according to claim 1, c h a r a c ¬ t e r i z e d in that said second number is three pointers, and the old pointer value is restored whenever two out of said three following pointers have the old pointer value.

3. A method according to claim 1, c h a r a c ¬ t e r i z e d in that if the value of the two following pointers is the same as the pointer value before said change, the old pointer value is restored immediately.

4. A method according to claim 1, c h a r a c ¬ t e r i z e d in that said second number is three pointers, and the old pointer value is restored whenever two out of said three following pointers have the old pointer value, and the third pointer value is not said new value.

5. A method according to claim 1, c h a r a c ¬ t e r i z e d in that if the value of one of the two following pointers is the same as the pointer value before said change, and the value of the other pointer is also unequal to said new value, the old pointer value is restored immediately.