FI910865A0 - Foerfarande och anordning foer att detektera ett riktningsord av en ram i en datastroem. - Google Patents
Foerfarande och anordning foer att detektera ett riktningsord av en ram i en datastroem.Info
- Publication number
- FI910865A0 FI910865A0 FI910865A FI910865A FI910865A0 FI 910865 A0 FI910865 A0 FI 910865A0 FI 910865 A FI910865 A FI 910865A FI 910865 A FI910865 A FI 910865A FI 910865 A0 FI910865 A0 FI 910865A0
- Authority
- FI
- Finland
- Prior art keywords
- riktningsord
- datastroem
- ett
- ram
- anordning foer
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0602—Systems characterised by the synchronising information used
- H04J3/0605—Special codes used as synchronising signal
- H04J3/0608—Detectors therefor, e.g. correlators, state machines
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Time-Division Multiplex Systems (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Error Detection And Correction (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB909004188A GB9004188D0 (en) | 1990-02-23 | 1990-02-23 | Method and apparatus for detecting a frame alignment word in a data stream |
Publications (2)
Publication Number | Publication Date |
---|---|
FI910865A0 true FI910865A0 (fi) | 1991-02-22 |
FI910865A FI910865A (fi) | 1991-08-24 |
Family
ID=10671558
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FI910865A FI910865A (fi) | 1990-02-23 | 1991-02-22 | Foerfarande och anordning foer att detektera ett riktningsord av en ram i en datastroem. |
Country Status (9)
Country | Link |
---|---|
US (1) | US5204859A (fi) |
EP (1) | EP0443754A3 (fi) |
JP (1) | JPH04216230A (fi) |
CN (1) | CN1025267C (fi) |
AU (1) | AU635112B2 (fi) |
CA (1) | CA2036545A1 (fi) |
FI (1) | FI910865A (fi) |
GB (2) | GB9004188D0 (fi) |
PT (1) | PT96866A (fi) |
Families Citing this family (31)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6470009B1 (en) | 1990-11-22 | 2002-10-22 | Sprint Communications Company L.P. | Broadband telecommunications system interface |
FR2676879B1 (fr) * | 1991-05-24 | 1994-02-11 | Telecommunicat Radioelect Teleph | Dispositif de surveillance de perte de verrouillage de trame. |
US5544180A (en) * | 1992-06-08 | 1996-08-06 | Qlogic Corporation | Error-tolerant byte synchronization recovery scheme |
SE501884C2 (sv) * | 1993-10-12 | 1995-06-12 | Ellemtel Utvecklings Ab | Synkroniserande kretsarrangemang fastställer gräns mellan konsekutiva paket |
KR970003024B1 (ko) * | 1994-02-28 | 1997-03-13 | 한국전기통신공사 | 병렬처리 패턴매칭을 이용한 가변부호길이에서 고속 재동기방법 |
WO1995031057A1 (en) | 1994-05-05 | 1995-11-16 | Sprint Communications Company, L.P. | Method, system and apparatus for telecommunications control |
GB2293949B (en) * | 1994-10-08 | 1999-05-26 | Plessey Telecomm | Fast serial pattern recognition |
GB2302967B (en) * | 1995-07-03 | 1998-11-11 | Behavior Tech Computer Corp | Switch for computer peripheral device |
GB2320662B (en) * | 1996-12-18 | 2001-06-20 | Dsc Telecom Lp | Apparatus and method of frame aligning information in a wireless telecommunications system |
SE511389C2 (sv) * | 1997-01-21 | 1999-09-20 | Ericsson Telefon Ab L M | Ramlåsning |
US6741594B1 (en) * | 2000-06-15 | 2004-05-25 | Advanced Micro Devices, Inc. | Arrangement for identifying data packet types from multiple protocol formats on a network switch port |
US7111228B1 (en) | 2002-05-07 | 2006-09-19 | Marvell International Ltd. | System and method for performing parity checks in disk storage system |
US7287102B1 (en) | 2003-01-31 | 2007-10-23 | Marvell International Ltd. | System and method for concatenating data |
US7007114B1 (en) * | 2003-01-31 | 2006-02-28 | Qlogic Corporation | System and method for padding data blocks and/or removing padding from data blocks in storage controllers |
US7457903B2 (en) | 2003-03-10 | 2008-11-25 | Marvell International Ltd. | Interrupt controller for processing fast and regular interrupts |
US7039771B1 (en) | 2003-03-10 | 2006-05-02 | Marvell International Ltd. | Method and system for supporting multiple external serial port devices using a serial port controller in embedded disk controllers |
US7064915B1 (en) | 2003-03-10 | 2006-06-20 | Marvell International Ltd. | Method and system for collecting servo field data from programmable devices in embedded disk controllers |
US7870346B2 (en) * | 2003-03-10 | 2011-01-11 | Marvell International Ltd. | Servo controller interface module for embedded disk controllers |
US7099963B2 (en) * | 2003-03-10 | 2006-08-29 | Qlogic Corporation | Method and system for monitoring embedded disk controller components |
US7492545B1 (en) | 2003-03-10 | 2009-02-17 | Marvell International Ltd. | Method and system for automatic time base adjustment for disk drive servo controllers |
US7526691B1 (en) | 2003-10-15 | 2009-04-28 | Marvell International Ltd. | System and method for using TAP controllers |
US7139150B2 (en) * | 2004-02-10 | 2006-11-21 | Marvell International Ltd. | Method and system for head position control in embedded disk drive controllers |
US7120084B2 (en) | 2004-06-14 | 2006-10-10 | Marvell International Ltd. | Integrated memory controller |
US8166217B2 (en) * | 2004-06-28 | 2012-04-24 | Marvell International Ltd. | System and method for reading and writing data using storage controllers |
US8032674B2 (en) * | 2004-07-19 | 2011-10-04 | Marvell International Ltd. | System and method for controlling buffer memory overflow and underflow conditions in storage controllers |
US7757009B2 (en) | 2004-07-19 | 2010-07-13 | Marvell International Ltd. | Storage controllers with dynamic WWN storage modules and methods for managing data and connections between a host and a storage device |
US9201599B2 (en) * | 2004-07-19 | 2015-12-01 | Marvell International Ltd. | System and method for transmitting data in storage controllers |
US7386661B2 (en) | 2004-10-13 | 2008-06-10 | Marvell International Ltd. | Power save module for storage controllers |
US7240267B2 (en) | 2004-11-08 | 2007-07-03 | Marvell International Ltd. | System and method for conducting BIST operations |
US7802026B2 (en) * | 2004-11-15 | 2010-09-21 | Marvell International Ltd. | Method and system for processing frames in storage controllers |
US7609468B2 (en) | 2005-04-06 | 2009-10-27 | Marvell International Ltd. | Method and system for read gate timing control for storage controllers |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1183119B (de) * | 1963-10-15 | 1964-12-10 | Telefunken Patent | Verfahren zur Datenuebertragung, bei dem die Information in einzelnen Bloecken uebertragen wird, deren Anfang durch jeweils vor Blockbeginn am Empfangsort eintreffende Synchronisiersignale gekennzeichnet wird |
FR2476880A1 (fr) * | 1980-02-27 | 1981-08-28 | Ibm France | Procede et dispositif pour multiplexer un signal de donnees et plusieurs signaux secondaires, procede et dispositif de demultiplexage associes, et emetteur-recepteur d'interface en faisant application |
US4358845A (en) * | 1980-03-05 | 1982-11-09 | Societe Anonyme de Telecommunications Company | Process for the compression of signalling data or the like transmitted in a train of multiplexed PCM information |
JPS6083264A (ja) * | 1983-10-14 | 1985-05-11 | Nippon Gakki Seizo Kk | フレ−ム同期したカウンタ回路 |
JPS6251849A (ja) * | 1985-08-30 | 1987-03-06 | Mitsubishi Electric Corp | Pcm通信用後方動作型フレ−ム同期回路 |
JPH0728280B2 (ja) * | 1986-10-17 | 1995-03-29 | 富士通株式会社 | 多重マルチフレ−ム同期検出回路 |
JPS63236432A (ja) * | 1987-03-25 | 1988-10-03 | Fujitsu Ltd | Bsi化ビツトインタリ−ブ多重方式 |
US4835768A (en) * | 1988-04-14 | 1989-05-30 | Bell Communications Research, Inc. | High speed digital signal framer-demultiplexer |
FR2631762B1 (fr) * | 1988-05-18 | 1991-02-15 | Cit Alcatel | Dispositif de synchronisation de trame pour un train numerique synchrone partage en blocs au moyen d'un code par blocs et structure en trames |
US4979169A (en) * | 1989-02-14 | 1990-12-18 | Data General Corporation | Method and apparatus for performing format conversion between bit streams |
-
1990
- 1990-02-23 GB GB909004188A patent/GB9004188D0/en active Pending
-
1991
- 1991-02-11 GB GB9102844A patent/GB2241413B/en not_active Expired - Fee Related
- 1991-02-11 EP EP19910301061 patent/EP0443754A3/en not_active Withdrawn
- 1991-02-13 US US07/654,949 patent/US5204859A/en not_active Expired - Fee Related
- 1991-02-18 CA CA002036545A patent/CA2036545A1/en not_active Abandoned
- 1991-02-20 AU AU71240/91A patent/AU635112B2/en not_active Ceased
- 1991-02-21 JP JP3049058A patent/JPH04216230A/ja active Pending
- 1991-02-22 FI FI910865A patent/FI910865A/fi not_active Application Discontinuation
- 1991-02-23 CN CN91101196A patent/CN1025267C/zh not_active Expired - Fee Related
- 1991-02-25 PT PT96866A patent/PT96866A/pt not_active Application Discontinuation
Also Published As
Publication number | Publication date |
---|---|
CN1025267C (zh) | 1994-06-29 |
GB2241413B (en) | 1994-10-05 |
FI910865A (fi) | 1991-08-24 |
PT96866A (pt) | 1993-01-29 |
JPH04216230A (ja) | 1992-08-06 |
EP0443754A3 (en) | 1992-04-01 |
AU7124091A (en) | 1991-08-29 |
US5204859A (en) | 1993-04-20 |
CA2036545A1 (en) | 1991-08-24 |
GB9004188D0 (en) | 1990-04-18 |
CN1054344A (zh) | 1991-09-04 |
GB9102844D0 (en) | 1991-03-27 |
EP0443754A2 (en) | 1991-08-28 |
AU635112B2 (en) | 1993-03-11 |
GB2241413A (en) | 1991-08-28 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
FD | Application lapsed |