FI65863C - FILTER ANORDER IN PULSDOPPLERRADAR - Google Patents

Description

65863 the period time, the receiver corresponds to emit a pulsed signal, the son is sinusoidal, the radulating magnitude having a frequency equal to the doppler frequency fd. In addition, the received signal contains frequency components that originate from unwanted targets, so the recorded signal will not be purely sinusoidal.

The signal received and mixed in the receiver will thus contain a number of desired and undesired frequency components.

It is previously known to provide filters (so-called doppler filters) in a receiver for pulse Doppler radar, the task of which is to suppress as much as possible the frequency components that originate from undesired targets, ie. primarily from the ground, lake and precipitation here with regard to low-frequency components. The Doppler filter can consist of a digital filter, which filters out those components whose frequency is less than a certain value corresponding to a certain melting rate. Such a Doppler filter has within the frequency band determined by the radar transmitter's period time T a certain characteristic, as indicated in the attached figure 1 with dashed lines. In this case, it is desirable that for low frequencies, for example less than 1 / 8T, the filter exhibit blocking characteristics, while for higher frequency values the filter exhibits bandpass character, whereby any moving targets whose radial velocity is greater than the clutter speeds can be detected. However, the usefulness of the Doppler filter is limited by the size of its latching band. For example, if the upper limit frequency of the filter barrier band fmax 1 / 8T and if the period time T of the radar pulses is lowered by the desired range Rmax, then T = 2Rmax / c, where c = propagation speed, and the highest clutter speed within the filter barrier path becomes frex = Λ c / 16Rmax, where λ = radar path length. For example, - \ 4 Λ = ldm (S-band) and Rmax = 10.10 m, vmax becomes 2m / s, which means that only ground dots can be suppressed by the filter, while remaining dots with higher frequency components remain unaffected.

In case the radar operates in low PRE mode, ie. the period time T is adjusted so that all radar echoes of interest are reflected and received before the next radar pulse is emitted, this means that the target's doppler frequency fd may be greater than pulse repetition frequency 1 / T. This, in turn, as shown in Figure 1, means that even the measurement quota can be suppressed by the doppler filter for some so-called blind speeds, in particular for those speeds which give a Doppler frequency which is a multiple of the frequency 1 / T. It is known to avoid suppression of such measuring cones by introducing staggering, ie. the period time T is caused to vary from a pulse to a next of the transmitted radar pulses.

Another known method of eliminating the undesirable clutter spectrum is to perform rate compensation before filtration in the doppler filter. This means that the doodle velocity is estimated, for example by phase measurement, during successive sweeps. For example, by controlling the receiver's local oscillator, the scattering spectra can be displaced such that its dominant component assumes the path zero and thus becomes located within the filter barrier band. However, the method assumes that the Doodle Spectrum has a dominant component that can be correctly estimated.

The present invention is based on this method known per se, but has the additional advantage that, by estimating the velocity of the movable scepter after filtering the screed, this scribe does not corroborate the estimation.

The object of the present invention is to provide a Doppler filter device included in the receiver of a pulse Doppler radar by means of which the filtering of both low frequency land and sea scopes as well as filtering of remaining scribbles with higher Doppler frequency can be carried out using digital filters of their own kind. .

The invention, the features of which are set forth in the following patent claims, will be described in more detail with reference to the accompanying drawings.

Figure 1 shows a frequency diagram illustrating partly the frequency spectrum of a received radar signal and partly a selected filter characteristic.

Figure 2 shows, for purposes of explanation, a block diagram of units in a radar receiver incorporating units which precede the Doppler filter device according to the invention.

Fig. 3 shows in the form of a block diagram the principle of the doppler filter device according to the invention.

Figure 4 shows in greater detail the appearance of a digital filter known per se in the device of Figure 3.

65863

Figure 5 shows a block diagram of one embodiment of the doppler filter device according to the invention.

In the frequency diagram of Figure 1, a scattering spectrum is shown, as well as the spectrum of an incoming measuring echo at a certain distance from the radar. The filter characteristics of a digital filter included in the doppler filter device are indicated by dashed lines and indicate blocking bands for low frequencies, for example for frequencies 1 / 8T and partly for frequencies between 7 / 8T and 1 / T and between a passband. The filter characteristic is then periodic with a period 1 / T. The spectrum of the desired target is denoted s and the movable scribble has a dominant spectrum sD whose mean frequency is denoted fD. The Doppler filter, the structure of which will be explained in more detail in connection with Figures 4 and 5, is thereby tasked to suppress partly the soil scat spectra sg and partly the spectra sm of the dominant movable scrub mainly derived from rainfall (rain and snow).

In order to better illustrate the signal processing and construction of the filter device according to the invention, the units preceding the filter device will first be described in more detail in connection with Figure 2. above the input A, a signal A (t) = cos / 2 11 (fo + fd) t + in £ 7 appears from the radar receiver's SM changer. The frequency fd is the doppler frequency for the desired target. The signal A (t) is applied to two channels, I and Q, each containing a mixer B1 and B2, respectively, an analog-to-digital converter AD1 and AD2 respectively. To each mixer B1, B2 a reference signal cos 2 feet resnective is applied to its 2 <fotί feet from a reference oscillator OSC in the receiver. In this case, the outputs cos (2 x Thp + + P) and sin (2 h + + P), respectively, are obtained, which are supplied to each analog-to-digital converter ADI, AD2. In these converters, the signals are sampled at the sampling times tn by clock pulses from a clock circuit CL such that the outputs:

Xj = cos (2 'll · * fdtn + (f)

Xq = sin (2 ^ 1 ^ fdtn + ^ P) in respective channels I and o is obtained.

The signals X (tn) and Xq (tn) can both be represented by the signal X (tn) = e j2 <1 ^ fdtn, = 0

The sampling times can occur so that regular sampling is carried out, ie. tn = nT (n = 1, 2, 3, ...) or also the time between successive sampling pulses varies within a certain time interval NT, but such sampling patterns occur after the sampling time tn = NT, so. staggering. In the latter case, sampling occurs at the times \> NT + tk, where v> = 0.1 ... and k = 0.1,: ..., N-l.

The principle of the doppler filter device according to the invention is made clear by the block diagram of Figure 3. The filter device contains a first digital filter DF1 of a type known per se, preferably a transversal filter, which is dimensioned si. that it eliminates land and sea grains, ie. low speed doodles, compare the filter characteristic of Figure 1. Since the filter characteristic of a digital filter is periodic with a period equal to the inverse value of the sampling frequency, the blocking band returns at frequencies corresponding to certain higher speeds and occurs periodically if regular sampling is present. In the event that the sampling frequency varies (staggering), the characteristics of filters DF1 are irregular and a somewhat determined position on its blocking band cannot be determined except for very low frequencies corresponding to the ground and sea scribbles. Thus, in this latter case, the filter DF1 cannot generally be dimensioned so that very low velocity (land and lake) scribbles and higher velocity scribbles can be filtered away at a time. The filter input signal is designated (tn) and its output y2 (tn).

At the output of the filter DF1, the block HK is connected, the structure of which will be described in more detail in connection with Figure 5. The block HK performs an estimation of the doodle remaining after filtering in the first filter DF1 and performs a speed compensation of the average frequency fm of the dominant clutter spectrum.

This compensation means that all frequency components in the input signal y · (tn) are moved in frequency so that the remaining movable scrambler falls below a certain threshold frequency, for example below the value 1 / 8T in the diagram according to figure 1. The subsequent digital filter DF2 connected to the block HK is dimensioned according to the same principle as the first filter DF1, which is dimensioned so that its blocking band coincides with the scribbles whose frequencies have low value (land and scribbles). As a result, the sizing problem of the second filter DF2 has been transformed into staggering into the relatively simple sizing problem applicable to the first filter DF1, by using staggering. The filter DF2 or 6 65863 N, thus, mines the remaining movable grape (precipitation) and the only condition is that the remaining grape has a dominant spectral space whose average frequency fm can be estimated in block HK.

Each filter DF1, DF2 is constituted by a digital filter of the appearance known per se shown in Figure 4. The filter according to Figure 4 contains a number of delay circuits, for example three circuits DL1-DL3, each with the delay time T = radar pulses. The output of each delay circuit is connected to a multiplier MU0-MU3 with the coefficients LO (n), LI (n), L2 (n), and L3 (n) of the filter DF1 and with the coefficients KQ (n), K n), K2 (n), K3 (n) for the filter DF2, where index (n) indicates that the values of the coefficients may vary for different sampling times tn. All multiplier outputs are connected to an ADD circuit. In the future, only the case of staggering is considered where the time interval between two successive sampling pulses varies according to what has been mentioned above. The case of regular sampling is a special case where tn = nT.

The speed compensation proposed by the inventive idea of the output signal γ ^ (tn) from the filter DF1 is first described in terms of signal, after which a suitable embodiment of the block HK and the subsequent filter DF2 (Figure 3) will be described in more detail in connection with Figure 5.

In staggering, the time varies between successive sampling pulses, but variations are periodic with the period NT, which means that the filter characteristics of the filters DF1, DF2 are repeated after the time points NT, 2NT .... If the signals to the filter DF1 are x ^ (tn) = not2'JTfd (VNT + tn), the output of the filter DF1: yl (tn) = ri 1 ((η) (vm * Vi) = ho now where rl = the number of delay circuits in the filter DF1.

Thus, in this case, the amplitude and phase of the output signal y ^ (tn), represented by the factor Cn (fd), is time dependent.

The velocity compensation means to be divided by the signal C (f) i2 ΊΥ f (- ^ N + n) T where f is the result of a 3 n m e m m measurement of the average frequency spectrum fd after filter DF1. thus:

*, (t) = C ". (r <,) - o - f„) f '"' *») T

2 n c (f)

The output of filter ΠΙ · '2 is given by x, (g - r2 k Vi <ftt) (fd - i) (VN + n) T • e where r2 = the number of delay circuits in the filter DF2.

From the expressions of γ ((tn), ((tn) and y £ (tn), it is stated that a) on the doppler frequency fd 0, the signal can be eliminated in the first filter DF1, since Cn (fd) Li * n * can be made = 0.

i = 0 b) if the doppler frequency fd £ 0 and correct estimation of this frequency of the dominant scat spectra were performed in the block HK ie. fm ^ fd, the input signal to the filter becomes DF2 ^ (tn) = not2 ^ ΤΊΤ * (fd-fm) (0 N + n) T, which represents a low frequency signal and which can be filtered out in the filter DF2 in the same way as the signal no2 fdtn was filtered off in the filter DF1 for fd n> & 0.

For calculating the filter coefficients Li Li and JB, requirements are set for the outputs y y (tn) and y2 (tn): y ^ (tn) 0 0 where the input is constituted by ground balls, ie. f «* O. In particular, it is required that (tn) = 0 for fd = ^ fR, K = 1, ... r ^. A f R is selected within the frequency range of the narcotic spectrum. This requirement can be met by selecting

Cn (AfK) = 0 K = 1, ...

n = 1, ... N

65863 ie filter 1 eliminates the soil scab. The equation C (Afk) = 0 leads to the following equation system for calculating the filter coefficients L ^ "ri r-j VT (n) e-j2 11 AfK <nT-tn-l> = 0 i = 0

If selected symmetrically around the frequency 0, the above IV / varaband leads to real time-dependent coefficients ln.

The Y2 (tn) dA input is comprised of movable doodles of frequency f The mean frequency of the scribble is measured to f ^ P ^ f ^. In particular, it is required that y2 (tn) = 0 for fd-fm = ^ fR, K = l, ... r2 · £ fR is chosen so that fm + £ f ^ falls within the frequency range of the movable scramble. This leads to the equation system: v (n) Cn-1 {fm + 6 fK) „1 7-77 -j2 n, 5fK.iT = ok = i, ... r2 1 = 0 n-1 'm' e * for determination of the filter coefficients.

Figure 5 shows a block diagram of one embodiment of block HK according to Figure 3 to coincide with Astadkorana velocity corrosion with the additional filters DF1, DF2. The expression for x2 (tn) as above shows that the compensation is signalally performed by dividing the output signal y1 (tn) from the filter DF1 by the factor Cn (fm) not2 fm (\) N + n) Tf where fm represents an estimated value of the mean. frequency of the dominant spectrum sd of the movable scribe. From the filter DF1 f As a signal Re £ y (tn) J) · over the I channel and a signal Ira £ y ^ (tn) J across the Q channel. To each channel I and o is connected a phase rectifier circuit for measuring the phase difference £ cornelian two on each other successive and filtered sarapels. This is done in a known manner by first measuring the two components of the sarapel value in the I and Q channels, whereby a value of the phase angle ψΐ relative to a certain reference is obtained. Then the phase angle ψ2 65863 for the next sample value is measured in a special way and the difference = Ψ2 ~ if1 is formed · For each stagger sequence tn, sample values are obtained, which give a sequence of phase differences between two successive and filtered samples y ((tn) . This sequence is added to an accumulator S for the received phase difference values over the time period NT, corresponding to a complete stagger sequence. The accumulator is known per se and can consist of, for example, a feedback coupler.

With M1 and M2, two memory units are denoted, for example, PROM (programmable read-only-memory) memory. The memory M1 is a matrix in which the values of the coefficients Cn (fm) are recorded for different values of the phase difference ΔA and for the different values of tn in the stagger sequence. Thus, for each value pair tn, a certain value of the coefficients Cn (fm) is obtained since fm is calculated from the value of AtP = 2 ίϊ T. f where T is known.

The memory unit M2 is a matrix in the form of a PROM in which the sine and cosine values of different angles are listed, which angles are obtained from accumulation S. The memory unit M1 has only one output above which the value 1 / | Cn (fm) | occurs but two inputs over which the input value Δ and clock pulses cl, respectively, the latter at sample times tn within each interval * \) NT. The memory unit M2 has an I and a Q output over which the values - sin (p and cos Jp, respectively, appear where the accumulated phase is. A multiplier MU is connected to both outputs of the unit M2 and to the output of the unit M1 for multiplying the factor 1 / j Cn (fm) (with the sine and cosine values of the accumulated phase jp. Thus, at the I and Q outputs of the multiplier MU, both the components of the components and cos.-fL are obtained, which are required to form | Cn (fm) / | Cn (fm) / the complex value --- -j2 'Ϊϊ' fm (\) NT + tn).

Cn (fm) e

According to the signal description above, the factor Cn (fd) applies. i2 fd (0 NT + tn) must be multiplied by the factor 6

1 / "'VJ V

-. -j2 11 fm (VNT + tn) for the speed compensation.

Cn (fm) 65,863

The complex multiplier MK connected to the output of the filter DF1 and the multiplier MU performs this complex multiplication in its own way, since the I and Q components of the complex factors are available as signal values over the respective channel. over the I and Q outputs of the multiplier MK, corresponding signal components are thus attached at: C (f.) \

Xjitn) * -. ej2 rll (fd - fm) (yNT + tn), compare above.

C (f) n m

Filter DF2 consists of a digital transversal filter DF4 of such structure as shown in Figure 4. In order to achieve good clutter suppression in the entire velocity range, it is generally necessary to select different filter coefficients K 1 for different measured frequencies fm. The filter coefficients K ^ are thereby determined from the relationship above. The tili multipliers input to the filter DF4 are therefore connected to a memory MF, for example in the form of a PROM in which the coefficients K n for each value on and for each time tn are fixed in matrix form. Therefore, the memory MF is connected to the output of the phase measuring circuit FK above which the value of Δ occurs, with the sinew-bed control inputs, and partly to the clock pulse generator not shown, which generates the clock pulses cl in step with the stagger sequence tn (within each interval λ? ΝΤ). The values of the coefficients K ^ depending on A ^ and tn are given to the multipliers input to the filter DF4 and over the outputs I and Q of the filter the quadrature components of the desired filtered signal y2 (tn) are obtained.

The filters DF1, DF2 are constructed as mentioned above as shown in Figure 4. However, this figure shows only the structure of a channel, for example the I-channel and the multipliers MUO-MU2 multiply the signal components of x. (Tn), x ~ ( tn) in this channel with corresponding components of the coefficients', K Corresponding filter circuits exist in the second channel Q and at the complex multiplication in the multipliers MUO-MU2, the values in the I and Q channels are mixed. The filters DF1, DF2 have for a given order (determined by the number of delay circuits DL1-DL3) a given passband, the width of which is known in the known way can be expanded by selecting higher order filters.

Claims (3)

A filter device for a pulsed doppler radar receiver for reducing harmful interference signals ("small") within a certain lower and a certain upper speed range of a received target echo, the echo being a response from radar at an irregular pulse repetition frequency ("staggering") to a second digital filter, wherein the cut-off frequency of the first filter between the pass and block is selected so that the interference signals within the lower speed range hit the block of the first filter, but the desired target echo signal is in its pass band, the circuit device (HK) being connected to the first to evaluate the dominant frequency component (fn) of the interference signals in the upper speed range of the output side of the filter and to perform the frequency transfer of the interference signals filtered out of the first filter (DF1) so that the interference of the interference signals in the upper speed range the center frequency of the signals assumes a value lower than the value before said transmission, the output arrow of the circuit device being connected to the input side of the second digital filter (DF2), the blocking band of which substantially coincides with the low frequency blocking band of the first filter (DF1) to suppress interference signals. A filter device according to claim 1, characterized in that said circuit device (HK) comprises a phase measurement circuit (FK) for determining a series of phase differences (Δ0η) within each series of transmitted radar pulses with two consecutive sampling values filtered in the first filter. a first memory unit (M1) forming an inverted value of coefficients (Cn) equal to the sampling values of the output signal (yl (tn)) from the first filter corresponding to a certain phase difference, a multiplier circuit (MK) connected to the first and a second filter (DF1, DF2) and said memory unit (M1) for multiplying the output signal by said inverted value, and a second memory unit (MF) connected to said phase measurement circuit