FI111888B - An adaptive method and system for implementing gradual redundancy at the reception - Google Patents

Abstract

A method and an arrangement are presented for processing received data blocks in a digital radio receiver. Received data blocks are equalized ( 306 ) and channel decoded, ( 309 ) after which they are checked ( 310 ) for errors. Additionally there is monitored ( 303 ) the amount of received but not yet equalized and channel decoded data. As a response to a finding indicating that an equalized and channel decoded data block contains errors ( 310 ), it is checked ( 313 ) whether the amount of received but not yet equalized and channel decoded data is below a certain threshold. As a response to a finding indicating that the amount of received but not yet equalized and channel decoded data is below said threshold, the data block which was found to contain errors is iteratively equalized and channel decoded. By adaptively allowing iterative equalization and channel decoding, retransmissions may be avoided.

Description

111888

ADAPTABLE METHOD AND SYSTEM FOR IMPLEMENTING GRADUAL REDUNDANCE IN RECEPTION - In general, the invention relates to a technique for improving the ability of a digital wireless receiver to correctly reconstruct the data content of a received data block. In particular, the invention relates to a technique which only adaptively implements a gradual redundancy in a received data block to allow reconstruction of its data content.

Many digital radio systems use sophisticated rigidity, including acknowledgments and retransmissions, to allow the receiver to reconstruct the data content of each received data block correctly. This is particularly true for packet switched radio connections used for transmitting non-real-time services, as the capability for unpredictable retransmissions fits well into the strict scheduling requirements of real-time services. Retransmission means that the receiver in one way or another informs the transmitter that the data block has not been received in a good enough format, in which case the transmitter must retransmit at least part of it.

Re-transmitting the same data multiple times consumes transmission time and bandwidth. 20 widths that multiple user systems, such as cellular radio networks, have

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.marginally. Gradual redundancy usually means that the transmitter is trying to find and! Ä-. ···. transmits the smallest portion of previously transmitted information sufficient to allow the receiver to perform the reconstruction of the information content. Monet ;;; known systems of gradual redundancy are based on the fact that the first version of the transmitted data block is punctured, i.e. deliberately omitting a predefined bit group during the transmission phase. If the reception conditions are good, the receiver is able to use the remaining parts of the data block to fill the punctured apertures. If the first round of decoding fails, the receiver. *. ·. also asks the transmitter to provide some originally punctured bits.

• · * ... '30 Gradual redundancy arrangements also have their drawbacks. Although the limited retransmissions are much smaller in bits than the fully retransmitted blocks, they still consume radio resources. Re-transmissions, whether complete or partial, will inevitably cause a delay because the receiver must respond to a failed decoding attempt and find a timed turn to request a re-transmission, and the transmitter must also receive, decode and respond to the request and wait for the next appropriate time.

It is an object of the present invention to provide a method and arrangement for efficient use of transmission and reception resources in a radio system in which retransmission is possible.

The objects of the invention are achieved by providing the receiver with a receive buffer, an iterative decoder and a decision-making means arranged to evaluate the fill ratio of the receive buffer when deciding whether to iterate the received da-10 or request a retransmission.

The method according to the invention is characterized in that it comprises the following steps: - monitoring the amount of received but not yet equalized and channel decoded data, - checking whether the received and not decoded data block 15 contains errors, checking whether the received but not yet equalized data block and, the amount of channel-decoded data at a certain threshold and in response to the observation indicating that the amount of received but not yet equalized and channel-decoded data falls below said threshold, the data block that is found to contain errors is equalized and channel-decoded.

The invention also relates to a radio receiver having an equalizer, a channel decoder and an error detector connected in a receiver chain to a Saija; the radio receiver is • · * ·. ···. characterized in that it has a decision-making body connected to said error detector. · ". Time, which is configured by the decision-making body to perform the following tasks: - monitor the amount of received but not equalized or channel decoded data 25, - in response to an error detector detection indicating that the equalized and channel * decoded data block contains errors but not '...: the amount of yet-equalized and channel-decoded data at a certain threshold, and in response to an observation indicating that the number of received but not yet equalized • ·. ···. 30 and channel-decoded data is below said threshold to initiate iterative equalization and channel decoding for the data block that has been found to contain errors.

The concepts of iterative equalization and decoding are known per se, for example, in A. Picart, P. Didier, and A. Glavieux: '' Turbo Detection: A New Approach 3 ', ICC 97, or G. Bauch and V. Franz. : "Iterative Equalizing and Decoding for the GSM System", Vehicular Technology Conference (VTC), IEEE, May 1998. Said publications are incorporated herein by reference. Iterative equalization and decoding means that the decoding decisions of a given 5 decoding round are fed back as a kind of preliminary information to a new signal processing round by which the same digital data block is equalized and decoded.

According to the invention, the received digital data is temporarily stored in a receive buffer. The data block from the buffer is equalized and decoded; process 10 also requires a deinterleaving step if interleaving is used at the transmitting end, whereby initially adjacent bits are spread according to a particular interleaving sequence. After decoding, the receiver calculates a checksum or uses another feature of the decoded data to determine if it contains errors. If errors are found, the decision-making body of the receiver is able to obtain decoding decisions from the decoder and feed them back into the equalizers for an iterative equalization and decoding round. In making its decision, the decision-making body evaluates the fill ratio of the receive buffer to determine if there is sufficient time remaining to perform an iterative equalization and decoding round. If it appears that the receive buffer is over a certain limit, the decision-making body will suppress the new 20 iterative decoding of the same data block and instead request retransmission or announce data. ' · ': Block defective if retransmissions cannot be made.

«· · **; The novel inventive features of the invention which are considered to be characteristic thereof are different; specifically disclosed in the following claims. The invention itself, as well as its structure and modalities, as well as other objects and advantages thereof, will be best apparent from the following description of the preferred embodiments, and from the accompanying drawings.

Figure 1 illustrates a signal processing according to a preferred embodiment of the invention; FIG. 2 illustrates a radio transceiver according to a preferred embodiment of the invention and FIG. 3 illustrates a method according to a preferred embodiment of the invention.

'·' FIG. 1 illustrates a signal processing principle according to which a received signal is directed to buffer memory 101 for temporary storage. The stored signal it- ': As such, the portion to be decoded, referred to herein as the block, is supplied to an equalizer and channel decoder unit 102 capable of performing iterative equalization-35 ninja decoding. The first round through unit 102 does not include iteration 4111888 in the hope that the first equalization and decoding attempt will result in an error-free block of decoded digital information. To check for the presence of errors, the output of the equalizer and channel decoder unit 102 is taken to an error detection unit 103. The latter may be, for example, a known Cyclic Redundancy Check CRC which calculates a checksum and compares it with a corresponding checksum value included in the received data block. If it is found that the decoded digital data block is free from errors, it can be transferred to the application for which it is intended.

However, the arrangement also includes a monitoring unit 104 which is coupled to the pus-10 choke memory 101 to monitor its fill ratio and the error detection unit 103 to examine whether the decoded digital data block contains errors. If the monitoring unit 104 learns from the error detection unit that the decoded digital data block contains errors, it checks the current fill level of the buffer memory 101. If the buffer memory 101 is empty or nearly empty, the unit 102 has sufficient time for at least one to 15 iteration rounds before the new received data block is read from the buffer memory 101. In such a case, the control unit instructs the equalizer and channel decoder unit 102 to treat the previously received decoding decisions (or subsets thereof according to the principles of a suitable iterative equalization and decoding system) as "equalizing and decoding" the input and decoding data supplied to the equalizer step.

In a situation where the unit 103 detects errors, it may also happen that the buffer memory 101 is found to be full to a predetermined limit. In that case - * ;;; In an attempt to iteratively equalize and decode the previously received data block, it would cause an unauthorized delay in reading the next block from the buffer memory, whereby a new iteration of the previously received block must be prevented. To enable error correction, the monitoring unit 104 may initiate a retransmission request for a block that the receiver has not been able to correctly equalize and decode.

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Figure 2 shows a radio transceiver according to a preferred embodiment of the invention: 30 receivers. Antenna 201 is coupled to duplexer 202 to separate received signals from transmitters. The output of the receiving branch of the duplexer 202 is coupled to the receiver block 203, where various components such as amplifiers, filters and A / D converters are installed in a manner known per se. The output of the receiver block 203 consists of digital samples representing the received sig-35 signal in unequalized and non-decoded form.

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The output of the receiver block 203 is coupled to the input of a FIFO (First In - First Out) receive buffer 204, which is capable of storing a certain number of samples at a time. The optimal dimensioning of the buffer 204 will be considered below. The buffer 204 also includes a control output from which the buffer fill ratio can be read. The data output of buffer 5 204 is coupled to equalizer 205, from which the path of received data continues through deinterleaver 206, decoder 207 and error detection unit 208 to data sink 209. Output from decoder 207 is also provided to re-interleaver 210 which in turn is connected to auxiliary input 205. As a whole, a loop comprising an equalizer, a deinterleaver 206, a decoder 207 and a post-10 feed back connection to the equalizer 205 via the re-interleaver 210 forms a so-called turbo equalizer 205 '.

Supervision connections are provided from the error detection unit 208 and the receive buffer 204 to the decision body 211 having control outputs to the re-interleaver 210 and the retransmission request generator 212. The transceiver 21 a transmitter block 215, which is provided in a known manner with the necessary means for converting the digital bitstream into modulated radio frequency oscillation. The output of the transmitter block 215 is connected to the input of the transmit branch of the duplexer 202.

·. ·. Figure 3 illustrates an exemplary operation of the radio transceiver shown in Figure 2. The reception of the radio signals and their conversion into stored digital samples takes place in a loop comprising steps 301 and 302. This *; | the reception loop rotation schedule is determined by the transmission time used by the radio subsystem in question, so that, conceptually, the reception loop can be considered as almost a separate unit relative to signal processing operations aimed at equalizing and decoding the received signals. The RX pus memory 204 shown in Fig. 2 serves as an aid in exchanging information between the receive loop and the ex-: · *: selection and channel decoding processes. The buffering memory fill-in-* '': generation step is shown in Figure 3 as step 303.

»I · • · v 30 In step 304, a number of samples are read from the RX buffer memory. In the most common case, the samples represent a new, equalizable and channel decodable data block.

| ·, However, step 305 checks whether this is the case or if the samples are complementary to the processing of a previous block whose equalization and channel decoding has proved impossible without retransmission. Samples of the newly read block 35 are controlled. further to the equalization step 306, while the complementary samples of any preceding block are combined with the previous 6111888 samples of said block at step 307. The invention does not limit the selection of the merge strategy, and in some cases it may be wise to request a complete retransmission of the seriously damaged data block the previous sample group will be replaced by fresh, new samples.

The equalization, de-interleaving and decoding cycle consists of steps 306, 308 and 309. In step 310, the channel-decoded block obtained from step 309 is subjected to error checking. Ideally, no errors are found so that the block can be printed in step 311, after which the receiver returns to step 304 (it should be noted that the loop consisting of steps 301 and 302 has rotated independently 10 all the time). If errors are found in step 310, proceed to step 312 to check how many iteration rounds have already been performed on the same data. Iterative equalization and decoding procedures tend to be oriented towards a particular result after relatively few iteration rounds, so it may be advantageous to set an upper limit on the number of allowed iteration rounds.

The requirement of error-freeness can be somewhat generalized by stating that the error rate detected in the equalized and channel-decoded data block must fall below a certain threshold.

Assuming the number of iterations already completed in step 312 is. . upon reaching the allowable limit, the receiver checks, in steps 313, the current RX buffer:; * 20 its fill ratio. Even if the buffer is not full up to the threshold, some of the buffers will be • «« ··; ' I created new iterations are not allowed, it may be advantageous to check other existing time limits; this is done in step 314.

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:: after the second decision, the receiver allows the most recent decoding decisions to be interleaved in step 315. The results obtained are input as an input to a new equal: *: 25 ring and decode cycle starting at step 306.

. If, at step 312, it is found that the number of allowed iteration turns is

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or, if the receive buffer is found to be sufficiently full in step 313, or »· ·; · * if any other time limit is reached in step 314, proceed to step 316, where Y: The receiver checks if retransmissions are allowed. The permissibility of retransmissions is usually a feature of the radio carrier used for digital data transmission. block transfer. If retransmissions are allowed, the retransmission request initiates * * · '··' in step 317. Otherwise, the block detected as invalid is invalidated in step 318. In any case, the receiver returns to step 304 to continue processing the received information.

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The selection of decision criteria described in steps 312, 313 and 314 can be simplified from that shown in Figure 3. For example, the receiver may confine itself to monitoring the fill ratio of the receive buffer and omit any checks on the allowed number of iterations or the time remaining. Alternatively, checking the remaining time can be used as the only criterion, especially if the transmission rate is known to be constant so that the time elapsed since a certain block is read from the receive buffer always corresponds to the fill buffer fill ratio. Also, the maximum number of iterations can be used as the sole decision criterion, provided it can be guaranteed that the receiver will always be able to execute a maximum of 10 iterations in less time than a predetermined maximum.

However, other decision-making criteria may be applied. For example, if the error detection arrangement allows the number of errors to be detected, the receiver may check whether a particular iteration cycle has caused the number to decrease. If the number of errors remains the same despite successive iterations, it is no longer advisable to continue iteration 15 even though timing or other limits still allow for another iteration round.

The format in which the decoding decisions are fed back through the re-interleaving process into the equalization process deserves closer examination. In the error detection step, the original block consisting of plural digital samples must be converted to so-called hard decisions, which means that each bit; the value can only be exactly 0 or exactly 1. However, up to the very last stages of channel decoding, the soft decision principle can be applied, whereby ··· each bit value is represented by the mere probability that it is either 0 or 1. ···. does not determine whether to return to the iterative equalization and channel decoding process. · · ·, 25 soft or hard decisions, although in many cases, returning soft decisions will yield better results.

• · • · ·

The above description does not specify how the critical threshold of the receive buffer *: ··: fill ratio should be defined. The invention does not require an explicit definition, since the criticality of the fill ratio depends on both the processing capacity of the equalization and channel 30 coding loops and the maximum delay allowed in processing received packets. If the equalization and channel decoding loop is very fast, a relatively large portion of the following data block may be allowed to be stored in the buffer, and if the delay does not cause problems, the buffer may be waiting ·: ··· up to several data blocks while the equalization and channel decoding loop 35 to reconstruct a particularly seriously damaged data block. In practical communication situations, particularly so-called third generation digital 8111888 cellular networks, it may well be that each radio carrier has its own, individually defined delay limits, so that it is advantageous to dynamically change the critical threshold of the receive buffer fill ratio. In the light of prior art at the date of priority of the present application, it can be estimated that if no more than four new data blocks can accumulate in the receive buffer before the iteration of the previous data block is prevented, the method of the invention does not cause additional delays in continuous reception and processing.

There are many different methods for monitoring the buffer memory fill rate. The invention in no way limits the choice of method.

Aspects of the invention disclosed in the dependent claims may be freely combined, unless expressly stated otherwise.

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Claims (11)

111888 A method for processing received data blocks in a digital radio receiver, the method comprising the steps of: - Equalizing (306) and channel decoding (309) the received data block; and 5. Checking (310) for errors in the equalized and channel decoded data block. the steps of: - monitoring (303) the amount of received but not yet equalized and channel decoded data, 10. in response to the observation indicating that the equalized and channel decoded data block contains errors (310), checking (313) whether the received but not yet equalized and the amount of channel-decoded data at a certain threshold and in response to the observation indicating that the amount of received but not yet equalized and channel-decoded data is below said threshold, the data block that is found to contain errors is equalized and channel-decoded iteratively. 2. The method of claim 1, further comprising the step of temporarily storing (302) data belonging to the received data blocks in a buffer memory before the data blocks are equalized and channel decoded, such that the step of monitoring (303) the received but not equalized and channel the amount of decoded data includes a sub-step controlling the fill ratio of said buffer memory. «·» A method according to claim 1, characterized in that the step of monitoring received but not equalized or channel decoded data ;;; includes a sub-step of measuring the time elapsed between the equalization and the channel decoding of the currently added and channel decodable block. The method according to claim 1, characterized in that in the step, if. ··. to iteratively equalize and channel decode the data block that has been found to contain errors, there are the following sub-steps: v: after each iterative equalization and channel decoding round, it is checked (303) whether iteratively equalized and channel decoded data block. mistakes and, '. ': - in response to the observation that the number of errors detected in an iteratively equalized and channel coded data block is below a certain threshold, the barrier ·· 355 new iterative rounds for the same data block. 111888 The method according to claim 4, characterized in that, in addition to the step of iteratively equalizing and channel decoding the data block that has been found to contain errors, the method has the following sub-steps: - calculating (312) the number of iterative equalization and channel decoding rounds of the data block; in response to the number of iterative equalization and channel decoding rounds of the data block reaching a certain limit, new iterative rounds of the same data block are prevented. The method of claim 4, characterized in that the step of 10 iteratively equalizing and channel decoding the data block that has been found to contain errors further comprises the following sub-steps: - after each iterative equalization and channel decoding step, it is checked (314) whether a certain time limit and - in response to the finding that said time limit does not allow new iteration, preventing new iteration rounds for the same data block. A method according to claim 4, characterized by the steps of: - examining (316) whether retransmissions are allowed for data blocks whose detected error does not fall below said threshold, and starting (317) in response to the finding that retransmissions are allowed. • ·: A retransmission request for the data block whose detected error does not fall below the specified threshold. • M A method according to claim 1, characterized in that it has a step, ';;; wherein the data block is deinterleaved (308) between the equalization and channel decoding, and that in the step of iteratively equalizing and channel decoding the data block which is found to contain errors is a sub-phase that is re-interleaving (315). ) those parts of the data block that are fed back to the equalization as part of the iteration process. • A radio receiver having a equalizer 30 (102, 205), a channel decoder (207) and an error detector (103, 208) connected in series in a receiver chain, characterized in that it has a decision element (104, 211) connected to said error detector. a decision-making body (104, 211) configured to perform the following functions: · · monitor the amount of received but not equalized or channel decoded data 35, 111888 - in response to the detection of an error multiplier (103, 208) indicating that the equalized and channel decoded data block includes errors, to check if the amount of received but not equalized or channel decoded data is below a certain threshold and 5. in response to the finding that the amount of received but not yet equalized and channel decoded data is below said threshold, to start iterative equalization and channel decoding found to contain errors. A radio receiver according to claim 9, characterized in that, in the forward direction of the received signals before the equalizer, there is a buffer memory (101, 204) such that said decision-making means (104, 211) is arranged to monitor the fill ratio of said buffer. The radio receiver of claim 9, further comprising a deinterleaver (206) coupled between the equalizer (205) and a channel decoder (207) to deinterleave the equalized but not yet channel decoded data, and a reinterleaver (210) coupled to the channel decoder (207) and an equalizer (205) for re-interleaving channel-decoded data, which is input as an input to an iterative equalization and channel decoding round. : · 20 Patent terms