ES8707390A1 - Un combinador de reloj redundante - Google Patents

Un combinador de reloj redundante

Info

Publication number
ES8707390A1
ES8707390A1 ES553909A ES553909A ES8707390A1 ES 8707390 A1 ES8707390 A1 ES 8707390A1 ES 553909 A ES553909 A ES 553909A ES 553909 A ES553909 A ES 553909A ES 8707390 A1 ES8707390 A1 ES 8707390A1
Authority
ES
Spain
Prior art keywords
clock
clock signal
redundant clock
prioritized
clock combiner
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES553909A
Other languages
English (en)
Other versions
ES553909A0 (es
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia Spain SA
Original Assignee
Alcatel Espana SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel Espana SA filed Critical Alcatel Espana SA
Publication of ES553909A0 publication Critical patent/ES553909A0/es
Publication of ES8707390A1 publication Critical patent/ES8707390A1/es
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/19—Monitoring patterns of pulse trains
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K17/693—Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors

Abstract

COMBINADOR DE RELOJ REDUNDANTE. COMPRENDE: UN MEDIO (12) PARA LA DETECCION DE FALLO, O PERDIDA DE UNA PRIMERA SEÑAL DE RELOJ (CLK A) SUMINISTRADA A UN PRIMER PUERTO DE ENTRADA (14); UN MEDIO (16) PARA LA DETECCION DE FALLO, O PERDIDA, DE UNA SEGUNDA SEÑAL DE RELOJ (CLK B) SUMINISTRADA A UN SEGUNDO PUERTO DE ENTRADA (18); UN MEDIO (20) PARA LA SELECCION DE UNA DE LAS DOS SEÑALES DE RELOJ (CLK A) O (CLK B); MEDIOS (22) PARA LA HABILITACION DE UNA DE LAS DOS SEÑALES DE RELOJ A SER SUMINISTRADA EN UNA SALIDA DEL PUERTO (24) DE UN DISPOSITIVO; Y UN DISPOSITIVO QUE INCLUYE MEDIOS (26) PARA LA INICIACION DE UN SECUENCIADOR (28); Y UN MEDIO (30) PARA EL ACCESO EXTERNO AL DISPOSITIVO. TIENE APLICACION EN EL CAMPO DE LA INFORMATI
ES553909A 1985-04-12 1986-04-11 Un combinador de reloj redundante Expired ES8707390A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/722,894 US4653054A (en) 1985-04-12 1985-04-12 Redundant clock combiner

Publications (2)

Publication Number Publication Date
ES553909A0 ES553909A0 (es) 1987-07-16
ES8707390A1 true ES8707390A1 (es) 1987-07-16

Family

ID=24903863

Family Applications (1)

Application Number Title Priority Date Filing Date
ES553909A Expired ES8707390A1 (es) 1985-04-12 1986-04-11 Un combinador de reloj redundante

Country Status (3)

Country Link
US (1) US4653054A (es)
DE (1) DE3611848A1 (es)
ES (1) ES8707390A1 (es)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4920540A (en) * 1987-02-25 1990-04-24 Stratus Computer, Inc. Fault-tolerant digital timing apparatus and method
US5020024A (en) * 1987-01-16 1991-05-28 Stratus Computer, Inc. Method and apparatus for detecting selected absence of digital logic synchronism
EP0496506B1 (en) * 1991-01-25 2000-09-20 Hitachi, Ltd. Fault tolerant computer system incorporating processing units which have at least three processors
US5355470A (en) * 1992-01-03 1994-10-11 Amdahl Corporation Method for reconfiguring individual timer registers offline
JPH0778039A (ja) * 1993-09-08 1995-03-20 Fujitsu Ltd クロック選択制御方式
JPH0816276A (ja) * 1994-06-30 1996-01-19 Mitsubishi Denki Semiconductor Software Kk マイクロコンピュータ
KR100303073B1 (ko) * 1995-05-11 2001-11-02 칼 하인쯔 호르닝어 동적 레지스터를 사용한 cmos 회로용 클럭 신호 발생 장치
US5568097A (en) * 1995-09-25 1996-10-22 International Business Machines Inc. Ultra high availability clock chip
US5886557A (en) * 1996-06-28 1999-03-23 Emc Corporation Redundant clock signal generating circuitry
US6341149B1 (en) * 1997-06-27 2002-01-22 International Business Machines Corporation Clock control device for a non-disruptive backup clock switching
FR2797965A1 (fr) * 1999-08-31 2001-03-02 Koninkl Philips Electronics Nv Procede permettant un echange de donnees entre une carte a puce et un appareil en cas d'interruption intempestive de l'alimentation de l'appareil
US6718474B1 (en) 2000-09-21 2004-04-06 Stratus Technologies Bermuda Ltd. Methods and apparatus for clock management based on environmental conditions
FR2818871B1 (fr) * 2000-12-21 2003-03-07 Crouzet Automatismes Systeme de commande d'un interrupteur a deux etats
JP3523225B2 (ja) * 2001-09-18 2004-04-26 Ｎｅｃマイクロシステム株式会社 クロック監視装置及び監視方法
US6970045B1 (en) 2003-06-25 2005-11-29 Nel Frequency Controls, Inc. Redundant clock module
US7296170B1 (en) * 2004-01-23 2007-11-13 Zilog, Inc. Clock controller with clock source fail-safe logic
US20060222126A1 (en) * 2005-03-31 2006-10-05 Stratus Technologies Bermuda Ltd. Systems and methods for maintaining synchronicity during signal transmission
US20060222125A1 (en) * 2005-03-31 2006-10-05 Edwards John W Jr Systems and methods for maintaining synchronicity during signal transmission
US7562247B2 (en) * 2006-05-16 2009-07-14 International Business Machines Corporation Providing independent clock failover for scalable blade servers
GB0709097D0 (en) * 2007-05-11 2007-06-20 Univ Leicester Tick source

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2059797B1 (de) * 1970-12-04 1972-05-25 Siemens Ag Taktversorgungsanlage
IN146507B (es) * 1975-09-29 1979-06-23 Ericsson Telefon Ab L M
US4322580A (en) * 1980-09-02 1982-03-30 Gte Automatic Electric Labs Inc. Clock selection circuit
US4392226A (en) * 1981-09-28 1983-07-05 Ncr Corporation Multiple source clock encoded communications error detection circuit
US4542509A (en) * 1983-10-31 1985-09-17 International Business Machines Corporation Fault testing a clock distribution network
US4538272A (en) * 1983-12-22 1985-08-27 Gte Automatic Electric Incorporated Prioritized clock selection circuit

Also Published As

Publication number Publication date
US4653054A (en) 1987-03-24
ES553909A0 (es) 1987-07-16
DE3611848A1 (de) 1986-10-30

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