ES8500683A1 - Time sharing conference circuit for digital system - Google Patents

Time sharing conference circuit for digital system

Info

Publication number
ES8500683A1
ES8500683A1 ES526005A ES526005A ES8500683A1 ES 8500683 A1 ES8500683 A1 ES 8500683A1 ES 526005 A ES526005 A ES 526005A ES 526005 A ES526005 A ES 526005A ES 8500683 A1 ES8500683 A1 ES 8500683A1
Authority
ES
Spain
Prior art keywords
subscriber
comparator
loudest signal
digital system
time sharing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES526005A
Other languages
Spanish (es)
Other versions
ES526005A0 (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia Spain SA
Original Assignee
Alcatel Espana SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from CA000412272A external-priority patent/CA1191630A/en
Application filed by Alcatel Espana SA filed Critical Alcatel Espana SA
Publication of ES8500683A1 publication Critical patent/ES8500683A1/en
Publication of ES526005A0 publication Critical patent/ES526005A0/en
Granted legal-status Critical Current

Links

Abstract

Address information detailing which receiving and transmitting channels are being used for a conference is stored in RAM's. The speech is sampled in PCM format from each subscriber and is passed via a channel counter and multiplexed to a reception memory. This data is then transmitted from the memory to a comparator which selects the subscriber having the loudest signal. A latch circuit retains the current loudest signal and a timing circuit allows it to be retained for a given time period. A logic control circuit provides control signals when another subcrriber comparator circuit produces an output signalling the channel having the loudest signal. This process is repeated for each frame of information.
ES526005A 1982-09-27 1983-09-27 A MIC CONFERENCE CIRCUIT (CODED PULSE MODULATION) Granted ES526005A0 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CA000412272A CA1191630A (en) 1982-09-27 1982-09-27 Pcm conference circuit

Publications (2)

Publication Number Publication Date
ES8500683A1 true ES8500683A1 (en) 1984-06-16
ES526005A0 ES526005A0 (en) 1984-06-16

Family

ID=4123664

Family Applications (1)

Application Number Title Priority Date Filing Date
ES526005A Granted ES526005A0 (en) 1982-09-27 1983-09-27 A MIC CONFERENCE CIRCUIT (CODED PULSE MODULATION)

Country Status (1)

Country Link
ES (1) ES526005A0 (en)

Also Published As

Publication number Publication date
ES526005A0 (en) 1984-06-16

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