ES8106060A1 - Perfeccionamientos en sistemas de proceso de datos de pro- gramacion multiple - Google Patents

Perfeccionamientos en sistemas de proceso de datos de pro- gramacion multiple

Info

Publication number
ES8106060A1
ES8106060A1 ES495453A ES495453A ES8106060A1 ES 8106060 A1 ES8106060 A1 ES 8106060A1 ES 495453 A ES495453 A ES 495453A ES 495453 A ES495453 A ES 495453A ES 8106060 A1 ES8106060 A1 ES 8106060A1
Authority
ES
Spain
Prior art keywords
capability
dumpstack
descriptors
portion containing
stack
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES495453A
Other languages
English (en)
Other versions
ES495453A0 (es
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Plessey Overseas Ltd
Original Assignee
Plessey Overseas Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Plessey Overseas Ltd filed Critical Plessey Overseas Ltd
Publication of ES495453A0 publication Critical patent/ES495453A0/es
Publication of ES8106060A1 publication Critical patent/ES8106060A1/es
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G06F12/1483—Protection against unauthorised use of memory or access to memory by checking the subject access rights using an access-table, e.g. matrix or list
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/461—Saving or restoring of program or task context
    • G06F9/463—Program control block organisation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Mathematical Physics (AREA)
  • Hardware Redundancy (AREA)
  • Stored Programmes (AREA)
  • Debugging And Monitoring (AREA)
  • Storage Device Security (AREA)
  • Executing Machine-Instructions (AREA)
  • Exchange Systems With Centralized Control (AREA)
  • Multi Processors (AREA)

Abstract

SISTEMA DE PROGRAMACION MULTIPLE CAPAZ DE ALMACENAR LOS PARAMETROS DE TRABAJO CUANDO EL PROCESO SE INTERRUMPE. ESTA CONSTITUIDO DE UNIDADES, PROCESADORAS (CPU1, CPU2) ENLAZADAS CON MODULOS DE ALMACENAMIENTO (STA, STB, STC), Y EQUIPOS PERIFERICOS (PE), CON SUS UNIDADES DE ACCESO (PAUN). EL SISTEMA PERMITE TENER VARIOS PROGRAMAS EN DESARROLLO, DE FORMA QUE CUANDO SE ESTA EJECUTANDO UN PROGRAMA Y APARECE OTRO MAS URGENTE, EL ANTERIOR SE ALMACENA Y SE PUEDE TRABAJAR CON EL QUE SE NECESITE; ADEMAS, LOS PROGRAMAS EN ESPERA ESTAN PROTEGIDOS CONTRA INTRODUCCION DE DATOS ERRONEOS. O
ES495453A 1979-09-29 1980-09-29 Perfeccionamientos en sistemas de proceso de datos de pro- gramacion multiple Expired ES8106060A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB7933856A GB2060225B (en) 1979-09-29 1979-09-29 Multi-programming data processing system process suspension

Publications (2)

Publication Number Publication Date
ES495453A0 ES495453A0 (es) 1981-07-01
ES8106060A1 true ES8106060A1 (es) 1981-07-01

Family

ID=10508176

Family Applications (1)

Application Number Title Priority Date Filing Date
ES495453A Expired ES8106060A1 (es) 1979-09-29 1980-09-29 Perfeccionamientos en sistemas de proceso de datos de pro- gramacion multiple

Country Status (18)

Country Link
US (1) US4486831A (es)
EP (1) EP0026589B1 (es)
JP (1) JPS5657149A (es)
KR (1) KR860000837B1 (es)
AT (1) ATE32388T1 (es)
AU (1) AU542183B2 (es)
CA (1) CA1160350A (es)
DE (1) DE3072072D1 (es)
DK (1) DK408980A (es)
ES (1) ES8106060A1 (es)
GB (1) GB2060225B (es)
HK (1) HK76984A (es)
IE (1) IE50246B1 (es)
NO (1) NO802759L (es)
NZ (1) NZ195062A (es)
PT (1) PT71824B (es)
SG (1) SG43484G (es)
ZA (1) ZA805536B (es)

Families Citing this family (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4649472A (en) * 1981-02-04 1987-03-10 Burroughs Corporation Multi-phase subroutine control circuitry
US4599689A (en) * 1983-02-28 1986-07-08 Data Translations, Inc. Continuous data transfer system
US4703449A (en) * 1983-02-28 1987-10-27 Data Translation Inc. Interrupt driven multi-buffer DMA circuit for enabling continuous sequential data transfers
US4644461A (en) * 1983-04-29 1987-02-17 The Regents Of The University Of California Dynamic activity-creating data-driven computer architecture
JPS60195646A (ja) * 1984-03-16 1985-10-04 Hitachi Ltd デ−タ処理装置
JPS61210432A (ja) * 1985-03-15 1986-09-18 Hitachi Ltd 計算処理方式
US5274797A (en) * 1986-05-30 1993-12-28 Bull Hn Information Systems Inc. Multiprocessor system with centralized initialization, testing and monitoring of the system and providing centralized timing
CA1312142C (en) * 1988-02-10 1992-12-29 Richard I. Baum Linkage mechanism for program isolation
US5210874A (en) * 1988-03-22 1993-05-11 Digital Equipment Corporation Cross-domain call system in a capability based digital data processing system
US4974159A (en) * 1988-09-13 1990-11-27 Microsoft Corporation Method of transferring control in a multitasking computer system
US5317733A (en) * 1990-01-26 1994-05-31 Cisgem Technologies, Inc. Office automation system for data base management and forms generation
US5339422A (en) * 1991-03-07 1994-08-16 Digital Equipment Corporation System and method for jacketing cross-domain calls in a multi-code execution and debugging system within a multi-architecture environment
US5652869A (en) * 1991-03-07 1997-07-29 Digital Equipment Corporation System for executing and debugging multiple codes in a multi-architecture environment using jacketing means for jacketing the cross-domain calls
CA2082066C (en) * 1991-03-07 1998-04-21 James A. Wooldridge Software debugging system and method especially adapted for code debugging within a multi-architecture environment
US5396616A (en) * 1993-06-15 1995-03-07 Xerox Corporation System for emulating multi-tasking pipelines in a single tasking environment
US5701479A (en) * 1993-06-15 1997-12-23 Xerox Corporation Pipelined image processing system for a single application environment
US5995996A (en) * 1993-06-15 1999-11-30 Xerox Corporation Pipelined image processing system for a single application environment
EP0667574A3 (en) * 1994-02-14 1997-02-12 Ibm Computer system.
US5937186A (en) * 1994-03-24 1999-08-10 International Business Machines Corporation Asynchronous interrupt safing of prologue portions of computer programs
US6601188B1 (en) 1999-10-28 2003-07-29 International Business Machines Corporation Method and apparatus for external crash analysis in a multitasking operating system
US7620852B2 (en) * 2005-03-02 2009-11-17 Microsoft Corporation Systems and methods of reporting multiple threads involved in a potential data race
US20070239854A1 (en) * 2006-04-11 2007-10-11 Gopalakrishnan Janakiraman Method of migrating process domain
US9063932B2 (en) 2009-12-18 2015-06-23 Vertafore, Inc. Apparatus, method and article to manage electronic or digital documents in a networked environment
US8700682B2 (en) 2009-12-24 2014-04-15 Vertafore, Inc. Systems, methods and articles for template based generation of markup documents to access back office systems
US9384198B2 (en) 2010-12-10 2016-07-05 Vertafore, Inc. Agency management system and content management system integration
US8731973B2 (en) 2011-04-19 2014-05-20 Vertafore, Inc. Overlaying images in automated insurance policy form generation
US9507814B2 (en) 2013-12-10 2016-11-29 Vertafore, Inc. Bit level comparator systems and methods
US9367435B2 (en) 2013-12-12 2016-06-14 Vertafore, Inc. Integration testing method and system for web services
US9747556B2 (en) 2014-08-20 2017-08-29 Vertafore, Inc. Automated customized web portal template generation systems and methods
US9600400B1 (en) 2015-10-29 2017-03-21 Vertafore, Inc. Performance testing of web application components using image differentiation
US10120688B2 (en) * 2016-11-15 2018-11-06 Andes Technology Corporation Data processing system and method for executing block call and block return instructions
GB2586276B (en) 2019-08-16 2022-03-30 Advanced Risc Mach Ltd Capability write address tracking

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1329721A (en) * 1970-05-26 1973-09-12 Plessey Co Ltd Data processing devices
GB1410631A (en) * 1972-01-26 1975-10-22 Plessey Co Ltd Data processing system interrupt arrangements
US4351024A (en) * 1975-04-21 1982-09-21 Honeywell Information Systems Inc. Switch system base mechanism
GB1548401A (en) * 1975-10-08 1979-07-11 Plessey Co Ltd Data processing memory space allocation and deallocation arrangements
US4041462A (en) * 1976-04-30 1977-08-09 International Business Machines Corporation Data processing system featuring subroutine linkage operations using hardware controlled stacks

Also Published As

Publication number Publication date
PT71824B (en) 1981-06-30
KR860000837B1 (ko) 1986-07-02
ZA805536B (en) 1981-09-30
GB2060225A (en) 1981-04-29
ES495453A0 (es) 1981-07-01
ATE32388T1 (de) 1988-02-15
JPS5657149A (en) 1981-05-19
PT71824A (en) 1980-10-01
JPH0114611B2 (es) 1989-03-13
EP0026589A2 (en) 1981-04-08
EP0026589B1 (en) 1988-02-03
CA1160350A (en) 1984-01-10
GB2060225B (en) 1983-05-25
IE50246B1 (en) 1986-03-05
IE802025L (en) 1981-03-29
HK76984A (en) 1984-10-19
NO802759L (no) 1981-03-30
AU6215580A (en) 1981-04-02
EP0026589A3 (en) 1982-06-30
DK408980A (da) 1981-03-30
AU542183B2 (en) 1985-02-14
NZ195062A (en) 1983-06-17
US4486831A (en) 1984-12-04
DE3072072D1 (en) 1988-03-10
SG43484G (en) 1985-09-13

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