ES487299A0 - Procedimiento de inscripcion de un caracter testigo en una memoria compuesta de elementos o celulas de almacenamiento cargas electricas y dispositivo obtenido por procedimiento - Google Patents

Procedimiento de inscripcion de un caracter testigo en una memoria compuesta de elementos o celulas de almacenamiento cargas electricas y dispositivo obtenido por procedimiento

Info

Publication number
ES487299A0
ES487299A0 ES487299A ES487299A ES487299A0 ES 487299 A0 ES487299 A0 ES 487299A0 ES 487299 A ES487299 A ES 487299A ES 487299 A ES487299 A ES 487299A ES 487299 A0 ES487299 A0 ES 487299A0
Authority
ES
Spain
Prior art keywords
procedure
storage elements
device obtained
inscription
electric loads
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
ES487299A
Other languages
English (en)
Other versions
ES8101801A1 (es
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
INTERNATIONALE POUR L'INFORMATIQUE CII - Cie
Original Assignee
INTERNATIONALE POUR L'INFORMATIQUE CII - Cie
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by INTERNATIONALE POUR L'INFORMATIQUE CII - Cie filed Critical INTERNATIONALE POUR L'INFORMATIQUE CII - Cie
Publication of ES487299A0 publication Critical patent/ES487299A0/es
Publication of ES8101801A1 publication Critical patent/ES8101801A1/es
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/22Safety or protection circuits preventing unauthorised or accidental access to memory cells
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751Error or fault detection not based on redundancy
    • G06F11/0763Error or fault detection not based on redundancy by bit configuration check, e.g. of formats or tags
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406Management or control of the refreshing or charge-regeneration cycles
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4078Safety or protection circuits, e.g. for preventing inadvertent or unauthorised reading or writing; Status cells; Test cells
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/24Memory cell safety or protection circuits, e.g. arrangements for preventing inadvertent reading or writing; Status cells; Test cells

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Security & Cryptography (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Read Only Memory (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Storage Device Security (AREA)
  • Meter Arrangements (AREA)
ES487299A 1978-12-27 1979-12-27 Procedimiento de inscripcion de un caracter testigo en una memoria compuesta de elementos o celulas de almacenamiento cargas electricas y dispositivo obtenido por procedimiento Expired ES8101801A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7836543A FR2445586A1 (fr) 1978-12-27 1978-12-27 Procede d'inscription d'un caractere temoin dans une memoire a stockage de charge electrique et dispositif obtenu par ce procede

Publications (2)

Publication Number Publication Date
ES487299A0 true ES487299A0 (es) 1980-12-16
ES8101801A1 ES8101801A1 (es) 1980-12-16

Family

ID=9216597

Family Applications (1)

Application Number Title Priority Date Filing Date
ES487299A Expired ES8101801A1 (es) 1978-12-27 1979-12-27 Procedimiento de inscripcion de un caracter testigo en una memoria compuesta de elementos o celulas de almacenamiento cargas electricas y dispositivo obtenido por procedimiento

Country Status (6)

Country Link
EP (1) EP0013523B1 (es)
JP (1) JPS5597090A (es)
BR (1) BR7908578A (es)
DE (1) DE2966358D1 (es)
ES (1) ES8101801A1 (es)
FR (1) FR2445586A1 (es)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2455320B1 (fr) * 1979-04-25 1986-01-24 Cii Honeywell Bull Dispositif de recyclage de supports d'enregistrement identifiables a l'aide de donnees d'identification et composes de memoires monolithiques non volatiles effacables
FR2567302A1 (fr) * 1984-07-09 1986-01-10 Stanislas Cottignies Procede de controle d'une memoire non volatile de type semi-conducteur a injection de charges electriques, memoire controlable et dispositif de controle de ladite memoire
JPH01306951A (ja) * 1988-06-03 1989-12-11 Hitachi Ltd 半導体集積回路装置
US5644636A (en) * 1994-12-30 1997-07-01 Xtec, Incorporated Method and apparatus for securing data stored in semiconductor memory cells

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50120931A (es) * 1974-03-11 1975-09-22
IT1055374B (it) * 1975-02-28 1981-12-21 Siemens Ag Dispositivo memorizzatore elettronico a semiconduttori per scrittura e lettura con accesso diretto
DE2516124C2 (de) * 1975-04-12 1983-03-03 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Datenspeicherschaltung
JPS5346237A (en) * 1976-10-08 1978-04-25 Canon Inc Electronic device having memory unit capable of write-in and readout
JPS608555B2 (ja) * 1977-01-24 1985-03-04 日本電気株式会社 半導体一時記憶装置

Also Published As

Publication number Publication date
ES8101801A1 (es) 1980-12-16
DE2966358D1 (en) 1983-12-01
EP0013523A1 (fr) 1980-07-23
BR7908578A (pt) 1980-07-08
JPH0338679B2 (es) 1991-06-11
FR2445586A1 (fr) 1980-07-25
FR2445586B1 (es) 1983-09-30
EP0013523B1 (fr) 1983-10-26
JPS5597090A (en) 1980-07-23

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